Linux-2.6.12-rc2
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / asm-arm / dma.h
blobef41df43a584765b5c7d10ce6e38a6cc75d567f8
1 #ifndef __ASM_ARM_DMA_H
2 #define __ASM_ARM_DMA_H
4 typedef unsigned int dmach_t;
6 #include <linux/config.h>
7 #include <linux/spinlock.h>
8 #include <asm/system.h>
9 #include <asm/scatterlist.h>
10 #include <asm/arch/dma.h>
13 * DMA modes
15 typedef unsigned int dmamode_t;
17 #define DMA_MODE_MASK 3
19 #define DMA_MODE_READ 0
20 #define DMA_MODE_WRITE 1
21 #define DMA_MODE_CASCADE 2
22 #define DMA_AUTOINIT 4
24 extern spinlock_t dma_spin_lock;
26 static inline unsigned long claim_dma_lock(void)
28 unsigned long flags;
29 spin_lock_irqsave(&dma_spin_lock, flags);
30 return flags;
33 static inline void release_dma_lock(unsigned long flags)
35 spin_unlock_irqrestore(&dma_spin_lock, flags);
38 /* Clear the 'DMA Pointer Flip Flop'.
39 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
41 #define clear_dma_ff(channel)
43 /* Set only the page register bits of the transfer address.
45 * NOTE: This is an architecture specific function, and should
46 * be hidden from the drivers
48 extern void set_dma_page(dmach_t channel, char pagenr);
50 /* Request a DMA channel
52 * Some architectures may need to do allocate an interrupt
54 extern int request_dma(dmach_t channel, const char * device_id);
56 /* Free a DMA channel
58 * Some architectures may need to do free an interrupt
60 extern void free_dma(dmach_t channel);
62 /* Enable DMA for this channel
64 * On some architectures, this may have other side effects like
65 * enabling an interrupt and setting the DMA registers.
67 extern void enable_dma(dmach_t channel);
69 /* Disable DMA for this channel
71 * On some architectures, this may have other side effects like
72 * disabling an interrupt or whatever.
74 extern void disable_dma(dmach_t channel);
76 /* Test whether the specified channel has an active DMA transfer
78 extern int dma_channel_active(dmach_t channel);
80 /* Set the DMA scatter gather list for this channel
82 * This should not be called if a DMA channel is enabled,
83 * especially since some DMA architectures don't update the
84 * DMA address immediately, but defer it to the enable_dma().
86 extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg);
88 /* Set the DMA address for this channel
90 * This should not be called if a DMA channel is enabled,
91 * especially since some DMA architectures don't update the
92 * DMA address immediately, but defer it to the enable_dma().
94 extern void set_dma_addr(dmach_t channel, unsigned long physaddr);
96 /* Set the DMA byte count for this channel
98 * This should not be called if a DMA channel is enabled,
99 * especially since some DMA architectures don't update the
100 * DMA count immediately, but defer it to the enable_dma().
102 extern void set_dma_count(dmach_t channel, unsigned long count);
104 /* Set the transfer direction for this channel
106 * This should not be called if a DMA channel is enabled,
107 * especially since some DMA architectures don't update the
108 * DMA transfer direction immediately, but defer it to the
109 * enable_dma().
111 extern void set_dma_mode(dmach_t channel, dmamode_t mode);
113 /* Set the transfer speed for this channel
115 extern void set_dma_speed(dmach_t channel, int cycle_ns);
117 /* Get DMA residue count. After a DMA transfer, this
118 * should return zero. Reading this while a DMA transfer is
119 * still in progress will return unpredictable results.
120 * If called before the channel has been used, it may return 1.
121 * Otherwise, it returns the number of _bytes_ left to transfer.
123 extern int get_dma_residue(dmach_t channel);
125 #ifndef NO_DMA
126 #define NO_DMA 255
127 #endif
129 #ifdef CONFIG_PCI
130 extern int isa_dma_bridge_buggy;
131 #else
132 #define isa_dma_bridge_buggy (0)
133 #endif
135 #endif /* _ARM_DMA_H */