drivers/net/wan/pci200syn.c

   1 /*
   2  * Goramo PCI200SYN synchronous serial card driver for Linux
   3  *
   4  * Copyright (C) 2002-2003 Krzysztof Halasa <khc@pm.waw.pl>
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of version 2 of the GNU General Public License
   8  * as published by the Free Software Foundation.
   9  *
  10  * For information see http://hq.pm.waw.pl/hdlc/
  11  *
  12  * Sources of information:
  13  *    Hitachi HD64572 SCA-II User's Manual
  14  *    PLX Technology Inc. PCI9052 Data Book
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/slab.h>
  20 #include <linux/sched.h>
  21 #include <linux/types.h>
  22 #include <linux/fcntl.h>
  23 #include <linux/in.h>
  24 #include <linux/string.h>
  25 #include <linux/errno.h>
  26 #include <linux/init.h>
  27 #include <linux/ioport.h>
  28 #include <linux/moduleparam.h>
  29 #include <linux/netdevice.h>
  30 #include <linux/hdlc.h>
  31 #include <linux/pci.h>
  32 #include <asm/delay.h>
  33 #include <asm/io.h>
  34
  35 #include "hd64572.h"
  36
  37 static const char* version = "Goramo PCI200SYN driver version: 1.16";
  38 static const char* devname = "PCI200SYN";
  39
  40 #undef DEBUG_PKT
  41 #define DEBUG_RINGS
  42
  43 #define PCI200SYN_PLX_SIZE      0x80    /* PLX control window size (128b) */
  44 #define PCI200SYN_SCA_SIZE      0x400   /* SCA window size (1Kb) */
  45 #define ALL_PAGES_ALWAYS_MAPPED
  46 #define NEED_DETECT_RAM
  47 #define NEED_SCA_MSCI_INTR
  48 #define MAX_TX_BUFFERS          10
  49
  50 static int pci_clock_freq = 33000000;
  51 #define CLOCK_BASE pci_clock_freq
  52
  53 #define PCI_VENDOR_ID_GORAMO    0x10B5  /* uses PLX:9050 ID - this card */
  54 #define PCI_DEVICE_ID_PCI200SYN 0x9050  /* doesn't have its own ID      */
  55
  56
  57 /*
  58  *      PLX PCI9052 local configuration and shared runtime registers.
  59  *      This structure can be used to access 9052 registers (memory mapped).
  60  */
  61 typedef struct {
  62         u32 loc_addr_range[4];  /* 00-0Ch : Local Address Ranges */
  63         u32 loc_rom_range;      /* 10h : Local ROM Range */
  64         u32 loc_addr_base[4];   /* 14-20h : Local Address Base Addrs */
  65         u32 loc_rom_base;       /* 24h : Local ROM Base */
  66         u32 loc_bus_descr[4];   /* 28-34h : Local Bus Descriptors */
  67         u32 rom_bus_descr;      /* 38h : ROM Bus Descriptor */
  68         u32 cs_base[4];         /* 3C-48h : Chip Select Base Addrs */
  69         u32 intr_ctrl_stat;     /* 4Ch : Interrupt Control/Status */
  70         u32 init_ctrl;          /* 50h : EEPROM ctrl, Init Ctrl, etc */
  71 }plx9052;
  72
  73
  74
  75 typedef struct port_s {
  76         struct net_device *dev;
  77         struct card_s *card;
  78         spinlock_t lock;        /* TX lock */
  79         sync_serial_settings settings;
  80         int rxpart;             /* partial frame received, next frame invalid*/
  81         unsigned short encoding;
  82         unsigned short parity;
  83         u16 rxin;               /* rx ring buffer 'in' pointer */
  84         u16 txin;               /* tx ring buffer 'in' and 'last' pointers */
  85         u16 txlast;
  86         u8 rxs, txs, tmc;       /* SCA registers */
  87         u8 phy_node;            /* physical port # - 0 or 1 */
  88 }port_t;
  89
  90
  91
  92 typedef struct card_s {
  93         u8 __iomem *rambase;    /* buffer memory base (virtual) */
  94         u8 __iomem *scabase;    /* SCA memory base (virtual) */
  95         plx9052 __iomem *plxbase;/* PLX registers memory base (virtual) */
  96         u16 rx_ring_buffers;    /* number of buffers in a ring */
  97         u16 tx_ring_buffers;
  98         u16 buff_offset;        /* offset of first buffer of first channel */
  99         u8 irq;                 /* interrupt request level */
 100
 101         port_t ports[2];
 102 }card_t;
 103
 104
 105 #define sca_in(reg, card)            readb(card->scabase + (reg))
 106 #define sca_out(value, reg, card)    writeb(value, card->scabase + (reg))
 107 #define sca_inw(reg, card)           readw(card->scabase + (reg))
 108 #define sca_outw(value, reg, card)   writew(value, card->scabase + (reg))
 109 #define sca_inl(reg, card)           readl(card->scabase + (reg))
 110 #define sca_outl(value, reg, card)   writel(value, card->scabase + (reg))
 111
 112 #define port_to_card(port)           (port->card)
 113 #define log_node(port)               (port->phy_node)
 114 #define phy_node(port)               (port->phy_node)
 115 #define winbase(card)                (card->rambase)
 116 #define get_port(card, port)         (&card->ports[port])
 117 #define sca_flush(card)              (sca_in(IER0, card));
 118
 119 static inline void new_memcpy_toio(char __iomem *dest, char *src, int length)
 120 {
 121         int len;
 122         do {
 123                 len = length > 256 ? 256 : length;
 124                 memcpy_toio(dest, src, len);
 125                 dest += len;
 126                 src += len;
 127                 length -= len;
 128                 readb(dest);
 129         } while (len);
 130 }
 131
 132 #undef memcpy_toio
 133 #define memcpy_toio new_memcpy_toio
 134
 135 #include "hd6457x.c"
 136
 137
 138 static void pci200_set_iface(port_t *port)
 139 {
 140         card_t *card = port->card;
 141         u16 msci = get_msci(port);
 142         u8 rxs = port->rxs & CLK_BRG_MASK;
 143         u8 txs = port->txs & CLK_BRG_MASK;
 144
 145         sca_out(EXS_TES1, (phy_node(port) ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS,
 146                 port_to_card(port));
 147         switch(port->settings.clock_type) {
 148         case CLOCK_INT:
 149                 rxs |= CLK_BRG; /* BRG output */
 150                 txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
 151                 break;
 152
 153         case CLOCK_TXINT:
 154                 rxs |= CLK_LINE; /* RXC input */
 155                 txs |= CLK_PIN_OUT | CLK_BRG; /* BRG output */
 156                 break;
 157
 158         case CLOCK_TXFROMRX:
 159                 rxs |= CLK_LINE; /* RXC input */
 160                 txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
 161                 break;
 162
 163         default:                /* EXTernal clock */
 164                 rxs |= CLK_LINE; /* RXC input */
 165                 txs |= CLK_PIN_OUT | CLK_LINE; /* TXC input */
 166                 break;
 167         }
 168
 169         port->rxs = rxs;
 170         port->txs = txs;
 171         sca_out(rxs, msci + RXS, card);
 172         sca_out(txs, msci + TXS, card);
 173         sca_set_port(port);
 174 }
 175
 176
 177
 178 static int pci200_open(struct net_device *dev)
 179 {
 180         port_t *port = dev_to_port(dev);
 181
 182         int result = hdlc_open(dev);
 183         if (result)
 184                 return result;
 185
 186         sca_open(dev);
 187         pci200_set_iface(port);
 188         sca_flush(port_to_card(port));
 189         return 0;
 190 }
 191
 192
 193
 194 static int pci200_close(struct net_device *dev)
 195 {
 196         sca_close(dev);
 197         sca_flush(port_to_card(dev_to_port(dev)));
 198         hdlc_close(dev);
 199         return 0;
 200 }
 201
 202
 203
 204 static int pci200_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 205 {
 206         const size_t size = sizeof(sync_serial_settings);
 207         sync_serial_settings new_line;
 208         sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
 209         port_t *port = dev_to_port(dev);
 210
 211 #ifdef DEBUG_RINGS
 212         if (cmd == SIOCDEVPRIVATE) {
 213                 sca_dump_rings(dev);
 214                 return 0;
 215         }
 216 #endif
 217         if (cmd != SIOCWANDEV)
 218                 return hdlc_ioctl(dev, ifr, cmd);
 219
 220         switch(ifr->ifr_settings.type) {
 221         case IF_GET_IFACE:
 222                 ifr->ifr_settings.type = IF_IFACE_V35;
 223                 if (ifr->ifr_settings.size < size) {
 224                         ifr->ifr_settings.size = size; /* data size wanted */
 225                         return -ENOBUFS;
 226                 }
 227                 if (copy_to_user(line, &port->settings, size))
 228                         return -EFAULT;
 229                 return 0;
 230
 231         case IF_IFACE_V35:
 232         case IF_IFACE_SYNC_SERIAL:
 233                 if (!capable(CAP_NET_ADMIN))
 234                         return -EPERM;
 235
 236                 if (copy_from_user(&new_line, line, size))
 237                         return -EFAULT;
 238
 239                 if (new_line.clock_type != CLOCK_EXT &&
 240                     new_line.clock_type != CLOCK_TXFROMRX &&
 241                     new_line.clock_type != CLOCK_INT &&
 242                     new_line.clock_type != CLOCK_TXINT)
 243                 return -EINVAL; /* No such clock setting */
 244
 245                 if (new_line.loopback != 0 && new_line.loopback != 1)
 246                         return -EINVAL;
 247
 248                 memcpy(&port->settings, &new_line, size); /* Update settings */
 249                 pci200_set_iface(port);
 250                 sca_flush(port_to_card(port));
 251                 return 0;
 252
 253         default:
 254                 return hdlc_ioctl(dev, ifr, cmd);
 255         }
 256 }
 257
 258
 259
 260 static void pci200_pci_remove_one(struct pci_dev *pdev)
 261 {
 262         int i;
 263         card_t *card = pci_get_drvdata(pdev);
 264
 265         for(i = 0; i < 2; i++)
 266                 if (card->ports[i].card) {
 267                         struct net_device *dev = port_to_dev(&card->ports[i]);
 268                         unregister_hdlc_device(dev);
 269                 }
 270
 271         if (card->irq)
 272                 free_irq(card->irq, card);
 273
 274         if (card->rambase)
 275                 iounmap(card->rambase);
 276         if (card->scabase)
 277                 iounmap(card->scabase);
 278         if (card->plxbase)
 279                 iounmap(card->plxbase);
 280
 281         pci_release_regions(pdev);
 282         pci_disable_device(pdev);
 283         pci_set_drvdata(pdev, NULL);
 284         if (card->ports[0].dev)
 285                 free_netdev(card->ports[0].dev);
 286         if (card->ports[1].dev)
 287                 free_netdev(card->ports[1].dev);
 288         kfree(card);
 289 }
 290
 291
 292
 293 static int __devinit pci200_pci_init_one(struct pci_dev *pdev,
 294                                          const struct pci_device_id *ent)
 295 {
 296         card_t *card;
 297         u8 rev_id;
 298         u32 __iomem *p;
 299         int i;
 300         u32 ramsize;
 301         u32 ramphys;            /* buffer memory base */
 302         u32 scaphys;            /* SCA memory base */
 303         u32 plxphys;            /* PLX registers memory base */
 304
 305 #ifndef MODULE
 306         static int printed_version;
 307         if (!printed_version++)
 308                 printk(KERN_INFO "%s\n", version);
 309 #endif
 310
 311         i = pci_enable_device(pdev);
 312         if (i)
 313                 return i;
 314
 315         i = pci_request_regions(pdev, "PCI200SYN");
 316         if (i) {
 317                 pci_disable_device(pdev);
 318                 return i;
 319         }
 320
 321         card = kmalloc(sizeof(card_t), GFP_KERNEL);
 322         if (card == NULL) {
 323                 printk(KERN_ERR "pci200syn: unable to allocate memory\n");
 324                 pci_release_regions(pdev);
 325                 pci_disable_device(pdev);
 326                 return -ENOBUFS;
 327         }
 328         memset(card, 0, sizeof(card_t));
 329         pci_set_drvdata(pdev, card);
 330         card->ports[0].dev = alloc_hdlcdev(&card->ports[0]);
 331         card->ports[1].dev = alloc_hdlcdev(&card->ports[1]);
 332         if (!card->ports[0].dev || !card->ports[1].dev) {
 333                 printk(KERN_ERR "pci200syn: unable to allocate memory\n");
 334                 pci200_pci_remove_one(pdev);
 335                 return -ENOMEM;
 336         }
 337
 338         pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
 339         if (pci_resource_len(pdev, 0) != PCI200SYN_PLX_SIZE ||
 340             pci_resource_len(pdev, 2) != PCI200SYN_SCA_SIZE ||
 341             pci_resource_len(pdev, 3) < 16384) {
 342                 printk(KERN_ERR "pci200syn: invalid card EEPROM parameters\n");
 343                 pci200_pci_remove_one(pdev);
 344                 return -EFAULT;
 345         }
 346
 347         plxphys = pci_resource_start(pdev,0) & PCI_BASE_ADDRESS_MEM_MASK;
 348         card->plxbase = ioremap(plxphys, PCI200SYN_PLX_SIZE);
 349
 350         scaphys = pci_resource_start(pdev,2) & PCI_BASE_ADDRESS_MEM_MASK;
 351         card->scabase = ioremap(scaphys, PCI200SYN_SCA_SIZE);
 352
 353         ramphys = pci_resource_start(pdev,3) & PCI_BASE_ADDRESS_MEM_MASK;
 354         card->rambase = ioremap(ramphys, pci_resource_len(pdev,3));
 355
 356         if (card->plxbase == NULL ||
 357             card->scabase == NULL ||
 358             card->rambase == NULL) {
 359                 printk(KERN_ERR "pci200syn: ioremap() failed\n");
 360                 pci200_pci_remove_one(pdev);
 361         }
 362
 363         /* Reset PLX */
 364         p = &card->plxbase->init_ctrl;
 365         writel(readl(p) | 0x40000000, p);
 366         readl(p);               /* Flush the write - do not use sca_flush */
 367         udelay(1);
 368
 369         writel(readl(p) & ~0x40000000, p);
 370         readl(p);               /* Flush the write - do not use sca_flush */
 371         udelay(1);
 372
 373         ramsize = sca_detect_ram(card, card->rambase,
 374                                  pci_resource_len(pdev, 3));
 375
 376         /* number of TX + RX buffers for one port - this is dual port card */
 377         i = ramsize / (2 * (sizeof(pkt_desc) + HDLC_MAX_MRU));
 378         card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS);
 379         card->rx_ring_buffers = i - card->tx_ring_buffers;
 380
 381         card->buff_offset = 2 * sizeof(pkt_desc) * (card->tx_ring_buffers +
 382                                                     card->rx_ring_buffers);
 383
 384         printk(KERN_INFO "pci200syn: %u KB RAM at 0x%x, IRQ%u, using %u TX +"
 385                " %u RX packets rings\n", ramsize / 1024, ramphys,
 386                pdev->irq, card->tx_ring_buffers, card->rx_ring_buffers);
 387
 388         if (card->tx_ring_buffers < 1) {
 389                 printk(KERN_ERR "pci200syn: RAM test failed\n");
 390                 pci200_pci_remove_one(pdev);
 391                 return -EFAULT;
 392         }
 393
 394         /* Enable interrupts on the PCI bridge */
 395         p = &card->plxbase->intr_ctrl_stat;
 396         writew(readw(p) | 0x0040, p);
 397
 398         /* Allocate IRQ */
 399         if(request_irq(pdev->irq, sca_intr, SA_SHIRQ, devname, card)) {
 400                 printk(KERN_WARNING "pci200syn: could not allocate IRQ%d.\n",
 401                        pdev->irq);
 402                 pci200_pci_remove_one(pdev);
 403                 return -EBUSY;
 404         }
 405         card->irq = pdev->irq;
 406
 407         sca_init(card, 0);
 408
 409         for(i = 0; i < 2; i++) {
 410                 port_t *port = &card->ports[i];
 411                 struct net_device *dev = port_to_dev(port);
 412                 hdlc_device *hdlc = dev_to_hdlc(dev);
 413                 port->phy_node = i;
 414
 415                 spin_lock_init(&port->lock);
 416                 SET_MODULE_OWNER(dev);
 417                 dev->irq = card->irq;
 418                 dev->mem_start = ramphys;
 419                 dev->mem_end = ramphys + ramsize - 1;
 420                 dev->tx_queue_len = 50;
 421                 dev->do_ioctl = pci200_ioctl;
 422                 dev->open = pci200_open;
 423                 dev->stop = pci200_close;
 424                 hdlc->attach = sca_attach;
 425                 hdlc->xmit = sca_xmit;
 426                 port->settings.clock_type = CLOCK_EXT;
 427                 port->card = card;
 428                 if(register_hdlc_device(dev)) {
 429                         printk(KERN_ERR "pci200syn: unable to register hdlc "
 430                                "device\n");
 431                         port->card = NULL;
 432                         pci200_pci_remove_one(pdev);
 433                         return -ENOBUFS;
 434                 }
 435                 sca_init_sync_port(port);       /* Set up SCA memory */
 436
 437                 printk(KERN_INFO "%s: PCI200SYN node %d\n",
 438                        dev->name, port->phy_node);
 439         }
 440
 441         sca_flush(card);
 442         return 0;
 443 }
 444
 445
 446
 447 static struct pci_device_id pci200_pci_tbl[] __devinitdata = {
 448         { PCI_VENDOR_ID_GORAMO, PCI_DEVICE_ID_PCI200SYN, PCI_ANY_ID,
 449           PCI_ANY_ID, 0, 0, 0 },
 450         { 0, }
 451 };
 452
 453
 454 static struct pci_driver pci200_pci_driver = {
 455         .name           = "PCI200SYN",
 456         .id_table       = pci200_pci_tbl,
 457         .probe          = pci200_pci_init_one,
 458         .remove         = pci200_pci_remove_one,
 459 };
 460
 461
 462 static int __init pci200_init_module(void)
 463 {
 464 #ifdef MODULE
 465         printk(KERN_INFO "%s\n", version);
 466 #endif
 467         if (pci_clock_freq < 1000000 || pci_clock_freq > 80000000) {
 468                 printk(KERN_ERR "pci200syn: Invalid PCI clock frequency\n");
 469                 return -EINVAL;
 470         }
 471         return pci_module_init(&pci200_pci_driver);
 472 }
 473
 474
 475
 476 static void __exit pci200_cleanup_module(void)
 477 {
 478         pci_unregister_driver(&pci200_pci_driver);
 479 }
 480
 481 MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
 482 MODULE_DESCRIPTION("Goramo PCI200SYN serial port driver");
 483 MODULE_LICENSE("GPL v2");
 484 MODULE_DEVICE_TABLE(pci, pci200_pci_tbl);
 485 module_param(pci_clock_freq, int, 0444);
 486 MODULE_PARM_DESC(pci_clock_freq, "System PCI clock frequency in Hz");
 487 module_init(pci200_init_module);
 488 module_exit(pci200_cleanup_module);