arch/x86_64/kernel/setup64.c

   1 /*
   2  * X86-64 specific CPU setup.
   3  * Copyright (C) 1995  Linus Torvalds
   4  * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
   5  * See setup.c for older changelog.
   6  * $Id: setup64.c,v 1.12 2002/03/21 10:09:17 ak Exp $
   7  */
   8 #include <linux/config.h>
   9 #include <linux/init.h>
  10 #include <linux/kernel.h>
  11 #include <linux/sched.h>
  12 #include <linux/string.h>
  13 #include <linux/bootmem.h>
  14 #include <linux/bitops.h>
  15 #include <asm/pda.h>
  16 #include <asm/pgtable.h>
  17 #include <asm/processor.h>
  18 #include <asm/desc.h>
  19 #include <asm/atomic.h>
  20 #include <asm/mmu_context.h>
  21 #include <asm/smp.h>
  22 #include <asm/i387.h>
  23 #include <asm/percpu.h>
  24 #include <asm/mtrr.h>
  25 #include <asm/proto.h>
  26 #include <asm/mman.h>
  27 #include <asm/numa.h>
  28
  29 char x86_boot_params[2048] __initdata = {0,};
  30
  31 cpumask_t cpu_initialized __initdata = CPU_MASK_NONE;
  32
  33 struct x8664_pda cpu_pda[NR_CPUS] __cacheline_aligned;
  34
  35 extern struct task_struct init_task;
  36
  37 extern unsigned char __per_cpu_start[], __per_cpu_end[];
  38
  39 extern struct desc_ptr cpu_gdt_descr[];
  40 struct desc_ptr idt_descr = { 256 * 16, (unsigned long) idt_table };
  41
  42 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
  43
  44 unsigned long __supported_pte_mask = ~0UL;
  45 static int do_not_nx __initdata = 0;
  46
  47 /* noexec=on|off
  48 Control non executable mappings for 64bit processes.
  49
  50 on      Enable(default)
  51 off     Disable
  52 */
  53 int __init nonx_setup(char *str)
  54 {
  55         if (!strncmp(str, "on", 2)) {
  56                 __supported_pte_mask |= _PAGE_NX;
  57                 do_not_nx = 0;
  58         } else if (!strncmp(str, "off", 3)) {
  59                 do_not_nx = 1;
  60                 __supported_pte_mask &= ~_PAGE_NX;
  61         }
  62         return 0;
  63 }
  64 __setup("noexec=", nonx_setup); /* parsed early actually */
  65
  66 int force_personality32 = READ_IMPLIES_EXEC;
  67
  68 /* noexec32=on|off
  69 Control non executable heap for 32bit processes.
  70 To control the stack too use noexec=off
  71
  72 on      PROT_READ does not imply PROT_EXEC for 32bit processes
  73 off     PROT_READ implies PROT_EXEC (default)
  74 */
  75 static int __init nonx32_setup(char *str)
  76 {
  77         if (!strcmp(str, "on"))
  78                 force_personality32 &= ~READ_IMPLIES_EXEC;
  79         else if (!strcmp(str, "off"))
  80                 force_personality32 |= READ_IMPLIES_EXEC;
  81         return 0;
  82 }
  83 __setup("noexec32=", nonx32_setup);
  84
  85 /*
  86  * Great future plan:
  87  * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
  88  * Always point %gs to its beginning
  89  */
  90 void __init setup_per_cpu_areas(void)
  91 {
  92         int i;
  93         unsigned long size;
  94
  95         /* Copy section for each CPU (we discard the original) */
  96         size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
  97 #ifdef CONFIG_MODULES
  98         if (size < PERCPU_ENOUGH_ROOM)
  99                 size = PERCPU_ENOUGH_ROOM;
 100 #endif
 101
 102         for (i = 0; i < NR_CPUS; i++) {
 103                 unsigned char *ptr;
 104
 105                 if (!NODE_DATA(cpu_to_node(i))) {
 106                         printk("cpu with no node %d, num_online_nodes %d\n",
 107                                i, num_online_nodes());
 108                         ptr = alloc_bootmem(size);
 109                 } else {
 110                         ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
 111                 }
 112                 if (!ptr)
 113                         panic("Cannot allocate cpu data for CPU %d\n", i);
 114                 cpu_pda[i].data_offset = ptr - __per_cpu_start;
 115                 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
 116         }
 117 }
 118
 119 void pda_init(int cpu)
 120 {
 121         struct x8664_pda *pda = &cpu_pda[cpu];
 122
 123         /* Setup up data that may be needed in __get_free_pages early */
 124         asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
 125         wrmsrl(MSR_GS_BASE, cpu_pda + cpu);
 126
 127         pda->me = pda;
 128         pda->cpunumber = cpu;
 129         pda->irqcount = -1;
 130         pda->kernelstack =
 131                 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
 132         pda->active_mm = &init_mm;
 133         pda->mmu_state = 0;
 134
 135         if (cpu == 0) {
 136                 /* others are initialized in smpboot.c */
 137                 pda->pcurrent = &init_task;
 138                 pda->irqstackptr = boot_cpu_stack;
 139         } else {
 140                 pda->irqstackptr = (char *)
 141                         __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
 142                 if (!pda->irqstackptr)
 143                         panic("cannot allocate irqstack for cpu %d", cpu);
 144         }
 145
 146         asm volatile("movq %0,%%cr3" :: "r" (__pa_symbol(&init_level4_pgt)));
 147
 148         pda->irqstackptr += IRQSTACKSIZE-64;
 149 }
 150
 151 char boot_exception_stacks[N_EXCEPTION_STACKS * EXCEPTION_STKSZ]
 152 __attribute__((section(".bss.page_aligned")));
 153
 154 /* May not be marked __init: used by software suspend */
 155 void syscall_init(void)
 156 {
 157         /*
 158          * LSTAR and STAR live in a bit strange symbiosis.
 159          * They both write to the same internal register. STAR allows to set CS/DS
 160          * but only a 32bit target. LSTAR sets the 64bit rip.
 161          */
 162         wrmsrl(MSR_STAR,  ((u64)__USER32_CS)<<48  | ((u64)__KERNEL_CS)<<32);
 163         wrmsrl(MSR_LSTAR, system_call);
 164
 165 #ifdef CONFIG_IA32_EMULATION
 166         syscall32_cpu_init ();
 167 #endif
 168
 169         /* Flags to clear on syscall */
 170         wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
 171 }
 172
 173 void __init check_efer(void)
 174 {
 175         unsigned long efer;
 176
 177         rdmsrl(MSR_EFER, efer);
 178         if (!(efer & EFER_NX) || do_not_nx) {
 179                 __supported_pte_mask &= ~_PAGE_NX;
 180         }
 181 }
 182
 183 /*
 184  * cpu_init() initializes state that is per-CPU. Some data is already
 185  * initialized (naturally) in the bootstrap process, such as the GDT
 186  * and IDT. We reload them nevertheless, this function acts as a
 187  * 'CPU state barrier', nothing should get across.
 188  * A lot of state is already set up in PDA init.
 189  */
 190 void __init cpu_init (void)
 191 {
 192 #ifdef CONFIG_SMP
 193         int cpu = stack_smp_processor_id();
 194 #else
 195         int cpu = smp_processor_id();
 196 #endif
 197         struct tss_struct *t = &per_cpu(init_tss, cpu);
 198         unsigned long v;
 199         char *estacks = NULL;
 200         struct task_struct *me;
 201         int i;
 202
 203         /* CPU 0 is initialised in head64.c */
 204         if (cpu != 0) {
 205                 pda_init(cpu);
 206         } else
 207                 estacks = boot_exception_stacks;
 208
 209         me = current;
 210
 211         if (cpu_test_and_set(cpu, cpu_initialized))
 212                 panic("CPU#%d already initialized!\n", cpu);
 213
 214         printk("Initializing CPU#%d\n", cpu);
 215
 216                 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
 217
 218         /*
 219          * Initialize the per-CPU GDT with the boot GDT,
 220          * and set up the GDT descriptor:
 221          */
 222         if (cpu) {
 223                 memcpy(cpu_gdt_table[cpu], cpu_gdt_table[0], GDT_SIZE);
 224         }
 225
 226         cpu_gdt_descr[cpu].size = GDT_SIZE;
 227         cpu_gdt_descr[cpu].address = (unsigned long)cpu_gdt_table[cpu];
 228         asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
 229         asm volatile("lidt %0" :: "m" (idt_descr));
 230
 231         memcpy(me->thread.tls_array, cpu_gdt_table[cpu], GDT_ENTRY_TLS_ENTRIES * 8);
 232
 233         /*
 234          * Delete NT
 235          */
 236
 237         asm volatile("pushfq ; popq %%rax ; btr $14,%%rax ; pushq %%rax ; popfq" ::: "eax");
 238
 239         syscall_init();
 240
 241         wrmsrl(MSR_FS_BASE, 0);
 242         wrmsrl(MSR_KERNEL_GS_BASE, 0);
 243         barrier();
 244
 245         check_efer();
 246
 247         /*
 248          * set up and load the per-CPU TSS
 249          */
 250         for (v = 0; v < N_EXCEPTION_STACKS; v++) {
 251                 if (cpu) {
 252                         estacks = (char *)__get_free_pages(GFP_ATOMIC,
 253                                                    EXCEPTION_STACK_ORDER);
 254                         if (!estacks)
 255                                 panic("Cannot allocate exception stack %ld %d\n",
 256                                       v, cpu);
 257                 }
 258                 estacks += EXCEPTION_STKSZ;
 259                 t->ist[v] = (unsigned long)estacks;
 260         }
 261
 262         t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
 263         /*
 264          * <= is required because the CPU will access up to
 265          * 8 bits beyond the end of the IO permission bitmap.
 266          */
 267         for (i = 0; i <= IO_BITMAP_LONGS; i++)
 268                 t->io_bitmap[i] = ~0UL;
 269
 270         atomic_inc(&init_mm.mm_count);
 271         me->active_mm = &init_mm;
 272         if (me->mm)
 273                 BUG();
 274         enter_lazy_tlb(&init_mm, me);
 275
 276         set_tss_desc(cpu, t);
 277         load_TR_desc();
 278         load_LDT(&init_mm.context);
 279
 280         /*
 281          * Clear all 6 debug registers:
 282          */
 283
 284         set_debug(0UL, 0);
 285         set_debug(0UL, 1);
 286         set_debug(0UL, 2);
 287         set_debug(0UL, 3);
 288         set_debug(0UL, 6);
 289         set_debug(0UL, 7);
 290
 291         fpu_init();
 292 }