arch/sh/boards/mpc1211/pci.c

   1 /*
   2  *      Low-Level PCI Support for the MPC-1211(CTP/PCI/MPC-SH02)
   3  *
   4  *  (c) 2002-2003 Saito.K & Jeanne
   5  *
   6  *  Dustin McIntire (dustin@sensoria.com)
   7  *      Derived from arch/i386/kernel/pci-*.c which bore the message:
   8  *      (c) 1999--2000 Martin Mares <mj@ucw.cz>
   9  *
  10  *  May be copied or modified under the terms of the GNU General Public
  11  *  License.  See linux/COPYING for more information.
  12  *
  13  */
  14 #include <linux/config.h>
  15 #include <linux/types.h>
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/delay.h>
  19 #include <linux/pci.h>
  20 #include <linux/sched.h>
  21 #include <linux/ioport.h>
  22 #include <linux/errno.h>
  23 #include <linux/irq.h>
  24 #include <linux/interrupt.h>
  25
  26 #include <asm/machvec.h>
  27 #include <asm/io.h>
  28 #include <asm/mpc1211/pci.h>
  29
  30 static struct resource mpcpci_io_resource = {
  31         "MPCPCI IO",
  32         0x00000000,
  33         0xffffffff,
  34         IORESOURCE_IO
  35 };
  36
  37 static struct resource mpcpci_mem_resource = {
  38         "MPCPCI mem",
  39         0x00000000,
  40         0xffffffff,
  41         IORESOURCE_MEM
  42 };
  43
  44 static struct pci_ops pci_direct_conf1;
  45 struct pci_channel board_pci_channels[] = {
  46         {&pci_direct_conf1, &mpcpci_io_resource, &mpcpci_mem_resource, 0, 256},
  47         {NULL, NULL, NULL, 0, 0},
  48 };
  49
  50 /*
  51  * Direct access to PCI hardware...
  52  */
  53
  54
  55 #define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
  56
  57 /*
  58  * Functions for accessing PCI configuration space with type 1 accesses
  59  */
  60 static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
  61 {
  62         u32 word;
  63         unsigned long flags;
  64
  65         /*
  66          * PCIPDR may only be accessed as 32 bit words,
  67          * so we must do byte alignment by hand
  68          */
  69         local_irq_save(flags);
  70         writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
  71         word = readl(PCIPDR);
  72         local_irq_restore(flags);
  73
  74         switch (size) {
  75         case 1:
  76                 switch (where & 0x3) {
  77                 case 3:
  78                         *value = (u8)(word >> 24);
  79                         break;
  80                 case 2:
  81                         *value = (u8)(word >> 16);
  82                         break;
  83                 case 1:
  84                         *value = (u8)(word >> 8);
  85                         break;
  86                 default:
  87                         *value = (u8)word;
  88                         break;
  89                 }
  90                 break;
  91         case 2:
  92                 switch (where & 0x3) {
  93                 case 3:
  94                         *value = (u16)(word >> 24);
  95                         local_irq_save(flags);
  96                         writel(CONFIG_CMD(bus,devfn,(where+1)), PCIPAR);
  97                         word = readl(PCIPDR);
  98                         local_irq_restore(flags);
  99                         *value |= ((word & 0xff) << 8);
 100                         break;
 101                 case 2:
 102                         *value = (u16)(word >> 16);
 103                         break;
 104                 case 1:
 105                         *value = (u16)(word >> 8);
 106                         break;
 107                 default:
 108                         *value = (u16)word;
 109                         break;
 110                 }
 111                 break;
 112         case 4:
 113                 *value = word;
 114                 break;
 115         }
 116         PCIDBG(4,"pci_conf1_read@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),*value);
 117         return PCIBIOS_SUCCESSFUL;
 118 }
 119
 120 /*
 121  * Since MPC-1211 only does 32bit access we'll have to do a read,mask,write operation.
 122  * We'll allow an odd byte offset, though it should be illegal.
 123  */
 124 static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
 125 {
 126         u32 word,mask = 0;
 127         unsigned long flags;
 128         u32 shift = (where & 3) * 8;
 129
 130         if(size == 1) {
 131                 mask = ((1 << 8) - 1) << shift;  // create the byte mask
 132         } else if(size == 2){
 133                 if(shift == 24)
 134                         return PCIBIOS_BAD_REGISTER_NUMBER;
 135                 mask = ((1 << 16) - 1) << shift;  // create the word mask
 136         }
 137         local_irq_save(flags);
 138         writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
 139         if(size == 4){
 140                 writel(value, PCIPDR);
 141                 local_irq_restore(flags);
 142                 PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),value);
 143                 return PCIBIOS_SUCCESSFUL;
 144         }
 145         word = readl(PCIPDR);
 146         word &= ~mask;
 147         word |= ((value << shift) & mask);
 148         writel(word, PCIPDR);
 149         local_irq_restore(flags);
 150         PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),word);
 151         return PCIBIOS_SUCCESSFUL;
 152 }
 153
 154 #undef CONFIG_CMD
 155
 156 static struct pci_ops pci_direct_conf1 = {
 157         .read =         pci_conf1_read,
 158         .write =        pci_conf1_write,
 159 };
 160
 161 static void __devinit quirk_ali_ide_ports(struct pci_dev *dev)
 162 {
 163         dev->resource[0].start = 0x1f0;
 164         dev->resource[0].end   = 0x1f7;
 165         dev->resource[0].flags = IORESOURCE_IO;
 166         dev->resource[1].start = 0x3f6;
 167         dev->resource[1].end   = 0x3f6;
 168         dev->resource[1].flags = IORESOURCE_IO;
 169         dev->resource[2].start = 0x170;
 170         dev->resource[2].end   = 0x177;
 171         dev->resource[2].flags = IORESOURCE_IO;
 172         dev->resource[3].start = 0x376;
 173         dev->resource[3].end   = 0x376;
 174         dev->resource[3].flags = IORESOURCE_IO;
 175         dev->resource[4].start = 0xf000;
 176         dev->resource[4].end   = 0xf00f;
 177         dev->resource[4].flags = IORESOURCE_IO;
 178 }
 179 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports);
 180
 181 char * __devinit pcibios_setup(char *str)
 182 {
 183         return str;
 184 }
 185
 186 /*
 187  *  Called after each bus is probed, but before its children
 188  *  are examined.
 189  */
 190
 191 void __init pcibios_fixup_bus(struct pci_bus *b)
 192 {
 193         pci_read_bridge_bases(b);
 194 }
 195
 196 /*
 197  *      IRQ functions
 198  */
 199 static inline u8 bridge_swizzle(u8 pin, u8 slot)
 200 {
 201         return (((pin-1) + slot) % 4) + 1;
 202 }
 203
 204 static inline u8 bridge_swizzle_pci_1(u8 pin, u8 slot)
 205 {
 206         return (((pin-1) - slot) & 3) + 1;
 207 }
 208
 209 static u8 __init mpc1211_swizzle(struct pci_dev *dev, u8 *pinp)
 210 {
 211         unsigned long flags;
 212         u8 pin = *pinp;
 213         u32 word;
 214
 215         for ( ; dev->bus->self; dev = dev->bus->self) {
 216                 if (!pin)
 217                         continue;
 218
 219                 if (dev->bus->number == 1) {
 220                         local_irq_save(flags);
 221                         writel(0x80000000 | 0x2c, PCIPAR);
 222                         word = readl(PCIPDR);
 223                         local_irq_restore(flags);
 224                         word >>= 16;
 225
 226                         if (word == 0x0001)
 227                                 pin = bridge_swizzle_pci_1(pin, PCI_SLOT(dev->devfn));
 228                         else
 229                                 pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
 230                 } else
 231                         pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
 232         }
 233
 234         *pinp = pin;
 235
 236         return PCI_SLOT(dev->devfn);
 237 }
 238
 239 static int __init map_mpc1211_irq(struct pci_dev *dev, u8 slot, u8 pin)
 240 {
 241         int irq = -1;
 242
 243         /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */
 244         if (dev->bus->number == 0) {
 245                 switch (slot) {
 246                 case 13:   irq =  9; break;   /* USB */
 247                 case 22:   irq = 10; break;   /* LAN */
 248                 default:   irq =  0; break;
 249                 }
 250         } else {
 251                 switch (pin) {
 252                 case 0:   irq =  0; break;
 253                 case 1:   irq =  7; break;
 254                 case 2:   irq =  9; break;
 255                 case 3:   irq = 10; break;
 256                 case 4:   irq = 11; break;
 257                 }
 258         }
 259
 260         if( irq < 0 ) {
 261                 PCIDBG(3, "PCI: Error mapping IRQ on device %s\n", pci_name(dev));
 262                 return irq;
 263         }
 264
 265         PCIDBG(2, "Setting IRQ for slot %s to %d\n", pci_name(dev), irq);
 266
 267         return irq;
 268 }
 269
 270 void __init pcibios_fixup_irqs(void)
 271 {
 272         pci_fixup_irqs(mpc1211_swizzle, map_mpc1211_irq);
 273 }
 274
 275 void pcibios_align_resource(void *data, struct resource *res,
 276                             unsigned long size, unsigned long align)
 277 {
 278         unsigned long start = res->start;
 279
 280         if (res->flags & IORESOURCE_IO) {
 281                 if (start >= 0x10000UL) {
 282                         if ((start & 0xffffUL) < 0x4000UL) {
 283                                 start = (start & 0xffff0000UL) + 0x4000UL;
 284                         } else if ((start & 0xffffUL) >= 0xf000UL) {
 285                                 start = (start & 0xffff0000UL) + 0x10000UL;
 286                         }
 287                         res->start = start;
 288                 } else {
 289                         if (start & 0x300) {
 290                                 start = (start + 0x3ff) & ~0x3ff;
 291                                 res->start = start;
 292                         }
 293                 }
 294         }
 295 }
 296