arch/i386/kernel/time_hpet.c

   1 /*
   2  *  linux/arch/i386/kernel/time_hpet.c
   3  *  This code largely copied from arch/x86_64/kernel/time.c
   4  *  See that file for credits.
   5  *
   6  *  2003-06-30    Venkatesh Pallipadi - Additional changes for HPET support
   7  */
   8
   9 #include <linux/errno.h>
  10 #include <linux/kernel.h>
  11 #include <linux/param.h>
  12 #include <linux/string.h>
  13 #include <linux/init.h>
  14 #include <linux/smp.h>
  15
  16 #include <asm/timer.h>
  17 #include <asm/fixmap.h>
  18 #include <asm/apic.h>
  19
  20 #include <linux/timex.h>
  21 #include <linux/config.h>
  22
  23 #include <asm/hpet.h>
  24 #include <linux/hpet.h>
  25
  26 static unsigned long hpet_period;       /* fsecs / HPET clock */
  27 unsigned long hpet_tick;                /* hpet clks count per tick */
  28 unsigned long hpet_address;             /* hpet memory map physical address */
  29
  30 static int use_hpet;            /* can be used for runtime check of hpet */
  31 static int boot_hpet_disable;   /* boottime override for HPET timer */
  32 static void __iomem * hpet_virt_address;        /* hpet kernel virtual address */
  33
  34 #define FSEC_TO_USEC (1000000000UL)
  35
  36 int hpet_readl(unsigned long a)
  37 {
  38         return readl(hpet_virt_address + a);
  39 }
  40
  41 static void hpet_writel(unsigned long d, unsigned long a)
  42 {
  43         writel(d, hpet_virt_address + a);
  44 }
  45
  46 #ifdef CONFIG_X86_LOCAL_APIC
  47 /*
  48  * HPET counters dont wrap around on every tick. They just change the
  49  * comparator value and continue. Next tick can be caught by checking
  50  * for a change in the comparator value. Used in apic.c.
  51  */
  52 static void __init wait_hpet_tick(void)
  53 {
  54         unsigned int start_cmp_val, end_cmp_val;
  55
  56         start_cmp_val = hpet_readl(HPET_T0_CMP);
  57         do {
  58                 end_cmp_val = hpet_readl(HPET_T0_CMP);
  59         } while (start_cmp_val == end_cmp_val);
  60 }
  61 #endif
  62
  63 static int hpet_timer_stop_set_go(unsigned long tick)
  64 {
  65         unsigned int cfg;
  66
  67         /*
  68          * Stop the timers and reset the main counter.
  69          */
  70         cfg = hpet_readl(HPET_CFG);
  71         cfg &= ~HPET_CFG_ENABLE;
  72         hpet_writel(cfg, HPET_CFG);
  73         hpet_writel(0, HPET_COUNTER);
  74         hpet_writel(0, HPET_COUNTER + 4);
  75
  76         /*
  77          * Set up timer 0, as periodic with first interrupt to happen at
  78          * hpet_tick, and period also hpet_tick.
  79          */
  80         cfg = hpet_readl(HPET_T0_CFG);
  81         cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
  82                HPET_TN_SETVAL | HPET_TN_32BIT;
  83         hpet_writel(cfg, HPET_T0_CFG);
  84
  85         /*
  86          * The first write after writing TN_SETVAL to the config register sets
  87          * the counter value, the second write sets the threshold.
  88          */
  89         hpet_writel(tick, HPET_T0_CMP);
  90         hpet_writel(tick, HPET_T0_CMP);
  91
  92         /*
  93          * Go!
  94          */
  95         cfg = hpet_readl(HPET_CFG);
  96         cfg |= HPET_CFG_ENABLE | HPET_CFG_LEGACY;
  97         hpet_writel(cfg, HPET_CFG);
  98
  99         return 0;
 100 }
 101
 102 /*
 103  * Check whether HPET was found by ACPI boot parse. If yes setup HPET
 104  * counter 0 for kernel base timer.
 105  */
 106 int __init hpet_enable(void)
 107 {
 108         unsigned int id;
 109         unsigned long tick_fsec_low, tick_fsec_high; /* tick in femto sec */
 110         unsigned long hpet_tick_rem;
 111
 112         if (boot_hpet_disable)
 113                 return -1;
 114
 115         if (!hpet_address) {
 116                 return -1;
 117         }
 118         hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
 119         /*
 120          * Read the period, compute tick and quotient.
 121          */
 122         id = hpet_readl(HPET_ID);
 123
 124         /*
 125          * We are checking for value '1' or more in number field if
 126          * CONFIG_HPET_EMULATE_RTC is set because we will need an
 127          * additional timer for RTC emulation.
 128          * However, we can do with one timer otherwise using the
 129          * the single HPET timer for system time.
 130          */
 131         if (
 132 #ifdef CONFIG_HPET_EMULATE_RTC
 133                 !(id & HPET_ID_NUMBER) ||
 134 #endif
 135             !(id & HPET_ID_LEGSUP))
 136                 return -1;
 137
 138         hpet_period = hpet_readl(HPET_PERIOD);
 139         if ((hpet_period < HPET_MIN_PERIOD) || (hpet_period > HPET_MAX_PERIOD))
 140                 return -1;
 141
 142         /*
 143          * 64 bit math
 144          * First changing tick into fsec
 145          * Then 64 bit div to find number of hpet clk per tick
 146          */
 147         ASM_MUL64_REG(tick_fsec_low, tick_fsec_high,
 148                         KERNEL_TICK_USEC, FSEC_TO_USEC);
 149         ASM_DIV64_REG(hpet_tick, hpet_tick_rem,
 150                         hpet_period, tick_fsec_low, tick_fsec_high);
 151
 152         if (hpet_tick_rem > (hpet_period >> 1))
 153                 hpet_tick++; /* rounding the result */
 154
 155         if (hpet_timer_stop_set_go(hpet_tick))
 156                 return -1;
 157
 158         use_hpet = 1;
 159
 160 #ifdef  CONFIG_HPET
 161         {
 162                 struct hpet_data        hd;
 163                 unsigned int            ntimer;
 164
 165                 memset(&hd, 0, sizeof (hd));
 166
 167                 ntimer = hpet_readl(HPET_ID);
 168                 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
 169                 ntimer++;
 170
 171                 /*
 172                  * Register with driver.
 173                  * Timer0 and Timer1 is used by platform.
 174                  */
 175                 hd.hd_phys_address = hpet_address;
 176                 hd.hd_address = hpet_virt_address;
 177                 hd.hd_nirqs = ntimer;
 178                 hd.hd_flags = HPET_DATA_PLATFORM;
 179                 hpet_reserve_timer(&hd, 0);
 180 #ifdef  CONFIG_HPET_EMULATE_RTC
 181                 hpet_reserve_timer(&hd, 1);
 182 #endif
 183                 hd.hd_irq[0] = HPET_LEGACY_8254;
 184                 hd.hd_irq[1] = HPET_LEGACY_RTC;
 185                 if (ntimer > 2) {
 186                         struct hpet __iomem     *hpet;
 187                         struct hpet_timer __iomem *timer;
 188                         int                     i;
 189
 190                         hpet = hpet_virt_address;
 191
 192                         for (i = 2, timer = &hpet->hpet_timers[2]; i < ntimer;
 193                                 timer++, i++)
 194                                 hd.hd_irq[i] = (timer->hpet_config &
 195                                         Tn_INT_ROUTE_CNF_MASK) >>
 196                                         Tn_INT_ROUTE_CNF_SHIFT;
 197
 198                 }
 199
 200                 hpet_alloc(&hd);
 201         }
 202 #endif
 203
 204 #ifdef CONFIG_X86_LOCAL_APIC
 205         wait_timer_tick = wait_hpet_tick;
 206 #endif
 207         return 0;
 208 }
 209
 210 int hpet_reenable(void)
 211 {
 212         return hpet_timer_stop_set_go(hpet_tick);
 213 }
 214
 215 int is_hpet_enabled(void)
 216 {
 217         return use_hpet;
 218 }
 219
 220 int is_hpet_capable(void)
 221 {
 222         if (!boot_hpet_disable && hpet_address)
 223                 return 1;
 224         return 0;
 225 }
 226
 227 static int __init hpet_setup(char* str)
 228 {
 229         if (str) {
 230                 if (!strncmp("disable", str, 7))
 231                         boot_hpet_disable = 1;
 232         }
 233         return 1;
 234 }
 235
 236 __setup("hpet=", hpet_setup);
 237
 238 #ifdef CONFIG_HPET_EMULATE_RTC
 239 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
 240  * is enabled, we support RTC interrupt functionality in software.
 241  * RTC has 3 kinds of interrupts:
 242  * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
 243  *    is updated
 244  * 2) Alarm Interrupt - generate an interrupt at a specific time of day
 245  * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
 246  *    2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
 247  * (1) and (2) above are implemented using polling at a frequency of
 248  * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
 249  * overhead. (DEFAULT_RTC_INT_FREQ)
 250  * For (3), we use interrupts at 64Hz or user specified periodic
 251  * frequency, whichever is higher.
 252  */
 253 #include <linux/mc146818rtc.h>
 254 #include <linux/rtc.h>
 255
 256 extern irqreturn_t rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
 257
 258 #define DEFAULT_RTC_INT_FREQ    64
 259 #define RTC_NUM_INTS            1
 260
 261 static unsigned long UIE_on;
 262 static unsigned long prev_update_sec;
 263
 264 static unsigned long AIE_on;
 265 static struct rtc_time alarm_time;
 266
 267 static unsigned long PIE_on;
 268 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
 269 static unsigned long PIE_count;
 270
 271 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
 272
 273 /*
 274  * Timer 1 for RTC, we do not use periodic interrupt feature,
 275  * even if HPET supports periodic interrupts on Timer 1.
 276  * The reason being, to set up a periodic interrupt in HPET, we need to
 277  * stop the main counter. And if we do that everytime someone diables/enables
 278  * RTC, we will have adverse effect on main kernel timer running on Timer 0.
 279  * So, for the time being, simulate the periodic interrupt in software.
 280  *
 281  * hpet_rtc_timer_init() is called for the first time and during subsequent
 282  * interuppts reinit happens through hpet_rtc_timer_reinit().
 283  */
 284 int hpet_rtc_timer_init(void)
 285 {
 286         unsigned int cfg, cnt;
 287         unsigned long flags;
 288
 289         if (!is_hpet_enabled())
 290                 return 0;
 291         /*
 292          * Set the counter 1 and enable the interrupts.
 293          */
 294         if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
 295                 hpet_rtc_int_freq = PIE_freq;
 296         else
 297                 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
 298
 299         local_irq_save(flags);
 300         cnt = hpet_readl(HPET_COUNTER);
 301         cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
 302         hpet_writel(cnt, HPET_T1_CMP);
 303         local_irq_restore(flags);
 304
 305         cfg = hpet_readl(HPET_T1_CFG);
 306         cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
 307         hpet_writel(cfg, HPET_T1_CFG);
 308
 309         return 1;
 310 }
 311
 312 static void hpet_rtc_timer_reinit(void)
 313 {
 314         unsigned int cfg, cnt;
 315
 316         if (!(PIE_on | AIE_on | UIE_on))
 317                 return;
 318
 319         if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
 320                 hpet_rtc_int_freq = PIE_freq;
 321         else
 322                 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
 323
 324         /* It is more accurate to use the comparator value than current count.*/
 325         cnt = hpet_readl(HPET_T1_CMP);
 326         cnt += hpet_tick*HZ/hpet_rtc_int_freq;
 327         hpet_writel(cnt, HPET_T1_CMP);
 328
 329         cfg = hpet_readl(HPET_T1_CFG);
 330         cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
 331         hpet_writel(cfg, HPET_T1_CFG);
 332
 333         return;
 334 }
 335
 336 /*
 337  * The functions below are called from rtc driver.
 338  * Return 0 if HPET is not being used.
 339  * Otherwise do the necessary changes and return 1.
 340  */
 341 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
 342 {
 343         if (!is_hpet_enabled())
 344                 return 0;
 345
 346         if (bit_mask & RTC_UIE)
 347                 UIE_on = 0;
 348         if (bit_mask & RTC_PIE)
 349                 PIE_on = 0;
 350         if (bit_mask & RTC_AIE)
 351                 AIE_on = 0;
 352
 353         return 1;
 354 }
 355
 356 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
 357 {
 358         int timer_init_reqd = 0;
 359
 360         if (!is_hpet_enabled())
 361                 return 0;
 362
 363         if (!(PIE_on | AIE_on | UIE_on))
 364                 timer_init_reqd = 1;
 365
 366         if (bit_mask & RTC_UIE) {
 367                 UIE_on = 1;
 368         }
 369         if (bit_mask & RTC_PIE) {
 370                 PIE_on = 1;
 371                 PIE_count = 0;
 372         }
 373         if (bit_mask & RTC_AIE) {
 374                 AIE_on = 1;
 375         }
 376
 377         if (timer_init_reqd)
 378                 hpet_rtc_timer_init();
 379
 380         return 1;
 381 }
 382
 383 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
 384 {
 385         if (!is_hpet_enabled())
 386                 return 0;
 387
 388         alarm_time.tm_hour = hrs;
 389         alarm_time.tm_min = min;
 390         alarm_time.tm_sec = sec;
 391
 392         return 1;
 393 }
 394
 395 int hpet_set_periodic_freq(unsigned long freq)
 396 {
 397         if (!is_hpet_enabled())
 398                 return 0;
 399
 400         PIE_freq = freq;
 401         PIE_count = 0;
 402
 403         return 1;
 404 }
 405
 406 int hpet_rtc_dropped_irq(void)
 407 {
 408         if (!is_hpet_enabled())
 409                 return 0;
 410
 411         return 1;
 412 }
 413
 414 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 415 {
 416         struct rtc_time curr_time;
 417         unsigned long rtc_int_flag = 0;
 418         int call_rtc_interrupt = 0;
 419
 420         hpet_rtc_timer_reinit();
 421
 422         if (UIE_on | AIE_on) {
 423                 rtc_get_rtc_time(&curr_time);
 424         }
 425         if (UIE_on) {
 426                 if (curr_time.tm_sec != prev_update_sec) {
 427                         /* Set update int info, call real rtc int routine */
 428                         call_rtc_interrupt = 1;
 429                         rtc_int_flag = RTC_UF;
 430                         prev_update_sec = curr_time.tm_sec;
 431                 }
 432         }
 433         if (PIE_on) {
 434                 PIE_count++;
 435                 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
 436                         /* Set periodic int info, call real rtc int routine */
 437                         call_rtc_interrupt = 1;
 438                         rtc_int_flag |= RTC_PF;
 439                         PIE_count = 0;
 440                 }
 441         }
 442         if (AIE_on) {
 443                 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
 444                     (curr_time.tm_min == alarm_time.tm_min) &&
 445                     (curr_time.tm_hour == alarm_time.tm_hour)) {
 446                         /* Set alarm int info, call real rtc int routine */
 447                         call_rtc_interrupt = 1;
 448                         rtc_int_flag |= RTC_AF;
 449                 }
 450         }
 451         if (call_rtc_interrupt) {
 452                 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
 453                 rtc_interrupt(rtc_int_flag, dev_id, regs);
 454         }
 455         return IRQ_HANDLED;
 456 }
 457 #endif
 458