1 /* i830_dma.c -- DMA support for the I830 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 * Abraham vd Merwe <abraham@2d3d.co.za>
38 #include <linux/interrupt.h> /* For task queue support */
39 #include <linux/smp_lock.h>
40 #include <linux/pagemap.h>
41 #include <linux/delay.h>
42 #include <linux/slab.h>
43 #include <asm/uaccess.h>
45 #define I830_BUF_FREE 2
46 #define I830_BUF_CLIENT 1
47 #define I830_BUF_HARDWARE 0
49 #define I830_BUF_UNMAPPED 0
50 #define I830_BUF_MAPPED 1
52 static struct drm_buf
*i830_freelist_get(struct drm_device
* dev
)
54 struct drm_device_dma
*dma
= dev
->dma
;
58 /* Linear search might not be the best solution */
60 for (i
= 0; i
< dma
->buf_count
; i
++) {
61 struct drm_buf
*buf
= dma
->buflist
[i
];
62 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
63 /* In use is already a pointer */
64 used
= cmpxchg(buf_priv
->in_use
, I830_BUF_FREE
,
66 if (used
== I830_BUF_FREE
)
72 /* This should only be called if the buffer is not sent to the hardware
73 * yet, the hardware updates in use for us once its on the ring buffer.
76 static int i830_freelist_put(struct drm_device
*dev
, struct drm_buf
*buf
)
78 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
81 /* In use is already a pointer */
82 used
= cmpxchg(buf_priv
->in_use
, I830_BUF_CLIENT
, I830_BUF_FREE
);
83 if (used
!= I830_BUF_CLIENT
) {
84 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf
->idx
);
91 static int i830_mmap_buffers(struct file
*filp
, struct vm_area_struct
*vma
)
93 struct drm_file
*priv
= filp
->private_data
;
94 struct drm_device
*dev
;
95 drm_i830_private_t
*dev_priv
;
97 drm_i830_buf_priv_t
*buf_priv
;
100 dev
= priv
->minor
->dev
;
101 dev_priv
= dev
->dev_private
;
102 buf
= dev_priv
->mmap_buffer
;
103 buf_priv
= buf
->dev_private
;
105 vma
->vm_flags
|= (VM_IO
| VM_DONTCOPY
);
108 buf_priv
->currently_mapped
= I830_BUF_MAPPED
;
111 if (io_remap_pfn_range(vma
, vma
->vm_start
,
113 vma
->vm_end
- vma
->vm_start
, vma
->vm_page_prot
))
118 static const struct file_operations i830_buffer_fops
= {
120 .release
= drm_release
,
121 .unlocked_ioctl
= i830_ioctl
,
122 .mmap
= i830_mmap_buffers
,
123 .fasync
= drm_fasync
,
126 static int i830_map_buffer(struct drm_buf
*buf
, struct drm_file
*file_priv
)
128 struct drm_device
*dev
= file_priv
->minor
->dev
;
129 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
130 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
131 const struct file_operations
*old_fops
;
132 unsigned long virtual;
135 if (buf_priv
->currently_mapped
== I830_BUF_MAPPED
)
138 down_write(¤t
->mm
->mmap_sem
);
139 old_fops
= file_priv
->filp
->f_op
;
140 file_priv
->filp
->f_op
= &i830_buffer_fops
;
141 dev_priv
->mmap_buffer
= buf
;
142 virtual = do_mmap(file_priv
->filp
, 0, buf
->total
, PROT_READ
| PROT_WRITE
,
143 MAP_SHARED
, buf
->bus_address
);
144 dev_priv
->mmap_buffer
= NULL
;
145 file_priv
->filp
->f_op
= old_fops
;
146 if (IS_ERR((void *)virtual)) { /* ugh */
148 DRM_ERROR("mmap error\n");
149 retcode
= PTR_ERR((void *)virtual);
150 buf_priv
->virtual = NULL
;
152 buf_priv
->virtual = (void __user
*)virtual;
154 up_write(¤t
->mm
->mmap_sem
);
159 static int i830_unmap_buffer(struct drm_buf
*buf
)
161 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
164 if (buf_priv
->currently_mapped
!= I830_BUF_MAPPED
)
167 down_write(¤t
->mm
->mmap_sem
);
168 retcode
= do_munmap(current
->mm
,
169 (unsigned long)buf_priv
->virtual,
170 (size_t) buf
->total
);
171 up_write(¤t
->mm
->mmap_sem
);
173 buf_priv
->currently_mapped
= I830_BUF_UNMAPPED
;
174 buf_priv
->virtual = NULL
;
179 static int i830_dma_get_buffer(struct drm_device
*dev
, drm_i830_dma_t
*d
,
180 struct drm_file
*file_priv
)
183 drm_i830_buf_priv_t
*buf_priv
;
186 buf
= i830_freelist_get(dev
);
189 DRM_DEBUG("retcode=%d\n", retcode
);
193 retcode
= i830_map_buffer(buf
, file_priv
);
195 i830_freelist_put(dev
, buf
);
196 DRM_ERROR("mapbuf failed, retcode %d\n", retcode
);
199 buf
->file_priv
= file_priv
;
200 buf_priv
= buf
->dev_private
;
202 d
->request_idx
= buf
->idx
;
203 d
->request_size
= buf
->total
;
204 d
->virtual = buf_priv
->virtual;
209 static int i830_dma_cleanup(struct drm_device
*dev
)
211 struct drm_device_dma
*dma
= dev
->dma
;
213 /* Make sure interrupts are disabled here because the uninstall ioctl
214 * may not have been called from userspace and after dev_private
215 * is freed, it's too late.
217 if (dev
->irq_enabled
)
218 drm_irq_uninstall(dev
);
220 if (dev
->dev_private
) {
222 drm_i830_private_t
*dev_priv
=
223 (drm_i830_private_t
*) dev
->dev_private
;
225 if (dev_priv
->ring
.virtual_start
)
226 drm_core_ioremapfree(&dev_priv
->ring
.map
, dev
);
227 if (dev_priv
->hw_status_page
) {
228 pci_free_consistent(dev
->pdev
, PAGE_SIZE
,
229 dev_priv
->hw_status_page
,
230 dev_priv
->dma_status_page
);
231 /* Need to rewrite hardware status page */
232 I830_WRITE(0x02080, 0x1ffff000);
235 kfree(dev
->dev_private
);
236 dev
->dev_private
= NULL
;
238 for (i
= 0; i
< dma
->buf_count
; i
++) {
239 struct drm_buf
*buf
= dma
->buflist
[i
];
240 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
241 if (buf_priv
->kernel_virtual
&& buf
->total
)
242 drm_core_ioremapfree(&buf_priv
->map
, dev
);
248 int i830_wait_ring(struct drm_device
*dev
, int n
, const char *caller
)
250 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
251 drm_i830_ring_buffer_t
*ring
= &(dev_priv
->ring
);
254 unsigned int last_head
= I830_READ(LP_RING
+ RING_HEAD
) & HEAD_ADDR
;
256 end
= jiffies
+ (HZ
* 3);
257 while (ring
->space
< n
) {
258 ring
->head
= I830_READ(LP_RING
+ RING_HEAD
) & HEAD_ADDR
;
259 ring
->space
= ring
->head
- (ring
->tail
+ 8);
261 ring
->space
+= ring
->Size
;
263 if (ring
->head
!= last_head
) {
264 end
= jiffies
+ (HZ
* 3);
265 last_head
= ring
->head
;
269 if (time_before(end
, jiffies
)) {
270 DRM_ERROR("space: %d wanted %d\n", ring
->space
, n
);
271 DRM_ERROR("lockup\n");
275 dev_priv
->sarea_priv
->perf_boxes
|= I830_BOX_WAIT
;
282 static void i830_kernel_lost_context(struct drm_device
*dev
)
284 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
285 drm_i830_ring_buffer_t
*ring
= &(dev_priv
->ring
);
287 ring
->head
= I830_READ(LP_RING
+ RING_HEAD
) & HEAD_ADDR
;
288 ring
->tail
= I830_READ(LP_RING
+ RING_TAIL
) & TAIL_ADDR
;
289 ring
->space
= ring
->head
- (ring
->tail
+ 8);
291 ring
->space
+= ring
->Size
;
293 if (ring
->head
== ring
->tail
)
294 dev_priv
->sarea_priv
->perf_boxes
|= I830_BOX_RING_EMPTY
;
297 static int i830_freelist_init(struct drm_device
*dev
, drm_i830_private_t
*dev_priv
)
299 struct drm_device_dma
*dma
= dev
->dma
;
301 u32
*hw_status
= (u32
*) (dev_priv
->hw_status_page
+ my_idx
);
304 if (dma
->buf_count
> 1019) {
305 /* Not enough space in the status page for the freelist */
309 for (i
= 0; i
< dma
->buf_count
; i
++) {
310 struct drm_buf
*buf
= dma
->buflist
[i
];
311 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
313 buf_priv
->in_use
= hw_status
++;
314 buf_priv
->my_use_idx
= my_idx
;
317 *buf_priv
->in_use
= I830_BUF_FREE
;
319 buf_priv
->map
.offset
= buf
->bus_address
;
320 buf_priv
->map
.size
= buf
->total
;
321 buf_priv
->map
.type
= _DRM_AGP
;
322 buf_priv
->map
.flags
= 0;
323 buf_priv
->map
.mtrr
= 0;
325 drm_core_ioremap(&buf_priv
->map
, dev
);
326 buf_priv
->kernel_virtual
= buf_priv
->map
.handle
;
331 static int i830_dma_initialize(struct drm_device
*dev
,
332 drm_i830_private_t
*dev_priv
,
333 drm_i830_init_t
*init
)
335 struct drm_map_list
*r_list
;
337 memset(dev_priv
, 0, sizeof(drm_i830_private_t
));
339 list_for_each_entry(r_list
, &dev
->maplist
, head
) {
341 r_list
->map
->type
== _DRM_SHM
&&
342 r_list
->map
->flags
& _DRM_CONTAINS_LOCK
) {
343 dev_priv
->sarea_map
= r_list
->map
;
348 if (!dev_priv
->sarea_map
) {
349 dev
->dev_private
= (void *)dev_priv
;
350 i830_dma_cleanup(dev
);
351 DRM_ERROR("can not find sarea!\n");
354 dev_priv
->mmio_map
= drm_core_findmap(dev
, init
->mmio_offset
);
355 if (!dev_priv
->mmio_map
) {
356 dev
->dev_private
= (void *)dev_priv
;
357 i830_dma_cleanup(dev
);
358 DRM_ERROR("can not find mmio map!\n");
361 dev
->agp_buffer_token
= init
->buffers_offset
;
362 dev
->agp_buffer_map
= drm_core_findmap(dev
, init
->buffers_offset
);
363 if (!dev
->agp_buffer_map
) {
364 dev
->dev_private
= (void *)dev_priv
;
365 i830_dma_cleanup(dev
);
366 DRM_ERROR("can not find dma buffer map!\n");
370 dev_priv
->sarea_priv
= (drm_i830_sarea_t
*)
371 ((u8
*) dev_priv
->sarea_map
->handle
+ init
->sarea_priv_offset
);
373 dev_priv
->ring
.Start
= init
->ring_start
;
374 dev_priv
->ring
.End
= init
->ring_end
;
375 dev_priv
->ring
.Size
= init
->ring_size
;
377 dev_priv
->ring
.map
.offset
= dev
->agp
->base
+ init
->ring_start
;
378 dev_priv
->ring
.map
.size
= init
->ring_size
;
379 dev_priv
->ring
.map
.type
= _DRM_AGP
;
380 dev_priv
->ring
.map
.flags
= 0;
381 dev_priv
->ring
.map
.mtrr
= 0;
383 drm_core_ioremap(&dev_priv
->ring
.map
, dev
);
385 if (dev_priv
->ring
.map
.handle
== NULL
) {
386 dev
->dev_private
= (void *)dev_priv
;
387 i830_dma_cleanup(dev
);
388 DRM_ERROR("can not ioremap virtual address for"
393 dev_priv
->ring
.virtual_start
= dev_priv
->ring
.map
.handle
;
395 dev_priv
->ring
.tail_mask
= dev_priv
->ring
.Size
- 1;
397 dev_priv
->w
= init
->w
;
398 dev_priv
->h
= init
->h
;
399 dev_priv
->pitch
= init
->pitch
;
400 dev_priv
->back_offset
= init
->back_offset
;
401 dev_priv
->depth_offset
= init
->depth_offset
;
402 dev_priv
->front_offset
= init
->front_offset
;
404 dev_priv
->front_di1
= init
->front_offset
| init
->pitch_bits
;
405 dev_priv
->back_di1
= init
->back_offset
| init
->pitch_bits
;
406 dev_priv
->zi1
= init
->depth_offset
| init
->pitch_bits
;
408 DRM_DEBUG("front_di1 %x\n", dev_priv
->front_di1
);
409 DRM_DEBUG("back_offset %x\n", dev_priv
->back_offset
);
410 DRM_DEBUG("back_di1 %x\n", dev_priv
->back_di1
);
411 DRM_DEBUG("pitch_bits %x\n", init
->pitch_bits
);
413 dev_priv
->cpp
= init
->cpp
;
414 /* We are using separate values as placeholders for mechanisms for
415 * private backbuffer/depthbuffer usage.
418 dev_priv
->back_pitch
= init
->back_pitch
;
419 dev_priv
->depth_pitch
= init
->depth_pitch
;
420 dev_priv
->do_boxes
= 0;
421 dev_priv
->use_mi_batchbuffer_start
= 0;
423 /* Program Hardware Status Page */
424 dev_priv
->hw_status_page
=
425 pci_alloc_consistent(dev
->pdev
, PAGE_SIZE
,
426 &dev_priv
->dma_status_page
);
427 if (!dev_priv
->hw_status_page
) {
428 dev
->dev_private
= (void *)dev_priv
;
429 i830_dma_cleanup(dev
);
430 DRM_ERROR("Can not allocate hardware status page\n");
433 memset(dev_priv
->hw_status_page
, 0, PAGE_SIZE
);
434 DRM_DEBUG("hw status page @ %p\n", dev_priv
->hw_status_page
);
436 I830_WRITE(0x02080, dev_priv
->dma_status_page
);
437 DRM_DEBUG("Enabled hardware status page\n");
439 /* Now we need to init our freelist */
440 if (i830_freelist_init(dev
, dev_priv
) != 0) {
441 dev
->dev_private
= (void *)dev_priv
;
442 i830_dma_cleanup(dev
);
443 DRM_ERROR("Not enough space in the status page for"
447 dev
->dev_private
= (void *)dev_priv
;
452 static int i830_dma_init(struct drm_device
*dev
, void *data
,
453 struct drm_file
*file_priv
)
455 drm_i830_private_t
*dev_priv
;
456 drm_i830_init_t
*init
= data
;
459 switch (init
->func
) {
461 dev_priv
= kmalloc(sizeof(drm_i830_private_t
), GFP_KERNEL
);
462 if (dev_priv
== NULL
)
464 retcode
= i830_dma_initialize(dev
, dev_priv
, init
);
466 case I830_CLEANUP_DMA
:
467 retcode
= i830_dma_cleanup(dev
);
477 #define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
478 #define ST1_ENABLE (1<<16)
479 #define ST1_MASK (0xffff)
481 /* Most efficient way to verify state for the i830 is as it is
482 * emitted. Non-conformant state is silently dropped.
484 static void i830EmitContextVerified(struct drm_device
*dev
, unsigned int *code
)
486 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
491 BEGIN_LP_RING(I830_CTX_SETUP_SIZE
+ 4);
493 for (i
= 0; i
< I830_CTXREG_BLENDCOLR0
; i
++) {
495 if ((tmp
& (7 << 29)) == CMD_3D
&&
496 (tmp
& (0x1f << 24)) < (0x1d << 24)) {
500 DRM_ERROR("Skipping %d\n", i
);
504 OUT_RING(STATE3D_CONST_BLEND_COLOR_CMD
);
505 OUT_RING(code
[I830_CTXREG_BLENDCOLR
]);
508 for (i
= I830_CTXREG_VF
; i
< I830_CTXREG_MCSB0
; i
++) {
510 if ((tmp
& (7 << 29)) == CMD_3D
&&
511 (tmp
& (0x1f << 24)) < (0x1d << 24)) {
515 DRM_ERROR("Skipping %d\n", i
);
519 OUT_RING(STATE3D_MAP_COORD_SETBIND_CMD
);
520 OUT_RING(code
[I830_CTXREG_MCSB1
]);
529 static void i830EmitTexVerified(struct drm_device
*dev
, unsigned int *code
)
531 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
536 if (code
[I830_TEXREG_MI0
] == GFX_OP_MAP_INFO
||
537 (code
[I830_TEXREG_MI0
] & ~(0xf * LOAD_TEXTURE_MAP0
)) ==
538 (STATE3D_LOAD_STATE_IMMEDIATE_2
| 4)) {
540 BEGIN_LP_RING(I830_TEX_SETUP_SIZE
);
542 OUT_RING(code
[I830_TEXREG_MI0
]); /* TM0LI */
543 OUT_RING(code
[I830_TEXREG_MI1
]); /* TM0S0 */
544 OUT_RING(code
[I830_TEXREG_MI2
]); /* TM0S1 */
545 OUT_RING(code
[I830_TEXREG_MI3
]); /* TM0S2 */
546 OUT_RING(code
[I830_TEXREG_MI4
]); /* TM0S3 */
547 OUT_RING(code
[I830_TEXREG_MI5
]); /* TM0S4 */
549 for (i
= 6; i
< I830_TEX_SETUP_SIZE
; i
++) {
560 printk("rejected packet %x\n", code
[0]);
563 static void i830EmitTexBlendVerified(struct drm_device
*dev
,
564 unsigned int *code
, unsigned int num
)
566 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
574 BEGIN_LP_RING(num
+ 1);
576 for (i
= 0; i
< num
; i
++) {
588 static void i830EmitTexPalette(struct drm_device
*dev
,
589 unsigned int *palette
, int number
, int is_shared
)
591 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
599 if (is_shared
== 1) {
600 OUT_RING(CMD_OP_MAP_PALETTE_LOAD
|
601 MAP_PALETTE_NUM(0) | MAP_PALETTE_BOTH
);
603 OUT_RING(CMD_OP_MAP_PALETTE_LOAD
| MAP_PALETTE_NUM(number
));
605 for (i
= 0; i
< 256; i
++)
606 OUT_RING(palette
[i
]);
608 /* KW: WHERE IS THE ADVANCE_LP_RING? This is effectively a noop!
612 /* Need to do some additional checking when setting the dest buffer.
614 static void i830EmitDestVerified(struct drm_device
*dev
, unsigned int *code
)
616 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
620 BEGIN_LP_RING(I830_DEST_SETUP_SIZE
+ 10);
622 tmp
= code
[I830_DESTREG_CBUFADDR
];
623 if (tmp
== dev_priv
->front_di1
|| tmp
== dev_priv
->back_di1
) {
624 if (((int)outring
) & 8) {
629 OUT_RING(CMD_OP_DESTBUFFER_INFO
);
630 OUT_RING(BUF_3D_ID_COLOR_BACK
|
631 BUF_3D_PITCH(dev_priv
->back_pitch
* dev_priv
->cpp
) |
636 OUT_RING(CMD_OP_DESTBUFFER_INFO
);
637 OUT_RING(BUF_3D_ID_DEPTH
| BUF_3D_USE_FENCE
|
638 BUF_3D_PITCH(dev_priv
->depth_pitch
* dev_priv
->cpp
));
639 OUT_RING(dev_priv
->zi1
);
642 DRM_ERROR("bad di1 %x (allow %x or %x)\n",
643 tmp
, dev_priv
->front_di1
, dev_priv
->back_di1
);
649 OUT_RING(GFX_OP_DESTBUFFER_VARS
);
650 OUT_RING(code
[I830_DESTREG_DV1
]);
652 OUT_RING(GFX_OP_DRAWRECT_INFO
);
653 OUT_RING(code
[I830_DESTREG_DR1
]);
654 OUT_RING(code
[I830_DESTREG_DR2
]);
655 OUT_RING(code
[I830_DESTREG_DR3
]);
656 OUT_RING(code
[I830_DESTREG_DR4
]);
658 /* Need to verify this */
659 tmp
= code
[I830_DESTREG_SENABLE
];
660 if ((tmp
& ~0x3) == GFX_OP_SCISSOR_ENABLE
) {
663 DRM_ERROR("bad scissor enable\n");
667 OUT_RING(GFX_OP_SCISSOR_RECT
);
668 OUT_RING(code
[I830_DESTREG_SR1
]);
669 OUT_RING(code
[I830_DESTREG_SR2
]);
675 static void i830EmitStippleVerified(struct drm_device
*dev
, unsigned int *code
)
677 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
681 OUT_RING(GFX_OP_STIPPLE
);
686 static void i830EmitState(struct drm_device
*dev
)
688 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
689 drm_i830_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
690 unsigned int dirty
= sarea_priv
->dirty
;
692 DRM_DEBUG("%s %x\n", __func__
, dirty
);
694 if (dirty
& I830_UPLOAD_BUFFERS
) {
695 i830EmitDestVerified(dev
, sarea_priv
->BufferState
);
696 sarea_priv
->dirty
&= ~I830_UPLOAD_BUFFERS
;
699 if (dirty
& I830_UPLOAD_CTX
) {
700 i830EmitContextVerified(dev
, sarea_priv
->ContextState
);
701 sarea_priv
->dirty
&= ~I830_UPLOAD_CTX
;
704 if (dirty
& I830_UPLOAD_TEX0
) {
705 i830EmitTexVerified(dev
, sarea_priv
->TexState
[0]);
706 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX0
;
709 if (dirty
& I830_UPLOAD_TEX1
) {
710 i830EmitTexVerified(dev
, sarea_priv
->TexState
[1]);
711 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX1
;
714 if (dirty
& I830_UPLOAD_TEXBLEND0
) {
715 i830EmitTexBlendVerified(dev
, sarea_priv
->TexBlendState
[0],
716 sarea_priv
->TexBlendStateWordsUsed
[0]);
717 sarea_priv
->dirty
&= ~I830_UPLOAD_TEXBLEND0
;
720 if (dirty
& I830_UPLOAD_TEXBLEND1
) {
721 i830EmitTexBlendVerified(dev
, sarea_priv
->TexBlendState
[1],
722 sarea_priv
->TexBlendStateWordsUsed
[1]);
723 sarea_priv
->dirty
&= ~I830_UPLOAD_TEXBLEND1
;
726 if (dirty
& I830_UPLOAD_TEX_PALETTE_SHARED
) {
727 i830EmitTexPalette(dev
, sarea_priv
->Palette
[0], 0, 1);
729 if (dirty
& I830_UPLOAD_TEX_PALETTE_N(0)) {
730 i830EmitTexPalette(dev
, sarea_priv
->Palette
[0], 0, 0);
731 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX_PALETTE_N(0);
733 if (dirty
& I830_UPLOAD_TEX_PALETTE_N(1)) {
734 i830EmitTexPalette(dev
, sarea_priv
->Palette
[1], 1, 0);
735 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX_PALETTE_N(1);
741 if (dirty
& I830_UPLOAD_TEX_PALETTE_N(2)) {
742 i830EmitTexPalette(dev
, sarea_priv
->Palette2
[0], 0, 0);
743 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX_PALETTE_N(2);
745 if (dirty
& I830_UPLOAD_TEX_PALETTE_N(3)) {
746 i830EmitTexPalette(dev
, sarea_priv
->Palette2
[1], 1, 0);
747 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX_PALETTE_N(2);
754 if (dirty
& I830_UPLOAD_STIPPLE
) {
755 i830EmitStippleVerified(dev
, sarea_priv
->StippleState
);
756 sarea_priv
->dirty
&= ~I830_UPLOAD_STIPPLE
;
759 if (dirty
& I830_UPLOAD_TEX2
) {
760 i830EmitTexVerified(dev
, sarea_priv
->TexState2
);
761 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX2
;
764 if (dirty
& I830_UPLOAD_TEX3
) {
765 i830EmitTexVerified(dev
, sarea_priv
->TexState3
);
766 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX3
;
769 if (dirty
& I830_UPLOAD_TEXBLEND2
) {
770 i830EmitTexBlendVerified(dev
,
771 sarea_priv
->TexBlendState2
,
772 sarea_priv
->TexBlendStateWordsUsed2
);
774 sarea_priv
->dirty
&= ~I830_UPLOAD_TEXBLEND2
;
777 if (dirty
& I830_UPLOAD_TEXBLEND3
) {
778 i830EmitTexBlendVerified(dev
,
779 sarea_priv
->TexBlendState3
,
780 sarea_priv
->TexBlendStateWordsUsed3
);
781 sarea_priv
->dirty
&= ~I830_UPLOAD_TEXBLEND3
;
785 /* ================================================================
786 * Performance monitoring functions
789 static void i830_fill_box(struct drm_device
*dev
,
790 int x
, int y
, int w
, int h
, int r
, int g
, int b
)
792 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
794 unsigned int BR13
, CMD
;
797 BR13
= (0xF0 << 16) | (dev_priv
->pitch
* dev_priv
->cpp
) | (1 << 24);
798 CMD
= XY_COLOR_BLT_CMD
;
799 x
+= dev_priv
->sarea_priv
->boxes
[0].x1
;
800 y
+= dev_priv
->sarea_priv
->boxes
[0].y1
;
802 if (dev_priv
->cpp
== 4) {
804 CMD
|= (XY_COLOR_BLT_WRITE_ALPHA
| XY_COLOR_BLT_WRITE_RGB
);
805 color
= (((0xff) << 24) | (r
<< 16) | (g
<< 8) | b
);
807 color
= (((r
& 0xf8) << 8) |
808 ((g
& 0xfc) << 3) | ((b
& 0xf8) >> 3));
814 OUT_RING((y
<< 16) | x
);
815 OUT_RING(((y
+ h
) << 16) | (x
+ w
));
817 if (dev_priv
->current_page
== 1)
818 OUT_RING(dev_priv
->front_offset
);
820 OUT_RING(dev_priv
->back_offset
);
826 static void i830_cp_performance_boxes(struct drm_device
*dev
)
828 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
830 /* Purple box for page flipping
832 if (dev_priv
->sarea_priv
->perf_boxes
& I830_BOX_FLIP
)
833 i830_fill_box(dev
, 4, 4, 8, 8, 255, 0, 255);
835 /* Red box if we have to wait for idle at any point
837 if (dev_priv
->sarea_priv
->perf_boxes
& I830_BOX_WAIT
)
838 i830_fill_box(dev
, 16, 4, 8, 8, 255, 0, 0);
840 /* Blue box: lost context?
842 if (dev_priv
->sarea_priv
->perf_boxes
& I830_BOX_LOST_CONTEXT
)
843 i830_fill_box(dev
, 28, 4, 8, 8, 0, 0, 255);
845 /* Yellow box for texture swaps
847 if (dev_priv
->sarea_priv
->perf_boxes
& I830_BOX_TEXTURE_LOAD
)
848 i830_fill_box(dev
, 40, 4, 8, 8, 255, 255, 0);
850 /* Green box if hardware never idles (as far as we can tell)
852 if (!(dev_priv
->sarea_priv
->perf_boxes
& I830_BOX_RING_EMPTY
))
853 i830_fill_box(dev
, 64, 4, 8, 8, 0, 255, 0);
855 /* Draw bars indicating number of buffers allocated
856 * (not a great measure, easily confused)
858 if (dev_priv
->dma_used
) {
859 int bar
= dev_priv
->dma_used
/ 10240;
864 i830_fill_box(dev
, 4, 16, bar
, 4, 196, 128, 128);
865 dev_priv
->dma_used
= 0;
868 dev_priv
->sarea_priv
->perf_boxes
= 0;
871 static void i830_dma_dispatch_clear(struct drm_device
*dev
, int flags
,
872 unsigned int clear_color
,
873 unsigned int clear_zval
,
874 unsigned int clear_depthmask
)
876 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
877 drm_i830_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
878 int nbox
= sarea_priv
->nbox
;
879 struct drm_clip_rect
*pbox
= sarea_priv
->boxes
;
880 int pitch
= dev_priv
->pitch
;
881 int cpp
= dev_priv
->cpp
;
883 unsigned int BR13
, CMD
, D_CMD
;
886 if (dev_priv
->current_page
== 1) {
887 unsigned int tmp
= flags
;
889 flags
&= ~(I830_FRONT
| I830_BACK
);
890 if (tmp
& I830_FRONT
)
896 i830_kernel_lost_context(dev
);
900 BR13
= (0xF0 << 16) | (pitch
* cpp
) | (1 << 24);
901 D_CMD
= CMD
= XY_COLOR_BLT_CMD
;
904 BR13
= (0xF0 << 16) | (pitch
* cpp
) | (1 << 24) | (1 << 25);
905 CMD
= (XY_COLOR_BLT_CMD
| XY_COLOR_BLT_WRITE_ALPHA
|
906 XY_COLOR_BLT_WRITE_RGB
);
907 D_CMD
= XY_COLOR_BLT_CMD
;
908 if (clear_depthmask
& 0x00ffffff)
909 D_CMD
|= XY_COLOR_BLT_WRITE_RGB
;
910 if (clear_depthmask
& 0xff000000)
911 D_CMD
|= XY_COLOR_BLT_WRITE_ALPHA
;
914 BR13
= (0xF0 << 16) | (pitch
* cpp
) | (1 << 24);
915 D_CMD
= CMD
= XY_COLOR_BLT_CMD
;
919 if (nbox
> I830_NR_SAREA_CLIPRECTS
)
920 nbox
= I830_NR_SAREA_CLIPRECTS
;
922 for (i
= 0; i
< nbox
; i
++, pbox
++) {
923 if (pbox
->x1
> pbox
->x2
||
924 pbox
->y1
> pbox
->y2
||
925 pbox
->x2
> dev_priv
->w
|| pbox
->y2
> dev_priv
->h
)
928 if (flags
& I830_FRONT
) {
929 DRM_DEBUG("clear front\n");
933 OUT_RING((pbox
->y1
<< 16) | pbox
->x1
);
934 OUT_RING((pbox
->y2
<< 16) | pbox
->x2
);
935 OUT_RING(dev_priv
->front_offset
);
936 OUT_RING(clear_color
);
940 if (flags
& I830_BACK
) {
941 DRM_DEBUG("clear back\n");
945 OUT_RING((pbox
->y1
<< 16) | pbox
->x1
);
946 OUT_RING((pbox
->y2
<< 16) | pbox
->x2
);
947 OUT_RING(dev_priv
->back_offset
);
948 OUT_RING(clear_color
);
952 if (flags
& I830_DEPTH
) {
953 DRM_DEBUG("clear depth\n");
957 OUT_RING((pbox
->y1
<< 16) | pbox
->x1
);
958 OUT_RING((pbox
->y2
<< 16) | pbox
->x2
);
959 OUT_RING(dev_priv
->depth_offset
);
960 OUT_RING(clear_zval
);
966 static void i830_dma_dispatch_swap(struct drm_device
*dev
)
968 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
969 drm_i830_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
970 int nbox
= sarea_priv
->nbox
;
971 struct drm_clip_rect
*pbox
= sarea_priv
->boxes
;
972 int pitch
= dev_priv
->pitch
;
973 int cpp
= dev_priv
->cpp
;
975 unsigned int CMD
, BR13
;
978 DRM_DEBUG("swapbuffers\n");
980 i830_kernel_lost_context(dev
);
982 if (dev_priv
->do_boxes
)
983 i830_cp_performance_boxes(dev
);
987 BR13
= (pitch
* cpp
) | (0xCC << 16) | (1 << 24);
988 CMD
= XY_SRC_COPY_BLT_CMD
;
991 BR13
= (pitch
* cpp
) | (0xCC << 16) | (1 << 24) | (1 << 25);
992 CMD
= (XY_SRC_COPY_BLT_CMD
| XY_SRC_COPY_BLT_WRITE_ALPHA
|
993 XY_SRC_COPY_BLT_WRITE_RGB
);
996 BR13
= (pitch
* cpp
) | (0xCC << 16) | (1 << 24);
997 CMD
= XY_SRC_COPY_BLT_CMD
;
1001 if (nbox
> I830_NR_SAREA_CLIPRECTS
)
1002 nbox
= I830_NR_SAREA_CLIPRECTS
;
1004 for (i
= 0; i
< nbox
; i
++, pbox
++) {
1005 if (pbox
->x1
> pbox
->x2
||
1006 pbox
->y1
> pbox
->y2
||
1007 pbox
->x2
> dev_priv
->w
|| pbox
->y2
> dev_priv
->h
)
1010 DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
1011 pbox
->x1
, pbox
->y1
, pbox
->x2
, pbox
->y2
);
1016 OUT_RING((pbox
->y1
<< 16) | pbox
->x1
);
1017 OUT_RING((pbox
->y2
<< 16) | pbox
->x2
);
1019 if (dev_priv
->current_page
== 0)
1020 OUT_RING(dev_priv
->front_offset
);
1022 OUT_RING(dev_priv
->back_offset
);
1024 OUT_RING((pbox
->y1
<< 16) | pbox
->x1
);
1025 OUT_RING(BR13
& 0xffff);
1027 if (dev_priv
->current_page
== 0)
1028 OUT_RING(dev_priv
->back_offset
);
1030 OUT_RING(dev_priv
->front_offset
);
1036 static void i830_dma_dispatch_flip(struct drm_device
*dev
)
1038 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1041 DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
1043 dev_priv
->current_page
,
1044 dev_priv
->sarea_priv
->pf_current_page
);
1046 i830_kernel_lost_context(dev
);
1048 if (dev_priv
->do_boxes
) {
1049 dev_priv
->sarea_priv
->perf_boxes
|= I830_BOX_FLIP
;
1050 i830_cp_performance_boxes(dev
);
1054 OUT_RING(INST_PARSER_CLIENT
| INST_OP_FLUSH
| INST_FLUSH_MAP_CACHE
);
1059 OUT_RING(CMD_OP_DISPLAYBUFFER_INFO
| ASYNC_FLIP
);
1061 if (dev_priv
->current_page
== 0) {
1062 OUT_RING(dev_priv
->back_offset
);
1063 dev_priv
->current_page
= 1;
1065 OUT_RING(dev_priv
->front_offset
);
1066 dev_priv
->current_page
= 0;
1072 OUT_RING(MI_WAIT_FOR_EVENT
| MI_WAIT_FOR_PLANE_A_FLIP
);
1076 dev_priv
->sarea_priv
->pf_current_page
= dev_priv
->current_page
;
1079 static void i830_dma_dispatch_vertex(struct drm_device
*dev
,
1080 struct drm_buf
*buf
, int discard
, int used
)
1082 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1083 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
1084 drm_i830_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
1085 struct drm_clip_rect
*box
= sarea_priv
->boxes
;
1086 int nbox
= sarea_priv
->nbox
;
1087 unsigned long address
= (unsigned long)buf
->bus_address
;
1088 unsigned long start
= address
- dev
->agp
->base
;
1092 i830_kernel_lost_context(dev
);
1094 if (nbox
> I830_NR_SAREA_CLIPRECTS
)
1095 nbox
= I830_NR_SAREA_CLIPRECTS
;
1098 u
= cmpxchg(buf_priv
->in_use
, I830_BUF_CLIENT
,
1100 if (u
!= I830_BUF_CLIENT
)
1101 DRM_DEBUG("xxxx 2\n");
1104 if (used
> 4 * 1023)
1107 if (sarea_priv
->dirty
)
1110 DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
1111 address
, used
, nbox
);
1113 dev_priv
->counter
++;
1114 DRM_DEBUG("dispatch counter : %ld\n", dev_priv
->counter
);
1115 DRM_DEBUG("i830_dma_dispatch\n");
1116 DRM_DEBUG("start : %lx\n", start
);
1117 DRM_DEBUG("used : %d\n", used
);
1118 DRM_DEBUG("start + used - 4 : %ld\n", start
+ used
- 4);
1120 if (buf_priv
->currently_mapped
== I830_BUF_MAPPED
) {
1121 u32
*vp
= buf_priv
->kernel_virtual
;
1123 vp
[0] = (GFX_OP_PRIMITIVE
|
1124 sarea_priv
->vertex_prim
| ((used
/ 4) - 2));
1126 if (dev_priv
->use_mi_batchbuffer_start
) {
1127 vp
[used
/ 4] = MI_BATCH_BUFFER_END
;
1136 i830_unmap_buffer(buf
);
1143 OUT_RING(GFX_OP_DRAWRECT_INFO
);
1144 OUT_RING(sarea_priv
->
1145 BufferState
[I830_DESTREG_DR1
]);
1146 OUT_RING(box
[i
].x1
| (box
[i
].y1
<< 16));
1147 OUT_RING(box
[i
].x2
| (box
[i
].y2
<< 16));
1148 OUT_RING(sarea_priv
->
1149 BufferState
[I830_DESTREG_DR4
]);
1154 if (dev_priv
->use_mi_batchbuffer_start
) {
1156 OUT_RING(MI_BATCH_BUFFER_START
| (2 << 6));
1157 OUT_RING(start
| MI_BATCH_NON_SECURE
);
1161 OUT_RING(MI_BATCH_BUFFER
);
1162 OUT_RING(start
| MI_BATCH_NON_SECURE
);
1163 OUT_RING(start
+ used
- 4);
1168 } while (++i
< nbox
);
1172 dev_priv
->counter
++;
1174 (void)cmpxchg(buf_priv
->in_use
, I830_BUF_CLIENT
,
1178 OUT_RING(CMD_STORE_DWORD_IDX
);
1180 OUT_RING(dev_priv
->counter
);
1181 OUT_RING(CMD_STORE_DWORD_IDX
);
1182 OUT_RING(buf_priv
->my_use_idx
);
1183 OUT_RING(I830_BUF_FREE
);
1184 OUT_RING(CMD_REPORT_HEAD
);
1190 static void i830_dma_quiescent(struct drm_device
*dev
)
1192 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1195 i830_kernel_lost_context(dev
);
1198 OUT_RING(INST_PARSER_CLIENT
| INST_OP_FLUSH
| INST_FLUSH_MAP_CACHE
);
1199 OUT_RING(CMD_REPORT_HEAD
);
1204 i830_wait_ring(dev
, dev_priv
->ring
.Size
- 8, __func__
);
1207 static int i830_flush_queue(struct drm_device
*dev
)
1209 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1210 struct drm_device_dma
*dma
= dev
->dma
;
1214 i830_kernel_lost_context(dev
);
1217 OUT_RING(CMD_REPORT_HEAD
);
1221 i830_wait_ring(dev
, dev_priv
->ring
.Size
- 8, __func__
);
1223 for (i
= 0; i
< dma
->buf_count
; i
++) {
1224 struct drm_buf
*buf
= dma
->buflist
[i
];
1225 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
1227 int used
= cmpxchg(buf_priv
->in_use
, I830_BUF_HARDWARE
,
1230 if (used
== I830_BUF_HARDWARE
)
1231 DRM_DEBUG("reclaimed from HARDWARE\n");
1232 if (used
== I830_BUF_CLIENT
)
1233 DRM_DEBUG("still on client\n");
1239 /* Must be called with the lock held */
1240 static void i830_reclaim_buffers(struct drm_device
*dev
, struct drm_file
*file_priv
)
1242 struct drm_device_dma
*dma
= dev
->dma
;
1247 if (!dev
->dev_private
)
1252 i830_flush_queue(dev
);
1254 for (i
= 0; i
< dma
->buf_count
; i
++) {
1255 struct drm_buf
*buf
= dma
->buflist
[i
];
1256 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
1258 if (buf
->file_priv
== file_priv
&& buf_priv
) {
1259 int used
= cmpxchg(buf_priv
->in_use
, I830_BUF_CLIENT
,
1262 if (used
== I830_BUF_CLIENT
)
1263 DRM_DEBUG("reclaimed from client\n");
1264 if (buf_priv
->currently_mapped
== I830_BUF_MAPPED
)
1265 buf_priv
->currently_mapped
= I830_BUF_UNMAPPED
;
1270 static int i830_flush_ioctl(struct drm_device
*dev
, void *data
,
1271 struct drm_file
*file_priv
)
1273 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
1275 i830_flush_queue(dev
);
1279 static int i830_dma_vertex(struct drm_device
*dev
, void *data
,
1280 struct drm_file
*file_priv
)
1282 struct drm_device_dma
*dma
= dev
->dma
;
1283 drm_i830_private_t
*dev_priv
= (drm_i830_private_t
*) dev
->dev_private
;
1284 u32
*hw_status
= dev_priv
->hw_status_page
;
1285 drm_i830_sarea_t
*sarea_priv
= (drm_i830_sarea_t
*)
1286 dev_priv
->sarea_priv
;
1287 drm_i830_vertex_t
*vertex
= data
;
1289 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
1291 DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n",
1292 vertex
->idx
, vertex
->used
, vertex
->discard
);
1294 if (vertex
->idx
< 0 || vertex
->idx
> dma
->buf_count
)
1297 i830_dma_dispatch_vertex(dev
,
1298 dma
->buflist
[vertex
->idx
],
1299 vertex
->discard
, vertex
->used
);
1301 sarea_priv
->last_enqueue
= dev_priv
->counter
- 1;
1302 sarea_priv
->last_dispatch
= (int)hw_status
[5];
1307 static int i830_clear_bufs(struct drm_device
*dev
, void *data
,
1308 struct drm_file
*file_priv
)
1310 drm_i830_clear_t
*clear
= data
;
1312 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
1314 /* GH: Someone's doing nasty things... */
1315 if (!dev
->dev_private
)
1318 i830_dma_dispatch_clear(dev
, clear
->flags
,
1320 clear
->clear_depth
, clear
->clear_depthmask
);
1324 static int i830_swap_bufs(struct drm_device
*dev
, void *data
,
1325 struct drm_file
*file_priv
)
1327 DRM_DEBUG("i830_swap_bufs\n");
1329 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
1331 i830_dma_dispatch_swap(dev
);
1335 /* Not sure why this isn't set all the time:
1337 static void i830_do_init_pageflip(struct drm_device
*dev
)
1339 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1341 DRM_DEBUG("%s\n", __func__
);
1342 dev_priv
->page_flipping
= 1;
1343 dev_priv
->current_page
= 0;
1344 dev_priv
->sarea_priv
->pf_current_page
= dev_priv
->current_page
;
1347 static int i830_do_cleanup_pageflip(struct drm_device
*dev
)
1349 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1351 DRM_DEBUG("%s\n", __func__
);
1352 if (dev_priv
->current_page
!= 0)
1353 i830_dma_dispatch_flip(dev
);
1355 dev_priv
->page_flipping
= 0;
1359 static int i830_flip_bufs(struct drm_device
*dev
, void *data
,
1360 struct drm_file
*file_priv
)
1362 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1364 DRM_DEBUG("%s\n", __func__
);
1366 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
1368 if (!dev_priv
->page_flipping
)
1369 i830_do_init_pageflip(dev
);
1371 i830_dma_dispatch_flip(dev
);
1375 static int i830_getage(struct drm_device
*dev
, void *data
,
1376 struct drm_file
*file_priv
)
1378 drm_i830_private_t
*dev_priv
= (drm_i830_private_t
*) dev
->dev_private
;
1379 u32
*hw_status
= dev_priv
->hw_status_page
;
1380 drm_i830_sarea_t
*sarea_priv
= (drm_i830_sarea_t
*)
1381 dev_priv
->sarea_priv
;
1383 sarea_priv
->last_dispatch
= (int)hw_status
[5];
1387 static int i830_getbuf(struct drm_device
*dev
, void *data
,
1388 struct drm_file
*file_priv
)
1391 drm_i830_dma_t
*d
= data
;
1392 drm_i830_private_t
*dev_priv
= (drm_i830_private_t
*) dev
->dev_private
;
1393 u32
*hw_status
= dev_priv
->hw_status_page
;
1394 drm_i830_sarea_t
*sarea_priv
= (drm_i830_sarea_t
*)
1395 dev_priv
->sarea_priv
;
1397 DRM_DEBUG("getbuf\n");
1399 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
1403 retcode
= i830_dma_get_buffer(dev
, d
, file_priv
);
1405 DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n",
1406 task_pid_nr(current
), retcode
, d
->granted
);
1408 sarea_priv
->last_dispatch
= (int)hw_status
[5];
1413 static int i830_copybuf(struct drm_device
*dev
, void *data
,
1414 struct drm_file
*file_priv
)
1416 /* Never copy - 2.4.x doesn't need it */
1420 static int i830_docopy(struct drm_device
*dev
, void *data
,
1421 struct drm_file
*file_priv
)
1426 static int i830_getparam(struct drm_device
*dev
, void *data
,
1427 struct drm_file
*file_priv
)
1429 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1430 drm_i830_getparam_t
*param
= data
;
1434 DRM_ERROR("%s called with no initialization\n", __func__
);
1438 switch (param
->param
) {
1439 case I830_PARAM_IRQ_ACTIVE
:
1440 value
= dev
->irq_enabled
;
1446 if (copy_to_user(param
->value
, &value
, sizeof(int))) {
1447 DRM_ERROR("copy_to_user\n");
1454 static int i830_setparam(struct drm_device
*dev
, void *data
,
1455 struct drm_file
*file_priv
)
1457 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1458 drm_i830_setparam_t
*param
= data
;
1461 DRM_ERROR("%s called with no initialization\n", __func__
);
1465 switch (param
->param
) {
1466 case I830_SETPARAM_USE_MI_BATCHBUFFER_START
:
1467 dev_priv
->use_mi_batchbuffer_start
= param
->value
;
1476 int i830_driver_load(struct drm_device
*dev
, unsigned long flags
)
1478 /* i830 has 4 more counters */
1480 dev
->types
[6] = _DRM_STAT_IRQ
;
1481 dev
->types
[7] = _DRM_STAT_PRIMARY
;
1482 dev
->types
[8] = _DRM_STAT_SECONDARY
;
1483 dev
->types
[9] = _DRM_STAT_DMA
;
1488 void i830_driver_lastclose(struct drm_device
*dev
)
1490 i830_dma_cleanup(dev
);
1493 void i830_driver_preclose(struct drm_device
*dev
, struct drm_file
*file_priv
)
1495 if (dev
->dev_private
) {
1496 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1497 if (dev_priv
->page_flipping
)
1498 i830_do_cleanup_pageflip(dev
);
1502 void i830_driver_reclaim_buffers_locked(struct drm_device
*dev
, struct drm_file
*file_priv
)
1504 i830_reclaim_buffers(dev
, file_priv
);
1507 int i830_driver_dma_quiescent(struct drm_device
*dev
)
1509 i830_dma_quiescent(dev
);
1514 * call the drm_ioctl under the big kernel lock because
1515 * to lock against the i830_mmap_buffers function.
1517 long i830_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
1521 ret
= drm_ioctl(file
, cmd
, arg
);
1526 struct drm_ioctl_desc i830_ioctls
[] = {
1527 DRM_IOCTL_DEF_DRV(I830_INIT
, i830_dma_init
, DRM_AUTH
|DRM_MASTER
|DRM_ROOT_ONLY
|DRM_UNLOCKED
),
1528 DRM_IOCTL_DEF_DRV(I830_VERTEX
, i830_dma_vertex
, DRM_AUTH
|DRM_UNLOCKED
),
1529 DRM_IOCTL_DEF_DRV(I830_CLEAR
, i830_clear_bufs
, DRM_AUTH
|DRM_UNLOCKED
),
1530 DRM_IOCTL_DEF_DRV(I830_FLUSH
, i830_flush_ioctl
, DRM_AUTH
|DRM_UNLOCKED
),
1531 DRM_IOCTL_DEF_DRV(I830_GETAGE
, i830_getage
, DRM_AUTH
|DRM_UNLOCKED
),
1532 DRM_IOCTL_DEF_DRV(I830_GETBUF
, i830_getbuf
, DRM_AUTH
|DRM_UNLOCKED
),
1533 DRM_IOCTL_DEF_DRV(I830_SWAP
, i830_swap_bufs
, DRM_AUTH
|DRM_UNLOCKED
),
1534 DRM_IOCTL_DEF_DRV(I830_COPY
, i830_copybuf
, DRM_AUTH
|DRM_UNLOCKED
),
1535 DRM_IOCTL_DEF_DRV(I830_DOCOPY
, i830_docopy
, DRM_AUTH
|DRM_UNLOCKED
),
1536 DRM_IOCTL_DEF_DRV(I830_FLIP
, i830_flip_bufs
, DRM_AUTH
|DRM_UNLOCKED
),
1537 DRM_IOCTL_DEF_DRV(I830_IRQ_EMIT
, i830_irq_emit
, DRM_AUTH
|DRM_UNLOCKED
),
1538 DRM_IOCTL_DEF_DRV(I830_IRQ_WAIT
, i830_irq_wait
, DRM_AUTH
|DRM_UNLOCKED
),
1539 DRM_IOCTL_DEF_DRV(I830_GETPARAM
, i830_getparam
, DRM_AUTH
|DRM_UNLOCKED
),
1540 DRM_IOCTL_DEF_DRV(I830_SETPARAM
, i830_setparam
, DRM_AUTH
|DRM_UNLOCKED
),
1543 int i830_max_ioctl
= DRM_ARRAY_SIZE(i830_ioctls
);
1546 * Determine if the device really is AGP or not.
1548 * All Intel graphics chipsets are treated as AGP, even if they are really
1551 * \param dev The device to be tested.
1554 * A value of 1 is always retured to indictate every i8xx is AGP.
1556 int i830_driver_device_is_agp(struct drm_device
*dev
)