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vmwgfx: Fix assignment in vmw_framebuffer_create_handle
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / gpu / drm / vmwgfx / vmwgfx_kms.c
blob7c88f1f90ff97e14c8ec57e7903ee126928c9f3a
1 /**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include "vmwgfx_kms.h"
29
30
31 /* Might need a hrtimer here? */
32 #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
34
35 struct vmw_clip_rect {
36 int x1, x2, y1, y2;
37 };
38
39 /**
40 * Clip @num_rects number of @rects against @clip storing the
41 * results in @out_rects and the number of passed rects in @out_num.
42 */
43 void vmw_clip_cliprects(struct drm_clip_rect *rects,
44 int num_rects,
45 struct vmw_clip_rect clip,
46 SVGASignedRect *out_rects,
47 int *out_num)
48 {
49 int i, k;
50
51 for (i = 0, k = 0; i < num_rects; i++) {
52 int x1 = max_t(int, clip.x1, rects[i].x1);
53 int y1 = max_t(int, clip.y1, rects[i].y1);
54 int x2 = min_t(int, clip.x2, rects[i].x2);
55 int y2 = min_t(int, clip.y2, rects[i].y2);
56
57 if (x1 >= x2)
58 continue;
59 if (y1 >= y2)
60 continue;
61
62 out_rects[k].left = x1;
63 out_rects[k].top = y1;
64 out_rects[k].right = x2;
65 out_rects[k].bottom = y2;
66 k++;
67 }
68
69 *out_num = k;
70 }
71
72 void vmw_display_unit_cleanup(struct vmw_display_unit *du)
73 {
74 if (du->cursor_surface)
75 vmw_surface_unreference(&du->cursor_surface);
76 if (du->cursor_dmabuf)
77 vmw_dmabuf_unreference(&du->cursor_dmabuf);
78 drm_crtc_cleanup(&du->crtc);
79 drm_encoder_cleanup(&du->encoder);
80 drm_connector_cleanup(&du->connector);
81 }
82
83 /*
84 * Display Unit Cursor functions
85 */
86
87 int vmw_cursor_update_image(struct vmw_private *dev_priv,
88 u32 *image, u32 width, u32 height,
89 u32 hotspotX, u32 hotspotY)
90 {
91 struct {
92 u32 cmd;
93 SVGAFifoCmdDefineAlphaCursor cursor;
94 } *cmd;
95 u32 image_size = width * height * 4;
96 u32 cmd_size = sizeof(*cmd) + image_size;
97
98 if (!image)
99 return -EINVAL;
100
101 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
102 if (unlikely(cmd == NULL)) {
103 DRM_ERROR("Fifo reserve failed.\n");
104 return -ENOMEM;
105 }
106
107 memset(cmd, 0, sizeof(*cmd));
108
109 memcpy(&cmd[1], image, image_size);
110
111 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
112 cmd->cursor.id = cpu_to_le32(0);
113 cmd->cursor.width = cpu_to_le32(width);
114 cmd->cursor.height = cpu_to_le32(height);
115 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
116 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
117
118 vmw_fifo_commit(dev_priv, cmd_size);
119
120 return 0;
121 }
122
123 int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
124 struct vmw_dma_buffer *dmabuf,
125 u32 width, u32 height,
126 u32 hotspotX, u32 hotspotY)
127 {
128 struct ttm_bo_kmap_obj map;
129 unsigned long kmap_offset;
130 unsigned long kmap_num;
131 void *virtual;
132 bool dummy;
133 int ret;
134
135 kmap_offset = 0;
136 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
137
138 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
139 if (unlikely(ret != 0)) {
140 DRM_ERROR("reserve failed\n");
141 return -EINVAL;
142 }
143
144 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
145 if (unlikely(ret != 0))
146 goto err_unreserve;
147
148 virtual = ttm_kmap_obj_virtual(&map, &dummy);
149 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
150 hotspotX, hotspotY);
151
152 ttm_bo_kunmap(&map);
153 err_unreserve:
154 ttm_bo_unreserve(&dmabuf->base);
155
156 return ret;
157 }
158
159
160 void vmw_cursor_update_position(struct vmw_private *dev_priv,
161 bool show, int x, int y)
162 {
163 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
164 uint32_t count;
165
166 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
167 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
168 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
169 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
170 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
171 }
172
173 int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
174 uint32_t handle, uint32_t width, uint32_t height)
175 {
176 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
177 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
178 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
179 struct vmw_surface *surface = NULL;
180 struct vmw_dma_buffer *dmabuf = NULL;
181 int ret;
182
183 /* A lot of the code assumes this */
184 if (handle && (width != 64 || height != 64))
185 return -EINVAL;
186
187 if (handle) {
188 ret = vmw_user_lookup_handle(dev_priv, tfile,
189 handle, &surface, &dmabuf);
190 if (ret) {
191 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
192 return -EINVAL;
193 }
194 }
195
196 /* need to do this before taking down old image */
197 if (surface && !surface->snooper.image) {
198 DRM_ERROR("surface not suitable for cursor\n");
199 vmw_surface_unreference(&surface);
200 return -EINVAL;
201 }
202
203 /* takedown old cursor */
204 if (du->cursor_surface) {
205 du->cursor_surface->snooper.crtc = NULL;
206 vmw_surface_unreference(&du->cursor_surface);
207 }
208 if (du->cursor_dmabuf)
209 vmw_dmabuf_unreference(&du->cursor_dmabuf);
210
211 /* setup new image */
212 if (surface) {
213 /* vmw_user_surface_lookup takes one reference */
214 du->cursor_surface = surface;
215
216 du->cursor_surface->snooper.crtc = crtc;
217 du->cursor_age = du->cursor_surface->snooper.age;
218 vmw_cursor_update_image(dev_priv, surface->snooper.image,
219 64, 64, du->hotspot_x, du->hotspot_y);
220 } else if (dmabuf) {
221 /* vmw_user_surface_lookup takes one reference */
222 du->cursor_dmabuf = dmabuf;
223
224 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
225 du->hotspot_x, du->hotspot_y);
226 } else {
227 vmw_cursor_update_position(dev_priv, false, 0, 0);
228 return 0;
229 }
230
231 vmw_cursor_update_position(dev_priv, true,
232 du->cursor_x + du->hotspot_x,
233 du->cursor_y + du->hotspot_y);
234
235 return 0;
236 }
237
238 int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
239 {
240 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
241 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
242 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
243
244 du->cursor_x = x + crtc->x;
245 du->cursor_y = y + crtc->y;
246
247 vmw_cursor_update_position(dev_priv, shown,
248 du->cursor_x + du->hotspot_x,
249 du->cursor_y + du->hotspot_y);
250
251 return 0;
252 }
253
254 void vmw_kms_cursor_snoop(struct vmw_surface *srf,
255 struct ttm_object_file *tfile,
256 struct ttm_buffer_object *bo,
257 SVGA3dCmdHeader *header)
258 {
259 struct ttm_bo_kmap_obj map;
260 unsigned long kmap_offset;
261 unsigned long kmap_num;
262 SVGA3dCopyBox *box;
263 unsigned box_count;
264 void *virtual;
265 bool dummy;
266 struct vmw_dma_cmd {
267 SVGA3dCmdHeader header;
268 SVGA3dCmdSurfaceDMA dma;
269 } *cmd;
270 int i, ret;
271
272 cmd = container_of(header, struct vmw_dma_cmd, header);
273
274 /* No snooper installed */
275 if (!srf->snooper.image)
276 return;
277
278 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
279 DRM_ERROR("face and mipmap for cursors should never != 0\n");
280 return;
281 }
282
283 if (cmd->header.size < 64) {
284 DRM_ERROR("at least one full copy box must be given\n");
285 return;
286 }
287
288 box = (SVGA3dCopyBox *)&cmd[1];
289 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
290 sizeof(SVGA3dCopyBox);
291
292 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
293 box->x != 0 || box->y != 0 || box->z != 0 ||
294 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
295 box->d != 1 || box_count != 1) {
296 /* TODO handle none page aligned offsets */
297 /* TODO handle more dst & src != 0 */
298 /* TODO handle more then one copy */
299 DRM_ERROR("Cant snoop dma request for cursor!\n");
300 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
301 box->srcx, box->srcy, box->srcz,
302 box->x, box->y, box->z,
303 box->w, box->h, box->d, box_count,
304 cmd->dma.guest.ptr.offset);
305 return;
306 }
307
308 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
309 kmap_num = (64*64*4) >> PAGE_SHIFT;
310
311 ret = ttm_bo_reserve(bo, true, false, false, 0);
312 if (unlikely(ret != 0)) {
313 DRM_ERROR("reserve failed\n");
314 return;
315 }
316
317 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
318 if (unlikely(ret != 0))
319 goto err_unreserve;
320
321 virtual = ttm_kmap_obj_virtual(&map, &dummy);
322
323 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
324 memcpy(srf->snooper.image, virtual, 64*64*4);
325 } else {
326 /* Image is unsigned pointer. */
327 for (i = 0; i < box->h; i++)
328 memcpy(srf->snooper.image + i * 64,
329 virtual + i * cmd->dma.guest.pitch,
330 box->w * 4);
331 }
332
333 srf->snooper.age++;
334
335 /* we can't call this function from this function since execbuf has
336 * reserved fifo space.
337 *
338 * if (srf->snooper.crtc)
339 * vmw_ldu_crtc_cursor_update_image(dev_priv,
340 * srf->snooper.image, 64, 64,
341 * du->hotspot_x, du->hotspot_y);
342 */
343
344 ttm_bo_kunmap(&map);
345 err_unreserve:
346 ttm_bo_unreserve(bo);
347 }
348
349 void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
350 {
351 struct drm_device *dev = dev_priv->dev;
352 struct vmw_display_unit *du;
353 struct drm_crtc *crtc;
354
355 mutex_lock(&dev->mode_config.mutex);
356
357 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
358 du = vmw_crtc_to_du(crtc);
359 if (!du->cursor_surface ||
360 du->cursor_age == du->cursor_surface->snooper.age)
361 continue;
362
363 du->cursor_age = du->cursor_surface->snooper.age;
364 vmw_cursor_update_image(dev_priv,
365 du->cursor_surface->snooper.image,
366 64, 64, du->hotspot_x, du->hotspot_y);
367 }
368
369 mutex_unlock(&dev->mode_config.mutex);
370 }
371
372 /*
373 * Generic framebuffer code
374 */
375
376 int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
377 struct drm_file *file_priv,
378 unsigned int *handle)
379 {
380 if (handle)
381 *handle = 0;
382
383 return 0;
384 }
385
386 /*
387 * Surface framebuffer code
388 */
389
390 #define vmw_framebuffer_to_vfbs(x) \
391 container_of(x, struct vmw_framebuffer_surface, base.base)
392
393 struct vmw_framebuffer_surface {
394 struct vmw_framebuffer base;
395 struct vmw_surface *surface;
396 struct vmw_dma_buffer *buffer;
397 struct list_head head;
398 struct drm_master *master;
399 };
400
401 void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
402 {
403 struct vmw_framebuffer_surface *vfbs =
404 vmw_framebuffer_to_vfbs(framebuffer);
405 struct vmw_master *vmaster = vmw_master(vfbs->master);
406
407
408 mutex_lock(&vmaster->fb_surf_mutex);
409 list_del(&vfbs->head);
410 mutex_unlock(&vmaster->fb_surf_mutex);
411
412 drm_master_put(&vfbs->master);
413 drm_framebuffer_cleanup(framebuffer);
414 vmw_surface_unreference(&vfbs->surface);
415 ttm_base_object_unref(&vfbs->base.user_obj);
416
417 kfree(vfbs);
418 }
419
420 static int do_surface_dirty_sou(struct vmw_private *dev_priv,
421 struct drm_file *file_priv,
422 struct vmw_framebuffer *framebuffer,
423 unsigned flags, unsigned color,
424 struct drm_clip_rect *clips,
425 unsigned num_clips, int inc)
426 {
427 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
428 struct drm_clip_rect *clips_ptr;
429 struct drm_clip_rect *tmp;
430 struct drm_crtc *crtc;
431 size_t fifo_size;
432 int i, num_units;
433 int ret = 0; /* silence warning */
434 int left, right, top, bottom;
435
436 struct {
437 SVGA3dCmdHeader header;
438 SVGA3dCmdBlitSurfaceToScreen body;
439 } *cmd;
440 SVGASignedRect *blits;
441
442 num_units = 0;
443 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
444 head) {
445 if (crtc->fb != &framebuffer->base)
446 continue;
447 units[num_units++] = vmw_crtc_to_du(crtc);
448 }
449
450 BUG_ON(!clips || !num_clips);
451
452 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
453 if (unlikely(tmp == NULL)) {
454 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
455 return -ENOMEM;
456 }
457
458 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
459 cmd = kzalloc(fifo_size, GFP_KERNEL);
460 if (unlikely(cmd == NULL)) {
461 DRM_ERROR("Temporary fifo memory alloc failed.\n");
462 ret = -ENOMEM;
463 goto out_free_tmp;
464 }
465
466 /* setup blits pointer */
467 blits = (SVGASignedRect *)&cmd[1];
468
469 /* initial clip region */
470 left = clips->x1;
471 right = clips->x2;
472 top = clips->y1;
473 bottom = clips->y2;
474
475 /* skip the first clip rect */
476 for (i = 1, clips_ptr = clips + inc;
477 i < num_clips; i++, clips_ptr += inc) {
478 left = min_t(int, left, (int)clips_ptr->x1);
479 right = max_t(int, right, (int)clips_ptr->x2);
480 top = min_t(int, top, (int)clips_ptr->y1);
481 bottom = max_t(int, bottom, (int)clips_ptr->y2);
482 }
483
484 /* only need to do this once */
485 memset(cmd, 0, fifo_size);
486 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
487 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
488
489 cmd->body.srcRect.left = left;
490 cmd->body.srcRect.right = right;
491 cmd->body.srcRect.top = top;
492 cmd->body.srcRect.bottom = bottom;
493
494 clips_ptr = clips;
495 for (i = 0; i < num_clips; i++, clips_ptr += inc) {
496 tmp[i].x1 = clips_ptr->x1 - left;
497 tmp[i].x2 = clips_ptr->x2 - left;
498 tmp[i].y1 = clips_ptr->y1 - top;
499 tmp[i].y2 = clips_ptr->y2 - top;
500 }
501
502 /* do per unit writing, reuse fifo for each */
503 for (i = 0; i < num_units; i++) {
504 struct vmw_display_unit *unit = units[i];
505 struct vmw_clip_rect clip;
506 int num;
507
508 clip.x1 = left - unit->crtc.x;
509 clip.y1 = top - unit->crtc.y;
510 clip.x2 = right - unit->crtc.x;
511 clip.y2 = bottom - unit->crtc.y;
512
513 /* skip any crtcs that misses the clip region */
514 if (clip.x1 >= unit->crtc.mode.hdisplay ||
515 clip.y1 >= unit->crtc.mode.vdisplay ||
516 clip.x2 <= 0 || clip.y2 <= 0)
517 continue;
518
519 /*
520 * In order for the clip rects to be correctly scaled
521 * the src and dest rects needs to be the same size.
522 */
523 cmd->body.destRect.left = clip.x1;
524 cmd->body.destRect.right = clip.x2;
525 cmd->body.destRect.top = clip.y1;
526 cmd->body.destRect.bottom = clip.y2;
527
528 /* create a clip rect of the crtc in dest coords */
529 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
530 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
531 clip.x1 = 0 - clip.x1;
532 clip.y1 = 0 - clip.y1;
533
534 /* need to reset sid as it is changed by execbuf */
535 cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
536 cmd->body.destScreenId = unit->unit;
537
538 /* clip and write blits to cmd stream */
539 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
540
541 /* if no cliprects hit skip this */
542 if (num == 0)
543 continue;
544
545
546 /* recalculate package length */
547 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
548 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
549 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
550 fifo_size, 0, NULL);
551
552 if (unlikely(ret != 0))
553 break;
554 }
555
556
557 kfree(cmd);
558 out_free_tmp:
559 kfree(tmp);
560
561 return ret;
562 }
563
564 int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
565 struct drm_file *file_priv,
566 unsigned flags, unsigned color,
567 struct drm_clip_rect *clips,
568 unsigned num_clips)
569 {
570 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
571 struct vmw_master *vmaster = vmw_master(file_priv->master);
572 struct vmw_framebuffer_surface *vfbs =
573 vmw_framebuffer_to_vfbs(framebuffer);
574 struct drm_clip_rect norect;
575 int ret, inc = 1;
576
577 if (unlikely(vfbs->master != file_priv->master))
578 return -EINVAL;
579
580 /* Require ScreenObject support for 3D */
581 if (!dev_priv->sou_priv)
582 return -EINVAL;
583
584 ret = ttm_read_lock(&vmaster->lock, true);
585 if (unlikely(ret != 0))
586 return ret;
587
588 if (!num_clips) {
589 num_clips = 1;
590 clips = &norect;
591 norect.x1 = norect.y1 = 0;
592 norect.x2 = framebuffer->width;
593 norect.y2 = framebuffer->height;
594 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
595 num_clips /= 2;
596 inc = 2; /* skip source rects */
597 }
598
599 ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
600 flags, color,
601 clips, num_clips, inc);
602
603 ttm_read_unlock(&vmaster->lock);
604 return 0;
605 }
606
607 static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
608 .destroy = vmw_framebuffer_surface_destroy,
609 .dirty = vmw_framebuffer_surface_dirty,
610 .create_handle = vmw_framebuffer_create_handle,
611 };
612
613 static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
614 struct drm_file *file_priv,
615 struct vmw_surface *surface,
616 struct vmw_framebuffer **out,
617 const struct drm_mode_fb_cmd
618 *mode_cmd)
619
620 {
621 struct drm_device *dev = dev_priv->dev;
622 struct vmw_framebuffer_surface *vfbs;
623 enum SVGA3dSurfaceFormat format;
624 struct vmw_master *vmaster = vmw_master(file_priv->master);
625 int ret;
626
627 /* 3D is only supported on HWv8 hosts which supports screen objects */
628 if (!dev_priv->sou_priv)
629 return -ENOSYS;
630
631 /*
632 * Sanity checks.
633 */
634
635 /* Surface must be marked as a scanout. */
636 if (unlikely(!surface->scanout))
637 return -EINVAL;
638
639 if (unlikely(surface->mip_levels[0] != 1 ||
640 surface->num_sizes != 1 ||
641 surface->sizes[0].width < mode_cmd->width ||
642 surface->sizes[0].height < mode_cmd->height ||
643 surface->sizes[0].depth != 1)) {
644 DRM_ERROR("Incompatible surface dimensions "
645 "for requested mode.\n");
646 return -EINVAL;
647 }
648
649 switch (mode_cmd->depth) {
650 case 32:
651 format = SVGA3D_A8R8G8B8;
652 break;
653 case 24:
654 format = SVGA3D_X8R8G8B8;
655 break;
656 case 16:
657 format = SVGA3D_R5G6B5;
658 break;
659 case 15:
660 format = SVGA3D_A1R5G5B5;
661 break;
662 case 8:
663 format = SVGA3D_LUMINANCE8;
664 break;
665 default:
666 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
667 return -EINVAL;
668 }
669
670 if (unlikely(format != surface->format)) {
671 DRM_ERROR("Invalid surface format for requested mode.\n");
672 return -EINVAL;
673 }
674
675 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
676 if (!vfbs) {
677 ret = -ENOMEM;
678 goto out_err1;
679 }
680
681 ret = drm_framebuffer_init(dev, &vfbs->base.base,
682 &vmw_framebuffer_surface_funcs);
683 if (ret)
684 goto out_err2;
685
686 if (!vmw_surface_reference(surface)) {
687 DRM_ERROR("failed to reference surface %p\n", surface);
688 goto out_err3;
689 }
690
691 /* XXX get the first 3 from the surface info */
692 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
693 vfbs->base.base.pitch = mode_cmd->pitch;
694 vfbs->base.base.depth = mode_cmd->depth;
695 vfbs->base.base.width = mode_cmd->width;
696 vfbs->base.base.height = mode_cmd->height;
697 vfbs->surface = surface;
698 vfbs->base.user_handle = mode_cmd->handle;
699 vfbs->master = drm_master_get(file_priv->master);
700
701 mutex_lock(&vmaster->fb_surf_mutex);
702 list_add_tail(&vfbs->head, &vmaster->fb_surf);
703 mutex_unlock(&vmaster->fb_surf_mutex);
704
705 *out = &vfbs->base;
706
707 return 0;
708
709 out_err3:
710 drm_framebuffer_cleanup(&vfbs->base.base);
711 out_err2:
712 kfree(vfbs);
713 out_err1:
714 return ret;
715 }
716
717 /*
718 * Dmabuf framebuffer code
719 */
720
721 #define vmw_framebuffer_to_vfbd(x) \
722 container_of(x, struct vmw_framebuffer_dmabuf, base.base)
723
724 struct vmw_framebuffer_dmabuf {
725 struct vmw_framebuffer base;
726 struct vmw_dma_buffer *buffer;
727 };
728
729 void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
730 {
731 struct vmw_framebuffer_dmabuf *vfbd =
732 vmw_framebuffer_to_vfbd(framebuffer);
733
734 drm_framebuffer_cleanup(framebuffer);
735 vmw_dmabuf_unreference(&vfbd->buffer);
736 ttm_base_object_unref(&vfbd->base.user_obj);
737
738 kfree(vfbd);
739 }
740
741 static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
742 struct vmw_framebuffer *framebuffer,
743 unsigned flags, unsigned color,
744 struct drm_clip_rect *clips,
745 unsigned num_clips, int increment)
746 {
747 size_t fifo_size;
748 int i;
749
750 struct {
751 uint32_t header;
752 SVGAFifoCmdUpdate body;
753 } *cmd;
754
755 fifo_size = sizeof(*cmd) * num_clips;
756 cmd = vmw_fifo_reserve(dev_priv, fifo_size);
757 if (unlikely(cmd == NULL)) {
758 DRM_ERROR("Fifo reserve failed.\n");
759 return -ENOMEM;
760 }
761
762 memset(cmd, 0, fifo_size);
763 for (i = 0; i < num_clips; i++, clips += increment) {
764 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
765 cmd[i].body.x = cpu_to_le32(clips->x1);
766 cmd[i].body.y = cpu_to_le32(clips->y1);
767 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
768 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
769 }
770
771 vmw_fifo_commit(dev_priv, fifo_size);
772 return 0;
773 }
774
775 static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
776 struct vmw_private *dev_priv,
777 struct vmw_framebuffer *framebuffer)
778 {
779 int depth = framebuffer->base.depth;
780 size_t fifo_size;
781 int ret;
782
783 struct {
784 uint32_t header;
785 SVGAFifoCmdDefineGMRFB body;
786 } *cmd;
787
788 /* Emulate RGBA support, contrary to svga_reg.h this is not
789 * supported by hosts. This is only a problem if we are reading
790 * this value later and expecting what we uploaded back.
791 */
792 if (depth == 32)
793 depth = 24;
794
795 fifo_size = sizeof(*cmd);
796 cmd = kmalloc(fifo_size, GFP_KERNEL);
797 if (unlikely(cmd == NULL)) {
798 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
799 return -ENOMEM;
800 }
801
802 memset(cmd, 0, fifo_size);
803 cmd->header = SVGA_CMD_DEFINE_GMRFB;
804 cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
805 cmd->body.format.colorDepth = depth;
806 cmd->body.format.reserved = 0;
807 cmd->body.bytesPerLine = framebuffer->base.pitch;
808 cmd->body.ptr.gmrId = framebuffer->user_handle;
809 cmd->body.ptr.offset = 0;
810
811 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
812 fifo_size, 0, NULL);
813
814 kfree(cmd);
815
816 return ret;
817 }
818
819 static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
820 struct vmw_private *dev_priv,
821 struct vmw_framebuffer *framebuffer,
822 unsigned flags, unsigned color,
823 struct drm_clip_rect *clips,
824 unsigned num_clips, int increment)
825 {
826 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
827 struct drm_clip_rect *clips_ptr;
828 int i, k, num_units, ret;
829 struct drm_crtc *crtc;
830 size_t fifo_size;
831
832 struct {
833 uint32_t header;
834 SVGAFifoCmdBlitGMRFBToScreen body;
835 } *blits;
836
837 ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
838 if (unlikely(ret != 0))
839 return ret; /* define_gmrfb prints warnings */
840
841 fifo_size = sizeof(*blits) * num_clips;
842 blits = kmalloc(fifo_size, GFP_KERNEL);
843 if (unlikely(blits == NULL)) {
844 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
845 return -ENOMEM;
846 }
847
848 num_units = 0;
849 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
850 if (crtc->fb != &framebuffer->base)
851 continue;
852 units[num_units++] = vmw_crtc_to_du(crtc);
853 }
854
855 for (k = 0; k < num_units; k++) {
856 struct vmw_display_unit *unit = units[k];
857 int hit_num = 0;
858
859 clips_ptr = clips;
860 for (i = 0; i < num_clips; i++, clips_ptr += increment) {
861 int clip_x1 = clips_ptr->x1 - unit->crtc.x;
862 int clip_y1 = clips_ptr->y1 - unit->crtc.y;
863 int clip_x2 = clips_ptr->x2 - unit->crtc.x;
864 int clip_y2 = clips_ptr->y2 - unit->crtc.y;
865 int move_x, move_y;
866
867 /* skip any crtcs that misses the clip region */
868 if (clip_x1 >= unit->crtc.mode.hdisplay ||
869 clip_y1 >= unit->crtc.mode.vdisplay ||
870 clip_x2 <= 0 || clip_y2 <= 0)
871 continue;
872
873 /* clip size to crtc size */
874 clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay);
875 clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay);
876
877 /* translate both src and dest to bring clip into screen */
878 move_x = min_t(int, clip_x1, 0);
879 move_y = min_t(int, clip_y1, 0);
880
881 /* actual translate done here */
882 blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
883 blits[hit_num].body.destScreenId = unit->unit;
884 blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x;
885 blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y;
886 blits[hit_num].body.destRect.left = clip_x1 - move_x;
887 blits[hit_num].body.destRect.top = clip_y1 - move_y;
888 blits[hit_num].body.destRect.right = clip_x2;
889 blits[hit_num].body.destRect.bottom = clip_y2;
890 hit_num++;
891 }
892
893 /* no clips hit the crtc */
894 if (hit_num == 0)
895 continue;
896
897 fifo_size = sizeof(*blits) * hit_num;
898 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
899 fifo_size, 0, NULL);
900
901 if (unlikely(ret != 0))
902 break;
903 }
904
905 kfree(blits);
906
907 return ret;
908 }
909
910 int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
911 struct drm_file *file_priv,
912 unsigned flags, unsigned color,
913 struct drm_clip_rect *clips,
914 unsigned num_clips)
915 {
916 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
917 struct vmw_master *vmaster = vmw_master(file_priv->master);
918 struct vmw_framebuffer_dmabuf *vfbd =
919 vmw_framebuffer_to_vfbd(framebuffer);
920 struct drm_clip_rect norect;
921 int ret, increment = 1;
922
923 ret = ttm_read_lock(&vmaster->lock, true);
924 if (unlikely(ret != 0))
925 return ret;
926
927 if (!num_clips) {
928 num_clips = 1;
929 clips = &norect;
930 norect.x1 = norect.y1 = 0;
931 norect.x2 = framebuffer->width;
932 norect.y2 = framebuffer->height;
933 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
934 num_clips /= 2;
935 increment = 2;
936 }
937
938 if (dev_priv->ldu_priv) {
939 ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
940 flags, color,
941 clips, num_clips, increment);
942 } else {
943 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
944 flags, color,
945 clips, num_clips, increment);
946 }
947
948 ttm_read_unlock(&vmaster->lock);
949 return ret;
950 }
951
952 static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
953 .destroy = vmw_framebuffer_dmabuf_destroy,
954 .dirty = vmw_framebuffer_dmabuf_dirty,
955 .create_handle = vmw_framebuffer_create_handle,
956 };
957
958 /**
959 * Pin the dmabuffer to the start of vram.
960 */
961 static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
962 {
963 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
964 struct vmw_framebuffer_dmabuf *vfbd =
965 vmw_framebuffer_to_vfbd(&vfb->base);
966 int ret;
967
968 /* This code should not be used with screen objects */
969 BUG_ON(dev_priv->sou_priv);
970
971 vmw_overlay_pause_all(dev_priv);
972
973 ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
974
975 vmw_overlay_resume_all(dev_priv);
976
977 WARN_ON(ret != 0);
978
979 return 0;
980 }
981
982 static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
983 {
984 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
985 struct vmw_framebuffer_dmabuf *vfbd =
986 vmw_framebuffer_to_vfbd(&vfb->base);
987
988 if (!vfbd->buffer) {
989 WARN_ON(!vfbd->buffer);
990 return 0;
991 }
992
993 return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
994 }
995
996 static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
997 struct vmw_dma_buffer *dmabuf,
998 struct vmw_framebuffer **out,
999 const struct drm_mode_fb_cmd
1000 *mode_cmd)
1001
1002 {
1003 struct drm_device *dev = dev_priv->dev;
1004 struct vmw_framebuffer_dmabuf *vfbd;
1005 unsigned int requested_size;
1006 int ret;
1007
1008 requested_size = mode_cmd->height * mode_cmd->pitch;
1009 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
1010 DRM_ERROR("Screen buffer object size is too small "
1011 "for requested mode.\n");
1012 return -EINVAL;
1013 }
1014
1015 /* Limited framebuffer color depth support for screen objects */
1016 if (dev_priv->sou_priv) {
1017 switch (mode_cmd->depth) {
1018 case 32:
1019 case 24:
1020 /* Only support 32 bpp for 32 and 24 depth fbs */
1021 if (mode_cmd->bpp == 32)
1022 break;
1023
1024 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
1025 mode_cmd->depth, mode_cmd->bpp);
1026 return -EINVAL;
1027 case 16:
1028 case 15:
1029 /* Only support 16 bpp for 16 and 15 depth fbs */
1030 if (mode_cmd->bpp == 16)
1031 break;
1032
1033 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
1034 mode_cmd->depth, mode_cmd->bpp);
1035 return -EINVAL;
1036 default:
1037 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
1038 return -EINVAL;
1039 }
1040 }
1041
1042 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
1043 if (!vfbd) {
1044 ret = -ENOMEM;
1045 goto out_err1;
1046 }
1047
1048 ret = drm_framebuffer_init(dev, &vfbd->base.base,
1049 &vmw_framebuffer_dmabuf_funcs);
1050 if (ret)
1051 goto out_err2;
1052
1053 if (!vmw_dmabuf_reference(dmabuf)) {
1054 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
1055 goto out_err3;
1056 }
1057
1058 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
1059 vfbd->base.base.pitch = mode_cmd->pitch;
1060 vfbd->base.base.depth = mode_cmd->depth;
1061 vfbd->base.base.width = mode_cmd->width;
1062 vfbd->base.base.height = mode_cmd->height;
1063 if (!dev_priv->sou_priv) {
1064 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
1065 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
1066 }
1067 vfbd->base.dmabuf = true;
1068 vfbd->buffer = dmabuf;
1069 vfbd->base.user_handle = mode_cmd->handle;
1070 *out = &vfbd->base;
1071
1072 return 0;
1073
1074 out_err3:
1075 drm_framebuffer_cleanup(&vfbd->base.base);
1076 out_err2:
1077 kfree(vfbd);
1078 out_err1:
1079 return ret;
1080 }
1081
1082 /*
1083 * Generic Kernel modesetting functions
1084 */
1085
1086 static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
1087 struct drm_file *file_priv,
1088 struct drm_mode_fb_cmd *mode_cmd)
1089 {
1090 struct vmw_private *dev_priv = vmw_priv(dev);
1091 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1092 struct vmw_framebuffer *vfb = NULL;
1093 struct vmw_surface *surface = NULL;
1094 struct vmw_dma_buffer *bo = NULL;
1095 struct ttm_base_object *user_obj;
1096 int ret;
1097
1098 /**
1099 * This code should be conditioned on Screen Objects not being used.
1100 * If screen objects are used, we can allocate a GMR to hold the
1101 * requested framebuffer.
1102 */
1103
1104 if (!vmw_kms_validate_mode_vram(dev_priv,
1105 mode_cmd->pitch,
1106 mode_cmd->height)) {
1107 DRM_ERROR("VRAM size is too small for requested mode.\n");
1108 return ERR_PTR(-ENOMEM);
1109 }
1110
1111 /*
1112 * Take a reference on the user object of the resource
1113 * backing the kms fb. This ensures that user-space handle
1114 * lookups on that resource will always work as long as
1115 * it's registered with a kms framebuffer. This is important,
1116 * since vmw_execbuf_process identifies resources in the
1117 * command stream using user-space handles.
1118 */
1119
1120 user_obj = ttm_base_object_lookup(tfile, mode_cmd->handle);
1121 if (unlikely(user_obj == NULL)) {
1122 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1123 return ERR_PTR(-ENOENT);
1124 }
1125
1126 /* returns either a dmabuf or surface */
1127 ret = vmw_user_lookup_handle(dev_priv, tfile,
1128 mode_cmd->handle,
1129 &surface, &bo);
1130 if (ret)
1131 goto err_out;
1132
1133 /* Create the new framebuffer depending one what we got back */
1134 if (bo)
1135 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
1136 mode_cmd);
1137 else if (surface)
1138 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
1139 surface, &vfb, mode_cmd);
1140 else
1141 BUG();
1142
1143 err_out:
1144 /* vmw_user_lookup_handle takes one ref so does new_fb */
1145 if (bo)
1146 vmw_dmabuf_unreference(&bo);
1147 if (surface)
1148 vmw_surface_unreference(&surface);
1149
1150 if (ret) {
1151 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1152 ttm_base_object_unref(&user_obj);
1153 return ERR_PTR(ret);
1154 } else
1155 vfb->user_obj = user_obj;
1156
1157 return &vfb->base;
1158 }
1159
1160 static struct drm_mode_config_funcs vmw_kms_funcs = {
1161 .fb_create = vmw_kms_fb_create,
1162 };
1163
1164 int vmw_kms_present(struct vmw_private *dev_priv,
1165 struct drm_file *file_priv,
1166 struct vmw_framebuffer *vfb,
1167 struct vmw_surface *surface,
1168 uint32_t sid,
1169 int32_t destX, int32_t destY,
1170 struct drm_vmw_rect *clips,
1171 uint32_t num_clips)
1172 {
1173 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1174 struct drm_clip_rect *tmp;
1175 struct drm_crtc *crtc;
1176 size_t fifo_size;
1177 int i, k, num_units;
1178 int ret = 0; /* silence warning */
1179 int left, right, top, bottom;
1180
1181 struct {
1182 SVGA3dCmdHeader header;
1183 SVGA3dCmdBlitSurfaceToScreen body;
1184 } *cmd;
1185 SVGASignedRect *blits;
1186
1187 num_units = 0;
1188 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1189 if (crtc->fb != &vfb->base)
1190 continue;
1191 units[num_units++] = vmw_crtc_to_du(crtc);
1192 }
1193
1194 BUG_ON(surface == NULL);
1195 BUG_ON(!clips || !num_clips);
1196
1197 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
1198 if (unlikely(tmp == NULL)) {
1199 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
1200 return -ENOMEM;
1201 }
1202
1203 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
1204 cmd = kmalloc(fifo_size, GFP_KERNEL);
1205 if (unlikely(cmd == NULL)) {
1206 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1207 ret = -ENOMEM;
1208 goto out_free_tmp;
1209 }
1210
1211 left = clips->x;
1212 right = clips->x + clips->w;
1213 top = clips->y;
1214 bottom = clips->y + clips->h;
1215
1216 for (i = 1; i < num_clips; i++) {
1217 left = min_t(int, left, (int)clips[i].x);
1218 right = max_t(int, right, (int)clips[i].x + clips[i].w);
1219 top = min_t(int, top, (int)clips[i].y);
1220 bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
1221 }
1222
1223 /* only need to do this once */
1224 memset(cmd, 0, fifo_size);
1225 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
1226
1227 blits = (SVGASignedRect *)&cmd[1];
1228
1229 cmd->body.srcRect.left = left;
1230 cmd->body.srcRect.right = right;
1231 cmd->body.srcRect.top = top;
1232 cmd->body.srcRect.bottom = bottom;
1233
1234 for (i = 0; i < num_clips; i++) {
1235 tmp[i].x1 = clips[i].x - left;
1236 tmp[i].x2 = clips[i].x + clips[i].w - left;
1237 tmp[i].y1 = clips[i].y - top;
1238 tmp[i].y2 = clips[i].y + clips[i].h - top;
1239 }
1240
1241 for (k = 0; k < num_units; k++) {
1242 struct vmw_display_unit *unit = units[k];
1243 struct vmw_clip_rect clip;
1244 int num;
1245
1246 clip.x1 = left + destX - unit->crtc.x;
1247 clip.y1 = top + destY - unit->crtc.y;
1248 clip.x2 = right + destX - unit->crtc.x;
1249 clip.y2 = bottom + destY - unit->crtc.y;
1250
1251 /* skip any crtcs that misses the clip region */
1252 if (clip.x1 >= unit->crtc.mode.hdisplay ||
1253 clip.y1 >= unit->crtc.mode.vdisplay ||
1254 clip.x2 <= 0 || clip.y2 <= 0)
1255 continue;
1256
1257 /*
1258 * In order for the clip rects to be correctly scaled
1259 * the src and dest rects needs to be the same size.
1260 */
1261 cmd->body.destRect.left = clip.x1;
1262 cmd->body.destRect.right = clip.x2;
1263 cmd->body.destRect.top = clip.y1;
1264 cmd->body.destRect.bottom = clip.y2;
1265
1266 /* create a clip rect of the crtc in dest coords */
1267 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
1268 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
1269 clip.x1 = 0 - clip.x1;
1270 clip.y1 = 0 - clip.y1;
1271
1272 /* need to reset sid as it is changed by execbuf */
1273 cmd->body.srcImage.sid = sid;
1274 cmd->body.destScreenId = unit->unit;
1275
1276 /* clip and write blits to cmd stream */
1277 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
1278
1279 /* if no cliprects hit skip this */
1280 if (num == 0)
1281 continue;
1282
1283 /* recalculate package length */
1284 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
1285 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
1286 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
1287 fifo_size, 0, NULL);
1288
1289 if (unlikely(ret != 0))
1290 break;
1291 }
1292
1293 kfree(cmd);
1294 out_free_tmp:
1295 kfree(tmp);
1296
1297 return ret;
1298 }
1299
1300 int vmw_kms_readback(struct vmw_private *dev_priv,
1301 struct drm_file *file_priv,
1302 struct vmw_framebuffer *vfb,
1303 struct drm_vmw_fence_rep __user *user_fence_rep,
1304 struct drm_vmw_rect *clips,
1305 uint32_t num_clips)
1306 {
1307 struct vmw_framebuffer_dmabuf *vfbd =
1308 vmw_framebuffer_to_vfbd(&vfb->base);
1309 struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1310 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1311 struct drm_crtc *crtc;
1312 size_t fifo_size;
1313 int i, k, ret, num_units, blits_pos;
1314
1315 struct {
1316 uint32_t header;
1317 SVGAFifoCmdDefineGMRFB body;
1318 } *cmd;
1319 struct {
1320 uint32_t header;
1321 SVGAFifoCmdBlitScreenToGMRFB body;
1322 } *blits;
1323
1324 num_units = 0;
1325 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1326 if (crtc->fb != &vfb->base)
1327 continue;
1328 units[num_units++] = vmw_crtc_to_du(crtc);
1329 }
1330
1331 BUG_ON(dmabuf == NULL);
1332 BUG_ON(!clips || !num_clips);
1333
1334 /* take a safe guess at fifo size */
1335 fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1336 cmd = kmalloc(fifo_size, GFP_KERNEL);
1337 if (unlikely(cmd == NULL)) {
1338 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1339 return -ENOMEM;
1340 }
1341
1342 memset(cmd, 0, fifo_size);
1343 cmd->header = SVGA_CMD_DEFINE_GMRFB;
1344 cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1345 cmd->body.format.colorDepth = vfb->base.depth;
1346 cmd->body.format.reserved = 0;
1347 cmd->body.bytesPerLine = vfb->base.pitch;
1348 cmd->body.ptr.gmrId = vfb->user_handle;
1349 cmd->body.ptr.offset = 0;
1350
1351 blits = (void *)&cmd[1];
1352 blits_pos = 0;
1353 for (i = 0; i < num_units; i++) {
1354 struct drm_vmw_rect *c = clips;
1355 for (k = 0; k < num_clips; k++, c++) {
1356 /* transform clip coords to crtc origin based coords */
1357 int clip_x1 = c->x - units[i]->crtc.x;
1358 int clip_x2 = c->x - units[i]->crtc.x + c->w;
1359 int clip_y1 = c->y - units[i]->crtc.y;
1360 int clip_y2 = c->y - units[i]->crtc.y + c->h;
1361 int dest_x = c->x;
1362 int dest_y = c->y;
1363
1364 /* compensate for clipping, we negate
1365 * a negative number and add that.
1366 */
1367 if (clip_x1 < 0)
1368 dest_x += -clip_x1;
1369 if (clip_y1 < 0)
1370 dest_y += -clip_y1;
1371
1372 /* clip */
1373 clip_x1 = max(clip_x1, 0);
1374 clip_y1 = max(clip_y1, 0);
1375 clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1376 clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1377
1378 /* and cull any rects that misses the crtc */
1379 if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1380 clip_y1 >= units[i]->crtc.mode.vdisplay ||
1381 clip_x2 <= 0 || clip_y2 <= 0)
1382 continue;
1383
1384 blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1385 blits[blits_pos].body.srcScreenId = units[i]->unit;
1386 blits[blits_pos].body.destOrigin.x = dest_x;
1387 blits[blits_pos].body.destOrigin.y = dest_y;
1388
1389 blits[blits_pos].body.srcRect.left = clip_x1;
1390 blits[blits_pos].body.srcRect.top = clip_y1;
1391 blits[blits_pos].body.srcRect.right = clip_x2;
1392 blits[blits_pos].body.srcRect.bottom = clip_y2;
1393 blits_pos++;
1394 }
1395 }
1396 /* reset size here and use calculated exact size from loops */
1397 fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1398
1399 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
1400 0, user_fence_rep);
1401
1402 kfree(cmd);
1403
1404 return ret;
1405 }
1406
1407 int vmw_kms_init(struct vmw_private *dev_priv)
1408 {
1409 struct drm_device *dev = dev_priv->dev;
1410 int ret;
1411
1412 drm_mode_config_init(dev);
1413 dev->mode_config.funcs = &vmw_kms_funcs;
1414 dev->mode_config.min_width = 1;
1415 dev->mode_config.min_height = 1;
1416 /* assumed largest fb size */
1417 dev->mode_config.max_width = 8192;
1418 dev->mode_config.max_height = 8192;
1419
1420 ret = vmw_kms_init_screen_object_display(dev_priv);
1421 if (ret) /* Fallback */
1422 (void)vmw_kms_init_legacy_display_system(dev_priv);
1423
1424 return 0;
1425 }
1426
1427 int vmw_kms_close(struct vmw_private *dev_priv)
1428 {
1429 /*
1430 * Docs says we should take the lock before calling this function
1431 * but since it destroys encoders and our destructor calls
1432 * drm_encoder_cleanup which takes the lock we deadlock.
1433 */
1434 drm_mode_config_cleanup(dev_priv->dev);
1435 if (dev_priv->sou_priv)
1436 vmw_kms_close_screen_object_display(dev_priv);
1437 else
1438 vmw_kms_close_legacy_display_system(dev_priv);
1439 return 0;
1440 }
1441
1442 int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1443 struct drm_file *file_priv)
1444 {
1445 struct drm_vmw_cursor_bypass_arg *arg = data;
1446 struct vmw_display_unit *du;
1447 struct drm_mode_object *obj;
1448 struct drm_crtc *crtc;
1449 int ret = 0;
1450
1451
1452 mutex_lock(&dev->mode_config.mutex);
1453 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1454
1455 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1456 du = vmw_crtc_to_du(crtc);
1457 du->hotspot_x = arg->xhot;
1458 du->hotspot_y = arg->yhot;
1459 }
1460
1461 mutex_unlock(&dev->mode_config.mutex);
1462 return 0;
1463 }
1464
1465 obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
1466 if (!obj) {
1467 ret = -EINVAL;
1468 goto out;
1469 }
1470
1471 crtc = obj_to_crtc(obj);
1472 du = vmw_crtc_to_du(crtc);
1473
1474 du->hotspot_x = arg->xhot;
1475 du->hotspot_y = arg->yhot;
1476
1477 out:
1478 mutex_unlock(&dev->mode_config.mutex);
1479
1480 return ret;
1481 }
1482
1483 int vmw_kms_write_svga(struct vmw_private *vmw_priv,
1484 unsigned width, unsigned height, unsigned pitch,
1485 unsigned bpp, unsigned depth)
1486 {
1487 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1488 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1489 else if (vmw_fifo_have_pitchlock(vmw_priv))
1490 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1491 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1492 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
1493 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
1494
1495 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1496 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1497 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1498 return -EINVAL;
1499 }
1500
1501 return 0;
1502 }
1503
1504 int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1505 {
1506 struct vmw_vga_topology_state *save;
1507 uint32_t i;
1508
1509 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1510 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
1511 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
1512 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1513 vmw_priv->vga_pitchlock =
1514 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
1515 else if (vmw_fifo_have_pitchlock(vmw_priv))
1516 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1517 SVGA_FIFO_PITCHLOCK);
1518
1519 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1520 return 0;
1521
1522 vmw_priv->num_displays = vmw_read(vmw_priv,
1523 SVGA_REG_NUM_GUEST_DISPLAYS);
1524
1525 if (vmw_priv->num_displays == 0)
1526 vmw_priv->num_displays = 1;
1527
1528 for (i = 0; i < vmw_priv->num_displays; ++i) {
1529 save = &vmw_priv->vga_save[i];
1530 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1531 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1532 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1533 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1534 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1535 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1536 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1537 if (i == 0 && vmw_priv->num_displays == 1 &&
1538 save->width == 0 && save->height == 0) {
1539
1540 /*
1541 * It should be fairly safe to assume that these
1542 * values are uninitialized.
1543 */
1544
1545 save->width = vmw_priv->vga_width - save->pos_x;
1546 save->height = vmw_priv->vga_height - save->pos_y;
1547 }
1548 }
1549
1550 return 0;
1551 }
1552
1553 int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1554 {
1555 struct vmw_vga_topology_state *save;
1556 uint32_t i;
1557
1558 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1559 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
1560 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
1561 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1562 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1563 vmw_priv->vga_pitchlock);
1564 else if (vmw_fifo_have_pitchlock(vmw_priv))
1565 iowrite32(vmw_priv->vga_pitchlock,
1566 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1567
1568 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1569 return 0;
1570
1571 for (i = 0; i < vmw_priv->num_displays; ++i) {
1572 save = &vmw_priv->vga_save[i];
1573 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1574 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1575 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1576 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1577 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1578 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1579 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1580 }
1581
1582 return 0;
1583 }
1584
1585 bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1586 uint32_t pitch,
1587 uint32_t height)
1588 {
1589 return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
1590 }
1591
1592
1593 /**
1594 * Function called by DRM code called with vbl_lock held.
1595 */
1596 u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1597 {
1598 return 0;
1599 }
1600
1601 /**
1602 * Function called by DRM code called with vbl_lock held.
1603 */
1604 int vmw_enable_vblank(struct drm_device *dev, int crtc)
1605 {
1606 return -ENOSYS;
1607 }
1608
1609 /**
1610 * Function called by DRM code called with vbl_lock held.
1611 */
1612 void vmw_disable_vblank(struct drm_device *dev, int crtc)
1613 {
1614 }
1615
1616
1617 /*
1618 * Small shared kms functions.
1619 */
1620
1621 int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1622 struct drm_vmw_rect *rects)
1623 {
1624 struct drm_device *dev = dev_priv->dev;
1625 struct vmw_display_unit *du;
1626 struct drm_connector *con;
1627
1628 mutex_lock(&dev->mode_config.mutex);
1629
1630 #if 0
1631 {
1632 unsigned int i;
1633
1634 DRM_INFO("%s: new layout ", __func__);
1635 for (i = 0; i < num; i++)
1636 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1637 rects[i].w, rects[i].h);
1638 DRM_INFO("\n");
1639 }
1640 #endif
1641
1642 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1643 du = vmw_connector_to_du(con);
1644 if (num > du->unit) {
1645 du->pref_width = rects[du->unit].w;
1646 du->pref_height = rects[du->unit].h;
1647 du->pref_active = true;
1648 du->gui_x = rects[du->unit].x;
1649 du->gui_y = rects[du->unit].y;
1650 } else {
1651 du->pref_width = 800;
1652 du->pref_height = 600;
1653 du->pref_active = false;
1654 }
1655 con->status = vmw_du_connector_detect(con, true);
1656 }
1657
1658 mutex_unlock(&dev->mode_config.mutex);
1659
1660 return 0;
1661 }
1662
1663 void vmw_du_crtc_save(struct drm_crtc *crtc)
1664 {
1665 }
1666
1667 void vmw_du_crtc_restore(struct drm_crtc *crtc)
1668 {
1669 }
1670
1671 void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1672 u16 *r, u16 *g, u16 *b,
1673 uint32_t start, uint32_t size)
1674 {
1675 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1676 int i;
1677
1678 for (i = 0; i < size; i++) {
1679 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1680 r[i], g[i], b[i]);
1681 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1682 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1683 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1684 }
1685 }
1686
1687 void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1688 {
1689 }
1690
1691 void vmw_du_connector_save(struct drm_connector *connector)
1692 {
1693 }
1694
1695 void vmw_du_connector_restore(struct drm_connector *connector)
1696 {
1697 }
1698
1699 enum drm_connector_status
1700 vmw_du_connector_detect(struct drm_connector *connector, bool force)
1701 {
1702 uint32_t num_displays;
1703 struct drm_device *dev = connector->dev;
1704 struct vmw_private *dev_priv = vmw_priv(dev);
1705 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1706
1707 mutex_lock(&dev_priv->hw_mutex);
1708 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1709 mutex_unlock(&dev_priv->hw_mutex);
1710
1711 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1712 du->pref_active) ?
1713 connector_status_connected : connector_status_disconnected);
1714 }
1715
1716 static struct drm_display_mode vmw_kms_connector_builtin[] = {
1717 /* 640x480@60Hz */
1718 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1719 752, 800, 0, 480, 489, 492, 525, 0,
1720 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1721 /* 800x600@60Hz */
1722 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1723 968, 1056, 0, 600, 601, 605, 628, 0,
1724 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1725 /* 1024x768@60Hz */
1726 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1727 1184, 1344, 0, 768, 771, 777, 806, 0,
1728 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1729 /* 1152x864@75Hz */
1730 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1731 1344, 1600, 0, 864, 865, 868, 900, 0,
1732 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1733 /* 1280x768@60Hz */
1734 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1735 1472, 1664, 0, 768, 771, 778, 798, 0,
1736 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1737 /* 1280x800@60Hz */
1738 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1739 1480, 1680, 0, 800, 803, 809, 831, 0,
1740 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1741 /* 1280x960@60Hz */
1742 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1743 1488, 1800, 0, 960, 961, 964, 1000, 0,
1744 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1745 /* 1280x1024@60Hz */
1746 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1747 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1748 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1749 /* 1360x768@60Hz */
1750 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1751 1536, 1792, 0, 768, 771, 777, 795, 0,
1752 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1753 /* 1440x1050@60Hz */
1754 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1755 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1756 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1757 /* 1440x900@60Hz */
1758 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1759 1672, 1904, 0, 900, 903, 909, 934, 0,
1760 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1761 /* 1600x1200@60Hz */
1762 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1763 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1764 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1765 /* 1680x1050@60Hz */
1766 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1767 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1768 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1769 /* 1792x1344@60Hz */
1770 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1771 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1772 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1773 /* 1853x1392@60Hz */
1774 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1775 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1776 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1777 /* 1920x1200@60Hz */
1778 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1779 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1780 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1781 /* 1920x1440@60Hz */
1782 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1783 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1784 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1785 /* 2560x1600@60Hz */
1786 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1787 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1788 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1789 /* Terminate */
1790 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1791 };
1792
1793 /**
1794 * vmw_guess_mode_timing - Provide fake timings for a
1795 * 60Hz vrefresh mode.
1796 *
1797 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1798 * members filled in.
1799 */
1800 static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1801 {
1802 mode->hsync_start = mode->hdisplay + 50;
1803 mode->hsync_end = mode->hsync_start + 50;
1804 mode->htotal = mode->hsync_end + 50;
1805
1806 mode->vsync_start = mode->vdisplay + 50;
1807 mode->vsync_end = mode->vsync_start + 50;
1808 mode->vtotal = mode->vsync_end + 50;
1809
1810 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1811 mode->vrefresh = drm_mode_vrefresh(mode);
1812 }
1813
1814
1815 int vmw_du_connector_fill_modes(struct drm_connector *connector,
1816 uint32_t max_width, uint32_t max_height)
1817 {
1818 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1819 struct drm_device *dev = connector->dev;
1820 struct vmw_private *dev_priv = vmw_priv(dev);
1821 struct drm_display_mode *mode = NULL;
1822 struct drm_display_mode *bmode;
1823 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1824 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1825 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1826 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1827 };
1828 int i;
1829
1830 /* Add preferred mode */
1831 {
1832 mode = drm_mode_duplicate(dev, &prefmode);
1833 if (!mode)
1834 return 0;
1835 mode->hdisplay = du->pref_width;
1836 mode->vdisplay = du->pref_height;
1837 vmw_guess_mode_timing(mode);
1838
1839 if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
1840 mode->vdisplay)) {
1841 drm_mode_probed_add(connector, mode);
1842 } else {
1843 drm_mode_destroy(dev, mode);
1844 mode = NULL;
1845 }
1846
1847 if (du->pref_mode) {
1848 list_del_init(&du->pref_mode->head);
1849 drm_mode_destroy(dev, du->pref_mode);
1850 }
1851
1852 /* mode might be null here, this is intended */
1853 du->pref_mode = mode;
1854 }
1855
1856 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1857 bmode = &vmw_kms_connector_builtin[i];
1858 if (bmode->hdisplay > max_width ||
1859 bmode->vdisplay > max_height)
1860 continue;
1861
1862 if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
1863 bmode->vdisplay))
1864 continue;
1865
1866 mode = drm_mode_duplicate(dev, bmode);
1867 if (!mode)
1868 return 0;
1869 mode->vrefresh = drm_mode_vrefresh(mode);
1870
1871 drm_mode_probed_add(connector, mode);
1872 }
1873
1874 /* Move the prefered mode first, help apps pick the right mode. */
1875 if (du->pref_mode)
1876 list_move(&du->pref_mode->head, &connector->probed_modes);
1877
1878 drm_mode_connector_list_update(connector);
1879
1880 return 1;
1881 }
1882
1883 int vmw_du_connector_set_property(struct drm_connector *connector,
1884 struct drm_property *property,
1885 uint64_t val)
1886 {
1887 return 0;
1888 }
1889
1890
1891 int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1892 struct drm_file *file_priv)
1893 {
1894 struct vmw_private *dev_priv = vmw_priv(dev);
1895 struct drm_vmw_update_layout_arg *arg =
1896 (struct drm_vmw_update_layout_arg *)data;
1897 struct vmw_master *vmaster = vmw_master(file_priv->master);
1898 void __user *user_rects;
1899 struct drm_vmw_rect *rects;
1900 unsigned rects_size;
1901 int ret;
1902 int i;
1903 struct drm_mode_config *mode_config = &dev->mode_config;
1904
1905 ret = ttm_read_lock(&vmaster->lock, true);
1906 if (unlikely(ret != 0))
1907 return ret;
1908
1909 if (!arg->num_outputs) {
1910 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1911 vmw_du_update_layout(dev_priv, 1, &def_rect);
1912 goto out_unlock;
1913 }
1914
1915 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
1916 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1917 GFP_KERNEL);
1918 if (unlikely(!rects)) {
1919 ret = -ENOMEM;
1920 goto out_unlock;
1921 }
1922
1923 user_rects = (void __user *)(unsigned long)arg->rects;
1924 ret = copy_from_user(rects, user_rects, rects_size);
1925 if (unlikely(ret != 0)) {
1926 DRM_ERROR("Failed to get rects.\n");
1927 ret = -EFAULT;
1928 goto out_free;
1929 }
1930
1931 for (i = 0; i < arg->num_outputs; ++i) {
1932 if (rects[i].x < 0 ||
1933 rects[i].y < 0 ||
1934 rects[i].x + rects[i].w > mode_config->max_width ||
1935 rects[i].y + rects[i].h > mode_config->max_height) {
1936 DRM_ERROR("Invalid GUI layout.\n");
1937 ret = -EINVAL;
1938 goto out_free;
1939 }
1940 }
1941
1942 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1943
1944 out_free:
1945 kfree(rects);
1946 out_unlock:
1947 ttm_read_unlock(&vmaster->lock);
1948 return ret;
1949 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree