iommu/amd: Don't use MSI address range for DMA addresses
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86 / kernel / microcode_amd.c
blob67381a227d672276f42062336af02f226adf4036
1 /*
2 * AMD CPU Microcode Update Driver for Linux
3 * Copyright (C) 2008 Advanced Micro Devices Inc.
5 * Author: Peter Oruba <peter.oruba@amd.com>
7 * Based on work by:
8 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
10 * This driver allows to upgrade microcode on AMD
11 * family 0x10 and 0x11 processors.
13 * Licensed under the terms of the GNU General Public
14 * License version 2. See file COPYING for details.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/firmware.h>
20 #include <linux/pci_ids.h>
21 #include <linux/uaccess.h>
22 #include <linux/vmalloc.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/pci.h>
27 #include <asm/microcode.h>
28 #include <asm/processor.h>
29 #include <asm/msr.h>
31 MODULE_DESCRIPTION("AMD Microcode Update Driver");
32 MODULE_AUTHOR("Peter Oruba");
33 MODULE_LICENSE("GPL v2");
35 #define UCODE_MAGIC 0x00414d44
36 #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
37 #define UCODE_UCODE_TYPE 0x00000001
39 struct equiv_cpu_entry {
40 u32 installed_cpu;
41 u32 fixed_errata_mask;
42 u32 fixed_errata_compare;
43 u16 equiv_cpu;
44 u16 res;
45 } __attribute__((packed));
47 struct microcode_header_amd {
48 u32 data_code;
49 u32 patch_id;
50 u16 mc_patch_data_id;
51 u8 mc_patch_data_len;
52 u8 init_flag;
53 u32 mc_patch_data_checksum;
54 u32 nb_dev_id;
55 u32 sb_dev_id;
56 u16 processor_rev_id;
57 u8 nb_rev_id;
58 u8 sb_rev_id;
59 u8 bios_api_rev;
60 u8 reserved1[3];
61 u32 match_reg[8];
62 } __attribute__((packed));
64 struct microcode_amd {
65 struct microcode_header_amd hdr;
66 unsigned int mpb[0];
69 #define UCODE_CONTAINER_SECTION_HDR 8
70 #define UCODE_CONTAINER_HEADER_SIZE 12
72 static struct equiv_cpu_entry *equiv_cpu_table;
74 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
76 struct cpuinfo_x86 *c = &cpu_data(cpu);
77 u32 dummy;
79 memset(csig, 0, sizeof(*csig));
80 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
81 pr_warning("microcode: CPU%d: AMD CPU family 0x%x not "
82 "supported\n", cpu, c->x86);
83 return -1;
85 rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy);
86 pr_info("CPU%d: patch_level=0x%x\n", cpu, csig->rev);
87 return 0;
90 static int get_matching_microcode(int cpu, void *mc, int rev)
92 struct microcode_header_amd *mc_header = mc;
93 unsigned int current_cpu_id;
94 u16 equiv_cpu_id = 0;
95 unsigned int i = 0;
97 BUG_ON(equiv_cpu_table == NULL);
98 current_cpu_id = cpuid_eax(0x00000001);
100 while (equiv_cpu_table[i].installed_cpu != 0) {
101 if (current_cpu_id == equiv_cpu_table[i].installed_cpu) {
102 equiv_cpu_id = equiv_cpu_table[i].equiv_cpu;
103 break;
105 i++;
108 if (!equiv_cpu_id)
109 return 0;
111 if (mc_header->processor_rev_id != equiv_cpu_id)
112 return 0;
114 /* ucode might be chipset specific -- currently we don't support this */
115 if (mc_header->nb_dev_id || mc_header->sb_dev_id) {
116 pr_err("CPU%d: loading of chipset specific code not yet supported\n",
117 cpu);
118 return 0;
121 if (mc_header->patch_id <= rev)
122 return 0;
124 return 1;
127 static unsigned int verify_ucode_size(int cpu, const u8 *buf, unsigned int size)
129 struct cpuinfo_x86 *c = &cpu_data(cpu);
130 unsigned int max_size, actual_size;
132 #define F1XH_MPB_MAX_SIZE 2048
133 #define F14H_MPB_MAX_SIZE 1824
134 #define F15H_MPB_MAX_SIZE 4096
136 switch (c->x86) {
137 case 0x14:
138 max_size = F14H_MPB_MAX_SIZE;
139 break;
140 case 0x15:
141 max_size = F15H_MPB_MAX_SIZE;
142 break;
143 default:
144 max_size = F1XH_MPB_MAX_SIZE;
145 break;
148 actual_size = buf[4] + (buf[5] << 8);
150 if (actual_size > size || actual_size > max_size) {
151 pr_err("section size mismatch\n");
152 return 0;
155 return actual_size;
158 static int apply_microcode_amd(int cpu)
160 u32 rev, dummy;
161 int cpu_num = raw_smp_processor_id();
162 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
163 struct microcode_amd *mc_amd = uci->mc;
165 /* We should bind the task to the CPU */
166 BUG_ON(cpu_num != cpu);
168 if (mc_amd == NULL)
169 return 0;
171 wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
172 /* get patch id after patching */
173 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
175 /* check current patch id and patch's id for match */
176 if (rev != mc_amd->hdr.patch_id) {
177 pr_err("CPU%d: update failed (for patch_level=0x%x)\n",
178 cpu, mc_amd->hdr.patch_id);
179 return -1;
182 pr_info("CPU%d: updated (new patch_level=0x%x)\n", cpu, rev);
183 uci->cpu_sig.rev = rev;
185 return 0;
188 static int get_ucode_data(void *to, const u8 *from, size_t n)
190 memcpy(to, from, n);
191 return 0;
194 static void *
195 get_next_ucode(int cpu, const u8 *buf, unsigned int size, unsigned int *mc_size)
197 unsigned int actual_size = 0;
198 u8 section_hdr[UCODE_CONTAINER_SECTION_HDR];
199 void *mc = NULL;
201 if (get_ucode_data(section_hdr, buf, UCODE_CONTAINER_SECTION_HDR))
202 return NULL;
204 if (section_hdr[0] != UCODE_UCODE_TYPE) {
205 pr_err("error: invalid type field in container file section header\n");
206 return NULL;
209 actual_size = verify_ucode_size(cpu, buf, size);
210 if (!actual_size)
211 return NULL;
213 mc = vmalloc(actual_size);
214 if (!mc)
215 return NULL;
217 memset(mc, 0, actual_size);
218 get_ucode_data(mc, buf + UCODE_CONTAINER_SECTION_HDR, actual_size);
219 *mc_size = actual_size + UCODE_CONTAINER_SECTION_HDR;
221 return mc;
224 static int install_equiv_cpu_table(const u8 *buf)
226 u8 *container_hdr[UCODE_CONTAINER_HEADER_SIZE];
227 unsigned int *buf_pos = (unsigned int *)container_hdr;
228 unsigned long size;
230 if (get_ucode_data(&container_hdr, buf, UCODE_CONTAINER_HEADER_SIZE))
231 return 0;
233 size = buf_pos[2];
235 if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
236 pr_err("error: invalid type field in container file section header\n");
237 return 0;
240 equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size);
241 if (!equiv_cpu_table) {
242 pr_err("failed to allocate equivalent CPU table\n");
243 return 0;
246 buf += UCODE_CONTAINER_HEADER_SIZE;
247 if (get_ucode_data(equiv_cpu_table, buf, size)) {
248 vfree(equiv_cpu_table);
249 return 0;
252 return size + UCODE_CONTAINER_HEADER_SIZE; /* add header length */
255 static void free_equiv_cpu_table(void)
257 vfree(equiv_cpu_table);
258 equiv_cpu_table = NULL;
261 static enum ucode_state
262 generic_load_microcode(int cpu, const u8 *data, size_t size)
264 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
265 const u8 *ucode_ptr = data;
266 void *new_mc = NULL;
267 void *mc;
268 int new_rev = uci->cpu_sig.rev;
269 unsigned int leftover;
270 unsigned long offset;
271 enum ucode_state state = UCODE_OK;
273 offset = install_equiv_cpu_table(ucode_ptr);
274 if (!offset) {
275 pr_err("failed to create equivalent cpu table\n");
276 return UCODE_ERROR;
279 ucode_ptr += offset;
280 leftover = size - offset;
282 while (leftover) {
283 unsigned int uninitialized_var(mc_size);
284 struct microcode_header_amd *mc_header;
286 mc = get_next_ucode(cpu, ucode_ptr, leftover, &mc_size);
287 if (!mc)
288 break;
290 mc_header = (struct microcode_header_amd *)mc;
291 if (get_matching_microcode(cpu, mc, new_rev)) {
292 vfree(new_mc);
293 new_rev = mc_header->patch_id;
294 new_mc = mc;
295 } else
296 vfree(mc);
298 ucode_ptr += mc_size;
299 leftover -= mc_size;
302 if (new_mc) {
303 if (!leftover) {
304 vfree(uci->mc);
305 uci->mc = new_mc;
306 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
307 cpu, new_rev, uci->cpu_sig.rev);
308 } else {
309 vfree(new_mc);
310 state = UCODE_ERROR;
312 } else
313 state = UCODE_NFOUND;
315 free_equiv_cpu_table();
317 return state;
320 static enum ucode_state request_microcode_fw(int cpu, struct device *device)
322 const char *fw_name = "amd-ucode/microcode_amd.bin";
323 const struct firmware *firmware;
324 enum ucode_state ret;
326 if (request_firmware(&firmware, fw_name, device)) {
327 printk(KERN_ERR "microcode: failed to load file %s\n", fw_name);
328 return UCODE_NFOUND;
331 if (*(u32 *)firmware->data != UCODE_MAGIC) {
332 pr_err("invalid UCODE_MAGIC (0x%08x)\n",
333 *(u32 *)firmware->data);
334 return UCODE_ERROR;
337 ret = generic_load_microcode(cpu, firmware->data, firmware->size);
339 release_firmware(firmware);
341 return ret;
344 static enum ucode_state
345 request_microcode_user(int cpu, const void __user *buf, size_t size)
347 pr_info("AMD microcode update via /dev/cpu/microcode not supported\n");
348 return UCODE_ERROR;
351 static void microcode_fini_cpu_amd(int cpu)
353 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
355 vfree(uci->mc);
356 uci->mc = NULL;
359 static struct microcode_ops microcode_amd_ops = {
360 .request_microcode_user = request_microcode_user,
361 .request_microcode_fw = request_microcode_fw,
362 .collect_cpu_info = collect_cpu_info_amd,
363 .apply_microcode = apply_microcode_amd,
364 .microcode_fini_cpu = microcode_fini_cpu_amd,
367 struct microcode_ops * __init init_amd_microcode(void)
369 return &microcode_amd_ops;