?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
staging: rtl8192su: add Support for Belkin F5D8053 v6
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / staging / rtl8192su / r8192U_core.c
blob6d52d6adbb41f4878a9a6501dc04753eda145b8f
1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 * Linux device driver for RTL8192U
4 *
5 * Based on the r8187 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
27 #include <linux/vmalloc.h>
28
29 #undef LOOP_TEST
30 #undef DUMP_RX
31 #undef DUMP_TX
32 #undef DEBUG_TX_DESC2
33 #undef RX_DONT_PASS_UL
34 #undef DEBUG_EPROM
35 #undef DEBUG_RX_VERBOSE
36 #undef DUMMY_RX
37 #undef DEBUG_ZERO_RX
38 #undef DEBUG_RX_SKB
39 #undef DEBUG_TX_FRAG
40 #undef DEBUG_RX_FRAG
41 #undef DEBUG_TX_FILLDESC
42 #undef DEBUG_TX
43 #undef DEBUG_IRQ
44 #undef DEBUG_RX
45 #undef DEBUG_RXALLOC
46 #undef DEBUG_REGISTERS
47 #undef DEBUG_RING
48 #undef DEBUG_IRQ_TASKLET
49 #undef DEBUG_TX_ALLOC
50 #undef DEBUG_TX_DESC
51
52 #define CONFIG_RTL8192_IO_MAP
53
54 #include <asm/uaccess.h>
55 #include "r8192U.h"
56 #include "r8180_93cx6.h" /* Card EEPROM */
57 #include "r8192U_wx.h"
58
59 #include "r8192S_rtl8225.h"
60 #include "r8192S_hw.h"
61 #include "r8192S_phy.h"
62 #include "r8192S_phyreg.h"
63 #include "r8192S_Efuse.h"
64
65 #include "r819xU_cmdpkt.h"
66 #include "r8192U_dm.h"
67 //#include "r8192xU_phyreg.h"
68 #include <linux/usb.h>
69
70 #include "r8192U_pm.h"
71
72 #include "ieee80211/dot11d.h"
73
74
75
76 u32 rt_global_debug_component = \
77 // COMP_TRACE |
78 // COMP_DBG |
79 // COMP_INIT |
80 // COMP_RECV |
81 // COMP_SEND |
82 // COMP_IO |
83 COMP_POWER |
84 // COMP_EPROM |
85 COMP_SWBW |
86 COMP_POWER_TRACKING |
87 COMP_TURBO |
88 COMP_QOS |
89 // COMP_RATE |
90 // COMP_RM |
91 COMP_DIG |
92 // COMP_EFUSE |
93 // COMP_CH |
94 // COMP_TXAGC |
95 COMP_HIPWR |
96 // COMP_HALDM |
97 COMP_SEC |
98 COMP_LED |
99 // COMP_RF |
100 // COMP_RXDESC |
101 COMP_FIRMWARE |
102 COMP_HT |
103 COMP_AMSDU |
104 COMP_SCAN |
105 // COMP_CMD |
106 COMP_DOWN |
107 COMP_RESET |
108 COMP_ERR; //always open err flags on
109
110 #define TOTAL_CAM_ENTRY 32
111 #define CAM_CONTENT_COUNT 8
112
113 static struct usb_device_id rtl8192_usb_id_tbl[] = {
114 /* Realtek */
115 {USB_DEVICE(0x0bda, 0x8171)},
116 {USB_DEVICE(0x0bda, 0x8192)},
117 {USB_DEVICE(0x0bda, 0x8709)},
118 /* Corega */
119 {USB_DEVICE(0x07aa, 0x0043)},
120 /* Belkin */
121 {USB_DEVICE(0x050d, 0x805E)},
122 {USB_DEVICE(0x050d, 0x815F)}, /* Belkin F5D8053 v6 */
123 /* Sitecom */
124 {USB_DEVICE(0x0df6, 0x0031)},
125 {USB_DEVICE(0x0df6, 0x004b)}, /* WL-349 */
126 /* EnGenius */
127 {USB_DEVICE(0x1740, 0x9201)},
128 /* Dlink */
129 {USB_DEVICE(0x2001, 0x3301)},
130 /* Zinwell */
131 {USB_DEVICE(0x5a57, 0x0290)},
132 /* Guillemot */
133 {USB_DEVICE(0x06f8, 0xe031)},
134 //92SU
135 {USB_DEVICE(0x0bda, 0x8172)},
136 {}
137 };
138
139 MODULE_LICENSE("GPL");
140 MODULE_VERSION("V 1.1");
141 MODULE_DEVICE_TABLE(usb, rtl8192_usb_id_tbl);
142 MODULE_DESCRIPTION("Linux driver for Realtek RTL8192 USB WiFi cards");
143
144 static char* ifname = "wlan%d";
145 static int hwwep = 1; //default use hw. set 0 to use software security
146 static int channels = 0x3fff;
147
148
149
150 module_param(ifname, charp, S_IRUGO|S_IWUSR );
151 //module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
152 module_param(hwwep,int, S_IRUGO|S_IWUSR);
153 module_param(channels,int, S_IRUGO|S_IWUSR);
154
155 MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
156 //MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
157 MODULE_PARM_DESC(hwwep," Try to use hardware security support. ");
158 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
159
160 static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
161 const struct usb_device_id *id);
162 static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf);
163
164 static struct usb_driver rtl8192_usb_driver = {
165 .name = RTL819xU_MODULE_NAME, /* Driver name */
166 .id_table = rtl8192_usb_id_tbl, /* PCI_ID table */
167 .probe = rtl8192_usb_probe, /* probe fn */
168 .disconnect = rtl8192_usb_disconnect, /* remove fn */
169 .suspend = rtl8192U_suspend, /* PM suspend fn */
170 .resume = rtl8192U_resume, /* PM resume fn */
171 .reset_resume = rtl8192U_resume, /* PM reset resume fn */
172 };
173
174
175 static void rtl8192SU_read_eeprom_info(struct net_device *dev);
176 short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb);
177 void rtl8192SU_rx_nomal(struct sk_buff* skb);
178 void rtl8192SU_rx_cmd(struct sk_buff *skb);
179 bool rtl8192SU_adapter_start(struct net_device *dev);
180 short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb);
181 void rtl8192SU_link_change(struct net_device *dev);
182 void InitialGain8192S(struct net_device *dev,u8 Operation);
183 void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe);
184
185 struct rtl819x_ops rtl8192su_ops = {
186 .nic_type = NIC_8192SU,
187 .rtl819x_read_eeprom_info = rtl8192SU_read_eeprom_info,
188 .rtl819x_tx = rtl8192SU_tx,
189 .rtl819x_tx_cmd = rtl8192SU_tx_cmd,
190 .rtl819x_rx_nomal = rtl8192SU_rx_nomal,
191 .rtl819x_rx_cmd = rtl8192SU_rx_cmd,
192 .rtl819x_adapter_start = rtl8192SU_adapter_start,
193 .rtl819x_link_change = rtl8192SU_link_change,
194 .rtl819x_initial_gain = InitialGain8192S,
195 .rtl819x_query_rxdesc_status = rtl8192SU_query_rxdesc_status,
196 };
197
198
199 typedef struct _CHANNEL_LIST
200 {
201 u8 Channel[32];
202 u8 Len;
203 }CHANNEL_LIST, *PCHANNEL_LIST;
204
205 static CHANNEL_LIST ChannelPlan[] = {
206 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
207 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
208 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
209 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
210 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
211 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
212 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
213 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
214 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
215 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
216 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
217 };
218
219 static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
220 {
221 int i, max_chan=-1, min_chan=-1;
222 struct ieee80211_device* ieee = priv->ieee80211;
223 switch (channel_plan)
224 {
225 case COUNTRY_CODE_FCC:
226 case COUNTRY_CODE_IC:
227 case COUNTRY_CODE_ETSI:
228 case COUNTRY_CODE_SPAIN:
229 case COUNTRY_CODE_FRANCE:
230 case COUNTRY_CODE_MKK:
231 case COUNTRY_CODE_MKK1:
232 case COUNTRY_CODE_ISRAEL:
233 case COUNTRY_CODE_TELEC:
234 case COUNTRY_CODE_MIC:
235 {
236 Dot11d_Init(ieee);
237 ieee->bGlobalDomain = false;
238 //acturally 8225 & 8256 rf chip only support B,G,24N mode
239 if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256) || (priv->rf_chip == RF_6052))
240 {
241 min_chan = 1;
242 max_chan = 14;
243 }
244 else
245 {
246 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
247 }
248 if (ChannelPlan[channel_plan].Len != 0){
249 // Clear old channel map
250 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
251 // Set new channel map
252 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
253 {
254 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
255 break;
256 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
257 }
258 }
259 break;
260 }
261 case COUNTRY_CODE_GLOBAL_DOMAIN:
262 {
263 GET_DOT11D_INFO(ieee)->bEnabled = 0;//this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain settings.
264 Dot11d_Reset(ieee);
265 ieee->bGlobalDomain = true;
266 break;
267 }
268 default:
269 break;
270 }
271 return;
272 }
273
274 #define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
275
276 #define rx_hal_is_cck_rate(_pDesc)\
277 ((_pDesc->RxMCS == DESC92S_RATE1M ||\
278 _pDesc->RxMCS == DESC92S_RATE2M ||\
279 _pDesc->RxMCS == DESC92S_RATE5_5M ||\
280 _pDesc->RxMCS == DESC92S_RATE11M) &&\
281 !_pDesc->RxHT)
282
283 #define tx_hal_is_cck_rate(_DataRate)\
284 ( _DataRate == MGN_1M ||\
285 _DataRate == MGN_2M ||\
286 _DataRate == MGN_5_5M ||\
287 _DataRate == MGN_11M )
288
289
290
291
292 void CamResetAllEntry(struct net_device *dev)
293 {
294 #if 1
295 u32 ulcommand = 0;
296 //2004/02/11 In static WEP, OID_ADD_KEY or OID_ADD_WEP are set before STA associate to AP.
297 // However, ResetKey is called on OID_802_11_INFRASTRUCTURE_MODE and MlmeAssociateRequest
298 // In this condition, Cam can not be reset because upper layer will not set this static key again.
299 //if(Adapter->EncAlgorithm == WEP_Encryption)
300 // return;
301 //debug
302 //DbgPrint("========================================\n");
303 //DbgPrint(" Call ResetAllEntry \n");
304 //DbgPrint("========================================\n\n");
305 ulcommand |= BIT31|BIT30;
306 write_nic_dword(dev, RWCAM, ulcommand);
307 #else
308 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
309 CAM_mark_invalid(dev, ucIndex);
310 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
311 CAM_empty_entry(dev, ucIndex);
312 #endif
313
314 }
315
316
317 void write_cam(struct net_device *dev, u8 addr, u32 data)
318 {
319 write_nic_dword(dev, WCAMI, data);
320 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
321 }
322
323 u32 read_cam(struct net_device *dev, u8 addr)
324 {
325 write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
326 return read_nic_dword(dev, 0xa8);
327 }
328
329 void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
330 {
331 int status;
332 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
333 struct usb_device *udev = priv->udev;
334
335 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
336 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
337 indx|0xfe00, 0, &data, 1, HZ / 2);
338
339 if (status < 0)
340 {
341 printk("write_nic_byte_E TimeOut! status:%d\n", status);
342 }
343 }
344
345 u8 read_nic_byte_E(struct net_device *dev, int indx)
346 {
347 int status;
348 u8 data;
349 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
350 struct usb_device *udev = priv->udev;
351
352 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
353 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
354 indx|0xfe00, 0, &data, 1, HZ / 2);
355
356 if (status < 0)
357 {
358 printk("read_nic_byte_E TimeOut! status:%d\n", status);
359 }
360
361 return data;
362 }
363 //as 92U has extend page from 4 to 16, so modify functions below.
364 void write_nic_byte(struct net_device *dev, int indx, u8 data)
365 {
366 int status;
367
368 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
369 struct usb_device *udev = priv->udev;
370
371 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
372 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
373 indx, 0, &data, 1, HZ / 2);
374
375 if (status < 0)
376 {
377 printk("write_nic_byte TimeOut! status:%d\n", status);
378 }
379
380
381 }
382
383
384 void write_nic_word(struct net_device *dev, int indx, u16 data)
385 {
386
387 int status;
388
389 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
390 struct usb_device *udev = priv->udev;
391
392 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
393 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
394 indx, 0, &data, 2, HZ / 2);
395
396 if (status < 0)
397 {
398 printk("write_nic_word TimeOut! status:%d\n", status);
399 }
400
401 }
402
403
404 void write_nic_dword(struct net_device *dev, int indx, u32 data)
405 {
406
407 int status;
408
409 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
410 struct usb_device *udev = priv->udev;
411
412 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
413 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
414 indx, 0, &data, 4, HZ / 2);
415
416
417 if (status < 0)
418 {
419 printk("write_nic_dword TimeOut! status:%d\n", status);
420 }
421
422 }
423
424
425
426 u8 read_nic_byte(struct net_device *dev, int indx)
427 {
428 u8 data;
429 int status;
430 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
431 struct usb_device *udev = priv->udev;
432
433 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
434 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
435 indx, 0, &data, 1, HZ / 2);
436
437 if (status < 0)
438 {
439 printk("read_nic_byte TimeOut! status:%d\n", status);
440 }
441
442 return data;
443 }
444
445
446
447 u16 read_nic_word(struct net_device *dev, int indx)
448 {
449 u16 data;
450 int status;
451 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
452 struct usb_device *udev = priv->udev;
453
454 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
455 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
456 indx, 0, &data, 2, HZ / 2);
457
458 if (status < 0)
459 {
460 printk("read_nic_word TimeOut! status:%d\n", status);
461 }
462
463
464 return data;
465 }
466
467 u16 read_nic_word_E(struct net_device *dev, int indx)
468 {
469 u16 data;
470 int status;
471 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
472 struct usb_device *udev = priv->udev;
473
474 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
475 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
476 indx|0xfe00, 0, &data, 2, HZ / 2);
477
478 if (status < 0)
479 {
480 printk("read_nic_word TimeOut! status:%d\n", status);
481 }
482
483
484 return data;
485 }
486
487 u32 read_nic_dword(struct net_device *dev, int indx)
488 {
489 u32 data;
490 int status;
491 // int result;
492
493 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
494 struct usb_device *udev = priv->udev;
495
496 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
497 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
498 indx, 0, &data, 4, HZ / 2);
499 // if(0 != result) {
500 // printk(KERN_WARNING "read size of data = %d\, date = %d\n", result, data);
501 // }
502
503 if (status < 0)
504 {
505 printk("read_nic_dword TimeOut! status:%d\n", status);
506 if(status == -ENODEV) {
507 priv->usb_error = true;
508 }
509 }
510
511
512
513 return data;
514 }
515
516
517 //u8 read_phy_cck(struct net_device *dev, u8 adr);
518 //u8 read_phy_ofdm(struct net_device *dev, u8 adr);
519 /* this might still called in what was the PHY rtl8185/rtl8192 common code
520 * plans are to possibilty turn it again in one common code...
521 */
522 inline void force_pci_posting(struct net_device *dev)
523 {
524 }
525
526
527 static struct net_device_stats *rtl8192_stats(struct net_device *dev);
528 void rtl8192_commit(struct net_device *dev);
529 //void rtl8192_restart(struct net_device *dev);
530 void rtl8192_restart(struct work_struct *work);
531 //void rtl8192_rq_tx_ack(struct work_struct *work);
532
533 void watch_dog_timer_callback(unsigned long data);
534
535 /****************************************************************************
536 -----------------------------PROCFS STUFF-------------------------
537 *****************************************************************************/
538
539 static struct proc_dir_entry *rtl8192_proc = NULL;
540
541
542
543 static int proc_get_stats_ap(char *page, char **start,
544 off_t offset, int count,
545 int *eof, void *data)
546 {
547 struct net_device *dev = data;
548 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
549 struct ieee80211_device *ieee = priv->ieee80211;
550 struct ieee80211_network *target;
551
552 int len = 0;
553
554 list_for_each_entry(target, &ieee->network_list, list) {
555
556 len += snprintf(page + len, count - len,
557 "%s ", target->ssid);
558
559 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
560 len += snprintf(page + len, count - len,
561 "WPA\n");
562 }
563 else{
564 len += snprintf(page + len, count - len,
565 "non_WPA\n");
566 }
567
568 }
569
570 *eof = 1;
571 return len;
572 }
573
574 static int proc_get_registers(char *page, char **start,
575 off_t offset, int count,
576 int *eof, void *data)
577 {
578 struct net_device *dev = data;
579 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
580
581 int len = 0;
582 int i,n,page0,page1,page2;
583
584 int max=0xff;
585 page0 = 0x000;
586 page1 = 0x100;
587 page2 = 0x800;
588
589 /* This dump the current register page */
590 if(!IS_BB_REG_OFFSET_92S(page0)){
591 len += snprintf(page + len, count - len,
592 "\n####################page %x##################\n ", (page0>>8));
593 for(n=0;n<=max;)
594 {
595 len += snprintf(page + len, count - len,
596 "\nD: %2x > ",n);
597 for(i=0;i<16 && n<=max;i++,n++)
598 len += snprintf(page + len, count - len,
599 "%2.2x ",read_nic_byte(dev,(page0|n)));
600 }
601 }else{
602 len += snprintf(page + len, count - len,
603 "\n####################page %x##################\n ", (page0>>8));
604 for(n=0;n<=max;)
605 {
606 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
607 for(i=0;i<4 && n<=max;n+=4,i++)
608 len += snprintf(page + len, count - len,
609 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
610 }
611 }
612 len += snprintf(page + len, count - len,"\n");
613 *eof = 1;
614 return len;
615
616 }
617 static int proc_get_registers_1(char *page, char **start,
618 off_t offset, int count,
619 int *eof, void *data)
620 {
621 struct net_device *dev = data;
622 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
623
624 int len = 0;
625 int i,n,page0;
626
627 int max=0xff;
628 page0 = 0x100;
629
630 /* This dump the current register page */
631 len += snprintf(page + len, count - len,
632 "\n####################page %x##################\n ", (page0>>8));
633 for(n=0;n<=max;)
634 {
635 len += snprintf(page + len, count - len,
636 "\nD: %2x > ",n);
637 for(i=0;i<16 && n<=max;i++,n++)
638 len += snprintf(page + len, count - len,
639 "%2.2x ",read_nic_byte(dev,(page0|n)));
640 }
641 len += snprintf(page + len, count - len,"\n");
642 *eof = 1;
643 return len;
644
645 }
646 static int proc_get_registers_2(char *page, char **start,
647 off_t offset, int count,
648 int *eof, void *data)
649 {
650 struct net_device *dev = data;
651 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
652
653 int len = 0;
654 int i,n,page0;
655
656 int max=0xff;
657 page0 = 0x200;
658
659 /* This dump the current register page */
660 len += snprintf(page + len, count - len,
661 "\n####################page %x##################\n ", (page0>>8));
662 for(n=0;n<=max;)
663 {
664 len += snprintf(page + len, count - len,
665 "\nD: %2x > ",n);
666 for(i=0;i<16 && n<=max;i++,n++)
667 len += snprintf(page + len, count - len,
668 "%2.2x ",read_nic_byte(dev,(page0|n)));
669 }
670 len += snprintf(page + len, count - len,"\n");
671 *eof = 1;
672 return len;
673
674 }
675 static int proc_get_registers_8(char *page, char **start,
676 off_t offset, int count,
677 int *eof, void *data)
678 {
679 struct net_device *dev = data;
680
681 int len = 0;
682 int i,n,page0;
683
684 int max=0xff;
685 page0 = 0x800;
686
687 /* This dump the current register page */
688 len += snprintf(page + len, count - len,
689 "\n####################page %x##################\n ", (page0>>8));
690 for(n=0;n<=max;)
691 {
692 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
693 for(i=0;i<4 && n<=max;n+=4,i++)
694 len += snprintf(page + len, count - len,
695 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
696 }
697 len += snprintf(page + len, count - len,"\n");
698 *eof = 1;
699 return len;
700
701 }
702 static int proc_get_registers_9(char *page, char **start,
703 off_t offset, int count,
704 int *eof, void *data)
705 {
706 struct net_device *dev = data;
707 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
708
709 int len = 0;
710 int i,n,page0;
711
712 int max=0xff;
713 page0 = 0x900;
714
715 /* This dump the current register page */
716 len += snprintf(page + len, count - len,
717 "\n####################page %x##################\n ", (page0>>8));
718 for(n=0;n<=max;)
719 {
720 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
721 for(i=0;i<4 && n<=max;n+=4,i++)
722 len += snprintf(page + len, count - len,
723 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
724 }
725 len += snprintf(page + len, count - len,"\n");
726 *eof = 1;
727 return len;
728 }
729 static int proc_get_registers_a(char *page, char **start,
730 off_t offset, int count,
731 int *eof, void *data)
732 {
733 struct net_device *dev = data;
734 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
735
736 int len = 0;
737 int i,n,page0;
738
739 int max=0xff;
740 page0 = 0xa00;
741
742 /* This dump the current register page */
743 len += snprintf(page + len, count - len,
744 "\n####################page %x##################\n ", (page0>>8));
745 for(n=0;n<=max;)
746 {
747 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
748 for(i=0;i<4 && n<=max;n+=4,i++)
749 len += snprintf(page + len, count - len,
750 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
751 }
752 len += snprintf(page + len, count - len,"\n");
753 *eof = 1;
754 return len;
755 }
756 static int proc_get_registers_b(char *page, char **start,
757 off_t offset, int count,
758 int *eof, void *data)
759 {
760 struct net_device *dev = data;
761 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
762
763 int len = 0;
764 int i,n,page0;
765
766 int max=0xff;
767 page0 = 0xb00;
768
769 /* This dump the current register page */
770 len += snprintf(page + len, count - len,
771 "\n####################page %x##################\n ", (page0>>8));
772 for(n=0;n<=max;)
773 {
774 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
775 for(i=0;i<4 && n<=max;n+=4,i++)
776 len += snprintf(page + len, count - len,
777 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
778 }
779 len += snprintf(page + len, count - len,"\n");
780 *eof = 1;
781 return len;
782 }
783 static int proc_get_registers_c(char *page, char **start,
784 off_t offset, int count,
785 int *eof, void *data)
786 {
787 struct net_device *dev = data;
788 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
789
790 int len = 0;
791 int i,n,page0;
792
793 int max=0xff;
794 page0 = 0xc00;
795
796 /* This dump the current register page */
797 len += snprintf(page + len, count - len,
798 "\n####################page %x##################\n ", (page0>>8));
799 for(n=0;n<=max;)
800 {
801 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
802 for(i=0;i<4 && n<=max;n+=4,i++)
803 len += snprintf(page + len, count - len,
804 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
805 }
806 len += snprintf(page + len, count - len,"\n");
807 *eof = 1;
808 return len;
809 }
810 static int proc_get_registers_d(char *page, char **start,
811 off_t offset, int count,
812 int *eof, void *data)
813 {
814 struct net_device *dev = data;
815 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
816
817 int len = 0;
818 int i,n,page0;
819
820 int max=0xff;
821 page0 = 0xd00;
822
823 /* This dump the current register page */
824 len += snprintf(page + len, count - len,
825 "\n####################page %x##################\n ", (page0>>8));
826 for(n=0;n<=max;)
827 {
828 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
829 for(i=0;i<4 && n<=max;n+=4,i++)
830 len += snprintf(page + len, count - len,
831 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
832 }
833 len += snprintf(page + len, count - len,"\n");
834 *eof = 1;
835 return len;
836 }
837 static int proc_get_registers_e(char *page, char **start,
838 off_t offset, int count,
839 int *eof, void *data)
840 {
841 struct net_device *dev = data;
842 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
843
844 int len = 0;
845 int i,n,page0;
846
847 int max=0xff;
848 page0 = 0xe00;
849
850 /* This dump the current register page */
851 len += snprintf(page + len, count - len,
852 "\n####################page %x##################\n ", (page0>>8));
853 for(n=0;n<=max;)
854 {
855 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
856 for(i=0;i<4 && n<=max;n+=4,i++)
857 len += snprintf(page + len, count - len,
858 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
859 }
860 len += snprintf(page + len, count - len,"\n");
861 *eof = 1;
862 return len;
863 }
864
865 static int proc_get_stats_tx(char *page, char **start,
866 off_t offset, int count,
867 int *eof, void *data)
868 {
869 struct net_device *dev = data;
870 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
871
872 int len = 0;
873
874 len += snprintf(page + len, count - len,
875 "TX VI priority ok int: %lu\n"
876 "TX VI priority error int: %lu\n"
877 "TX VO priority ok int: %lu\n"
878 "TX VO priority error int: %lu\n"
879 "TX BE priority ok int: %lu\n"
880 "TX BE priority error int: %lu\n"
881 "TX BK priority ok int: %lu\n"
882 "TX BK priority error int: %lu\n"
883 "TX MANAGE priority ok int: %lu\n"
884 "TX MANAGE priority error int: %lu\n"
885 "TX BEACON priority ok int: %lu\n"
886 "TX BEACON priority error int: %lu\n"
887 // "TX high priority ok int: %lu\n"
888 // "TX high priority failed error int: %lu\n"
889 "TX queue resume: %lu\n"
890 "TX queue stopped?: %d\n"
891 "TX fifo overflow: %lu\n"
892 // "TX beacon: %lu\n"
893 "TX VI queue: %d\n"
894 "TX VO queue: %d\n"
895 "TX BE queue: %d\n"
896 "TX BK queue: %d\n"
897 // "TX HW queue: %d\n"
898 "TX VI dropped: %lu\n"
899 "TX VO dropped: %lu\n"
900 "TX BE dropped: %lu\n"
901 "TX BK dropped: %lu\n"
902 "TX total data packets %lu\n",
903 // "TX beacon aborted: %lu\n",
904 priv->stats.txviokint,
905 priv->stats.txvierr,
906 priv->stats.txvookint,
907 priv->stats.txvoerr,
908 priv->stats.txbeokint,
909 priv->stats.txbeerr,
910 priv->stats.txbkokint,
911 priv->stats.txbkerr,
912 priv->stats.txmanageokint,
913 priv->stats.txmanageerr,
914 priv->stats.txbeaconokint,
915 priv->stats.txbeaconerr,
916 // priv->stats.txhpokint,
917 // priv->stats.txhperr,
918 priv->stats.txresumed,
919 netif_queue_stopped(dev),
920 priv->stats.txoverflow,
921 // priv->stats.txbeacon,
922 atomic_read(&(priv->tx_pending[VI_PRIORITY])),
923 atomic_read(&(priv->tx_pending[VO_PRIORITY])),
924 atomic_read(&(priv->tx_pending[BE_PRIORITY])),
925 atomic_read(&(priv->tx_pending[BK_PRIORITY])),
926 // read_nic_byte(dev, TXFIFOCOUNT),
927 priv->stats.txvidrop,
928 priv->stats.txvodrop,
929 priv->stats.txbedrop,
930 priv->stats.txbkdrop,
931 priv->stats.txdatapkt
932 // priv->stats.txbeaconerr
933 );
934
935 *eof = 1;
936 return len;
937 }
938
939
940
941 static int proc_get_stats_rx(char *page, char **start,
942 off_t offset, int count,
943 int *eof, void *data)
944 {
945 struct net_device *dev = data;
946 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
947
948 int len = 0;
949
950 len += snprintf(page + len, count - len,
951 "RX packets: %lu\n"
952 "RX urb status error: %lu\n"
953 "RX invalid urb error: %lu\n",
954 priv->stats.rxoktotal,
955 priv->stats.rxstaterr,
956 priv->stats.rxurberr);
957
958 *eof = 1;
959 return len;
960 }
961
962 void rtl8192_proc_module_init(void)
963 {
964 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
965 rtl8192_proc=create_proc_entry(RTL819xU_MODULE_NAME, S_IFDIR, init_net.proc_net);
966 }
967
968
969 void rtl8192_proc_module_remove(void)
970 {
971 remove_proc_entry(RTL819xU_MODULE_NAME, init_net.proc_net);
972 }
973
974
975 void rtl8192_proc_remove_one(struct net_device *dev)
976 {
977 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
978
979
980 if (priv->dir_dev) {
981 // remove_proc_entry("stats-hw", priv->dir_dev);
982 remove_proc_entry("stats-tx", priv->dir_dev);
983 remove_proc_entry("stats-rx", priv->dir_dev);
984 // remove_proc_entry("stats-ieee", priv->dir_dev);
985 remove_proc_entry("stats-ap", priv->dir_dev);
986 remove_proc_entry("registers", priv->dir_dev);
987 remove_proc_entry("registers-1", priv->dir_dev);
988 remove_proc_entry("registers-2", priv->dir_dev);
989 remove_proc_entry("registers-8", priv->dir_dev);
990 remove_proc_entry("registers-9", priv->dir_dev);
991 remove_proc_entry("registers-a", priv->dir_dev);
992 remove_proc_entry("registers-b", priv->dir_dev);
993 remove_proc_entry("registers-c", priv->dir_dev);
994 remove_proc_entry("registers-d", priv->dir_dev);
995 remove_proc_entry("registers-e", priv->dir_dev);
996 // remove_proc_entry("cck-registers",priv->dir_dev);
997 // remove_proc_entry("ofdm-registers",priv->dir_dev);
998 //remove_proc_entry(dev->name, rtl8192_proc);
999 remove_proc_entry("wlan0", rtl8192_proc);
1000 priv->dir_dev = NULL;
1001 }
1002 }
1003
1004
1005 void rtl8192_proc_init_one(struct net_device *dev)
1006 {
1007 struct proc_dir_entry *e;
1008 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1009 priv->dir_dev = create_proc_entry(dev->name,
1010 S_IFDIR | S_IRUGO | S_IXUGO,
1011 rtl8192_proc);
1012 if (!priv->dir_dev) {
1013 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
1014 dev->name);
1015 return;
1016 }
1017 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
1018 priv->dir_dev, proc_get_stats_rx, dev);
1019
1020 if (!e) {
1021 RT_TRACE(COMP_ERR,"Unable to initialize "
1022 "/proc/net/rtl8192/%s/stats-rx\n",
1023 dev->name);
1024 }
1025
1026
1027 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
1028 priv->dir_dev, proc_get_stats_tx, dev);
1029
1030 if (!e) {
1031 RT_TRACE(COMP_ERR, "Unable to initialize "
1032 "/proc/net/rtl8192/%s/stats-tx\n",
1033 dev->name);
1034 }
1035
1036 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
1037 priv->dir_dev, proc_get_stats_ap, dev);
1038
1039 if (!e) {
1040 RT_TRACE(COMP_ERR, "Unable to initialize "
1041 "/proc/net/rtl8192/%s/stats-ap\n",
1042 dev->name);
1043 }
1044
1045 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
1046 priv->dir_dev, proc_get_registers, dev);
1047 if (!e) {
1048 RT_TRACE(COMP_ERR, "Unable to initialize "
1049 "/proc/net/rtl8192/%s/registers\n",
1050 dev->name);
1051 }
1052 e = create_proc_read_entry("registers-1", S_IFREG | S_IRUGO,
1053 priv->dir_dev, proc_get_registers_1, dev);
1054 if (!e) {
1055 RT_TRACE(COMP_ERR, "Unable to initialize "
1056 "/proc/net/rtl8192/%s/registers-1\n",
1057 dev->name);
1058 }
1059 e = create_proc_read_entry("registers-2", S_IFREG | S_IRUGO,
1060 priv->dir_dev, proc_get_registers_2, dev);
1061 if (!e) {
1062 RT_TRACE(COMP_ERR, "Unable to initialize "
1063 "/proc/net/rtl8192/%s/registers-2\n",
1064 dev->name);
1065 }
1066 e = create_proc_read_entry("registers-8", S_IFREG | S_IRUGO,
1067 priv->dir_dev, proc_get_registers_8, dev);
1068 if (!e) {
1069 RT_TRACE(COMP_ERR, "Unable to initialize "
1070 "/proc/net/rtl8192/%s/registers-8\n",
1071 dev->name);
1072 }
1073 e = create_proc_read_entry("registers-9", S_IFREG | S_IRUGO,
1074 priv->dir_dev, proc_get_registers_9, dev);
1075 if (!e) {
1076 RT_TRACE(COMP_ERR, "Unable to initialize "
1077 "/proc/net/rtl8192/%s/registers-9\n",
1078 dev->name);
1079 }
1080 e = create_proc_read_entry("registers-a", S_IFREG | S_IRUGO,
1081 priv->dir_dev, proc_get_registers_a, dev);
1082 if (!e) {
1083 RT_TRACE(COMP_ERR, "Unable to initialize "
1084 "/proc/net/rtl8192/%s/registers-a\n",
1085 dev->name);
1086 }
1087 e = create_proc_read_entry("registers-b", S_IFREG | S_IRUGO,
1088 priv->dir_dev, proc_get_registers_b, dev);
1089 if (!e) {
1090 RT_TRACE(COMP_ERR, "Unable to initialize "
1091 "/proc/net/rtl8192/%s/registers-b\n",
1092 dev->name);
1093 }
1094 e = create_proc_read_entry("registers-c", S_IFREG | S_IRUGO,
1095 priv->dir_dev, proc_get_registers_c, dev);
1096 if (!e) {
1097 RT_TRACE(COMP_ERR, "Unable to initialize "
1098 "/proc/net/rtl8192/%s/registers-c\n",
1099 dev->name);
1100 }
1101 e = create_proc_read_entry("registers-d", S_IFREG | S_IRUGO,
1102 priv->dir_dev, proc_get_registers_d, dev);
1103 if (!e) {
1104 RT_TRACE(COMP_ERR, "Unable to initialize "
1105 "/proc/net/rtl8192/%s/registers-d\n",
1106 dev->name);
1107 }
1108 e = create_proc_read_entry("registers-e", S_IFREG | S_IRUGO,
1109 priv->dir_dev, proc_get_registers_e, dev);
1110 if (!e) {
1111 RT_TRACE(COMP_ERR, "Unable to initialize "
1112 "/proc/net/rtl8192/%s/registers-e\n",
1113 dev->name);
1114 }
1115 }
1116 /****************************************************************************
1117 -----------------------------MISC STUFF-------------------------
1118 *****************************************************************************/
1119
1120 /* this is only for debugging */
1121 void print_buffer(u32 *buffer, int len)
1122 {
1123 int i;
1124 u8 *buf =(u8*)buffer;
1125
1126 printk("ASCII BUFFER DUMP (len: %x):\n",len);
1127
1128 for(i=0;i<len;i++)
1129 printk("%c",buf[i]);
1130
1131 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
1132
1133 for(i=0;i<len;i++)
1134 printk("%x",buf[i]);
1135
1136 printk("\n");
1137 }
1138
1139 //short check_nic_enough_desc(struct net_device *dev, priority_t priority)
1140 short check_nic_enough_desc(struct net_device *dev,int queue_index)
1141 {
1142 struct r8192_priv *priv = ieee80211_priv(dev);
1143 int used = atomic_read(&priv->tx_pending[queue_index]);
1144
1145 return (used < MAX_TX_URB);
1146 }
1147
1148 void tx_timeout(struct net_device *dev)
1149 {
1150 struct r8192_priv *priv = ieee80211_priv(dev);
1151 //rtl8192_commit(dev);
1152
1153 schedule_work(&priv->reset_wq);
1154 //DMESG("TXTIMEOUT");
1155 }
1156
1157
1158 /* this is only for debug */
1159 void dump_eprom(struct net_device *dev)
1160 {
1161 int i;
1162 for(i=0; i<63; i++)
1163 RT_TRACE(COMP_EPROM, "EEPROM addr %x : %x", i, eprom_read(dev,i));
1164 }
1165
1166 /* this is only for debug */
1167 void rtl8192_dump_reg(struct net_device *dev)
1168 {
1169 int i;
1170 int n;
1171 int max=0x1ff;
1172
1173 RT_TRACE(COMP_PHY, "Dumping NIC register map");
1174
1175 for(n=0;n<=max;)
1176 {
1177 printk( "\nD: %2x> ", n);
1178 for(i=0;i<16 && n<=max;i++,n++)
1179 printk("%2x ",read_nic_byte(dev,n));
1180 }
1181 printk("\n");
1182 }
1183
1184 /****************************************************************************
1185 ------------------------------HW STUFF---------------------------
1186 *****************************************************************************/
1187
1188 void rtl8192_set_mode(struct net_device *dev,int mode)
1189 {
1190 u8 ecmd;
1191 ecmd=read_nic_byte(dev, EPROM_CMD);
1192 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1193 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1194 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1195 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1196 write_nic_byte(dev, EPROM_CMD, ecmd);
1197 }
1198
1199
1200 void rtl8192_update_msr(struct net_device *dev)
1201 {
1202 struct r8192_priv *priv = ieee80211_priv(dev);
1203 u8 msr;
1204
1205 msr = read_nic_byte(dev, MSR);
1206 msr &= ~ MSR_LINK_MASK;
1207
1208 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
1209 * msr must be updated if the state is ASSOCIATING.
1210 * this is intentional and make sense for ad-hoc and
1211 * master (see the create BSS/IBSS func)
1212 */
1213 if (priv->ieee80211->state == IEEE80211_LINKED){
1214
1215 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1216 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1217 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1218 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1219 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1220 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1221
1222 }else
1223 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1224
1225 write_nic_byte(dev, MSR, msr);
1226 }
1227
1228 void rtl8192_set_chan(struct net_device *dev,short ch)
1229 {
1230 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1231 // u32 tx;
1232 RT_TRACE(COMP_CH, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
1233 //printk("=====>%s()====ch:%d\n", __FUNCTION__, ch);
1234 priv->chan=ch;
1235
1236 /* this hack should avoid frame TX during channel setting*/
1237
1238
1239 // tx = read_nic_dword(dev,TX_CONF);
1240 // tx &= ~TX_LOOPBACK_MASK;
1241
1242 #ifndef LOOP_TEST
1243 // write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
1244
1245 //need to implement rf set channel here WB
1246
1247 if (priv->rf_set_chan)
1248 priv->rf_set_chan(dev,priv->chan);
1249 mdelay(10);
1250 // write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
1251 #endif
1252 }
1253
1254 static void rtl8192_rx_isr(struct urb *urb);
1255
1256 u32 get_rxpacket_shiftbytes_819xusb(struct ieee80211_rx_stats *pstats)
1257 {
1258
1259 return (sizeof(rx_desc_819x_usb) + pstats->RxDrvInfoSize
1260 + pstats->RxBufShift);
1261
1262 }
1263 static int rtl8192_rx_initiate(struct net_device*dev)
1264 {
1265 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1266 struct urb *entry;
1267 struct sk_buff *skb;
1268 struct rtl8192_rx_info *info;
1269
1270 /* nomal packet rx procedure */
1271 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB) {
1272 skb = __dev_alloc_skb(RX_URB_SIZE, GFP_KERNEL);
1273 if (!skb)
1274 break;
1275 entry = usb_alloc_urb(0, GFP_KERNEL);
1276 if (!entry) {
1277 kfree_skb(skb);
1278 break;
1279 }
1280 // printk("nomal packet IN request!\n");
1281 usb_fill_bulk_urb(entry, priv->udev,
1282 usb_rcvbulkpipe(priv->udev, 3), skb_tail_pointer(skb),
1283 RX_URB_SIZE, rtl8192_rx_isr, skb);
1284 info = (struct rtl8192_rx_info *) skb->cb;
1285 info->urb = entry;
1286 info->dev = dev;
1287 info->out_pipe = 3; //denote rx normal packet queue
1288 skb_queue_tail(&priv->rx_queue, skb);
1289 usb_submit_urb(entry, GFP_KERNEL);
1290 }
1291
1292 /* command packet rx procedure */
1293 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB + 3) {
1294 // printk("command packet IN request!\n");
1295 skb = __dev_alloc_skb(RX_URB_SIZE ,GFP_KERNEL);
1296 if (!skb)
1297 break;
1298 entry = usb_alloc_urb(0, GFP_KERNEL);
1299 if (!entry) {
1300 kfree_skb(skb);
1301 break;
1302 }
1303 usb_fill_bulk_urb(entry, priv->udev,
1304 usb_rcvbulkpipe(priv->udev, 9), skb_tail_pointer(skb),
1305 RX_URB_SIZE, rtl8192_rx_isr, skb);
1306 info = (struct rtl8192_rx_info *) skb->cb;
1307 info->urb = entry;
1308 info->dev = dev;
1309 info->out_pipe = 9; //denote rx cmd packet queue
1310 skb_queue_tail(&priv->rx_queue, skb);
1311 usb_submit_urb(entry, GFP_KERNEL);
1312 }
1313
1314 return 0;
1315 }
1316
1317 void rtl8192_set_rxconf(struct net_device *dev)
1318 {
1319 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1320 u32 rxconf;
1321
1322 rxconf=read_nic_dword(dev,RCR);
1323 rxconf = rxconf &~ MAC_FILTER_MASK;
1324 rxconf = rxconf | RCR_AMF;
1325 rxconf = rxconf | RCR_ADF;
1326 rxconf = rxconf | RCR_AB;
1327 rxconf = rxconf | RCR_AM;
1328 //rxconf = rxconf | RCR_ACF;
1329
1330 if (dev->flags & IFF_PROMISC) {DMESG ("NIC in promisc mode");}
1331
1332 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1333 dev->flags & IFF_PROMISC){
1334 rxconf = rxconf | RCR_AAP;
1335 } /*else if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1336 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1337 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1338 }*/else{
1339 rxconf = rxconf | RCR_APM;
1340 rxconf = rxconf | RCR_CBSSID;
1341 }
1342
1343
1344 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1345 rxconf = rxconf | RCR_AICV;
1346 rxconf = rxconf | RCR_APWRMGT;
1347 }
1348
1349 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1350 rxconf = rxconf | RCR_ACRC32;
1351
1352
1353 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1354 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1355 rxconf = rxconf &~ MAX_RX_DMA_MASK;
1356 rxconf = rxconf | ((u32)7<<RCR_MXDMA_OFFSET);
1357
1358 // rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1359 rxconf = rxconf | RCR_ONLYERLPKT;
1360
1361 // rxconf = rxconf &~ RCR_CS_MASK;
1362 // rxconf = rxconf | (1<<RCR_CS_SHIFT);
1363
1364 write_nic_dword(dev, RCR, rxconf);
1365
1366 #ifdef DEBUG_RX
1367 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RCR));
1368 #endif
1369 }
1370 //wait to be removed
1371 void rtl8192_rx_enable(struct net_device *dev)
1372 {
1373 //u8 cmd;
1374
1375 //struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1376
1377 rtl8192_rx_initiate(dev);
1378
1379 // rtl8192_set_rxconf(dev);
1380 }
1381
1382
1383 void rtl8192_tx_enable(struct net_device *dev)
1384 {
1385 }
1386
1387 void rtl8192_rtx_disable(struct net_device *dev)
1388 {
1389 u8 cmd;
1390 struct r8192_priv *priv = ieee80211_priv(dev);
1391 struct sk_buff *skb;
1392 struct rtl8192_rx_info *info;
1393
1394 cmd=read_nic_byte(dev,CMDR);
1395 write_nic_byte(dev, CMDR, cmd &~ \
1396 (CR_TE|CR_RE));
1397 force_pci_posting(dev);
1398 mdelay(10);
1399
1400 while ((skb = __skb_dequeue(&priv->rx_queue))) {
1401 info = (struct rtl8192_rx_info *) skb->cb;
1402 if (!info->urb)
1403 continue;
1404
1405 usb_kill_urb(info->urb);
1406 kfree_skb(skb);
1407 }
1408
1409 if (skb_queue_len(&priv->skb_queue)) {
1410 printk(KERN_WARNING "skb_queue not empty\n");
1411 }
1412
1413 skb_queue_purge(&priv->skb_queue);
1414 return;
1415 }
1416
1417
1418 int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1419 {
1420 return 0;
1421 }
1422
1423 inline u16 ieeerate2rtlrate(int rate)
1424 {
1425 switch(rate){
1426 case 10:
1427 return 0;
1428 case 20:
1429 return 1;
1430 case 55:
1431 return 2;
1432 case 110:
1433 return 3;
1434 case 60:
1435 return 4;
1436 case 90:
1437 return 5;
1438 case 120:
1439 return 6;
1440 case 180:
1441 return 7;
1442 case 240:
1443 return 8;
1444 case 360:
1445 return 9;
1446 case 480:
1447 return 10;
1448 case 540:
1449 return 11;
1450 default:
1451 return 3;
1452
1453 }
1454 }
1455 static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
1456 inline u16 rtl8192_rate2rate(short rate)
1457 {
1458 if (rate >11) return 0;
1459 return rtl_rate[rate];
1460 }
1461
1462 static void rtl8192_rx_isr(struct urb *urb)
1463 {
1464 struct sk_buff *skb = (struct sk_buff *) urb->context;
1465 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
1466 struct net_device *dev = info->dev;
1467 struct r8192_priv *priv = ieee80211_priv(dev);
1468 int out_pipe = info->out_pipe;
1469 int err;
1470 if(!priv->up)
1471 return;
1472 if (unlikely(urb->status)) {
1473 info->urb = NULL;
1474 priv->stats.rxstaterr++;
1475 priv->ieee80211->stats.rx_errors++;
1476 usb_free_urb(urb);
1477 // printk("%s():rx status err\n",__FUNCTION__);
1478 return;
1479 }
1480
1481 skb_unlink(skb, &priv->rx_queue);
1482 skb_put(skb, urb->actual_length);
1483
1484 skb_queue_tail(&priv->skb_queue, skb);
1485 tasklet_schedule(&priv->irq_rx_tasklet);
1486
1487 skb = dev_alloc_skb(RX_URB_SIZE);
1488 if (unlikely(!skb)) {
1489 usb_free_urb(urb);
1490 printk("%s():can,t alloc skb\n",__FUNCTION__);
1491 /* TODO check rx queue length and refill *somewhere* */
1492 return;
1493 }
1494
1495 usb_fill_bulk_urb(urb, priv->udev,
1496 usb_rcvbulkpipe(priv->udev, out_pipe),
1497 skb_tail_pointer(skb),
1498 RX_URB_SIZE, rtl8192_rx_isr, skb);
1499
1500 info = (struct rtl8192_rx_info *) skb->cb;
1501 info->urb = urb;
1502 info->dev = dev;
1503 info->out_pipe = out_pipe;
1504
1505 urb->transfer_buffer = skb_tail_pointer(skb);
1506 urb->context = skb;
1507 skb_queue_tail(&priv->rx_queue, skb);
1508 err = usb_submit_urb(urb, GFP_ATOMIC);
1509 if(err && err != EPERM)
1510 printk("can not submit rxurb, err is %x,URB status is %x\n",err,urb->status);
1511 }
1512
1513 u32
1514 rtl819xusb_rx_command_packet(
1515 struct net_device *dev,
1516 struct ieee80211_rx_stats *pstats
1517 )
1518 {
1519 u32 status;
1520
1521 //RT_TRACE(COMP_RECV, DBG_TRACE, ("---> RxCommandPacketHandle819xUsb()\n"));
1522
1523 status = cmpk_message_handle_rx(dev, pstats);
1524 if (status)
1525 {
1526 DMESG("rxcommandpackethandle819xusb: It is a command packet\n");
1527 }
1528 else
1529 {
1530 //RT_TRACE(COMP_RECV, DBG_TRACE, ("RxCommandPacketHandle819xUsb: It is not a command packet\n"));
1531 }
1532
1533 //RT_TRACE(COMP_RECV, DBG_TRACE, ("<--- RxCommandPacketHandle819xUsb()\n"));
1534 return status;
1535 }
1536
1537 void rtl8192_data_hard_stop(struct net_device *dev)
1538 {
1539 //FIXME !!
1540 }
1541
1542
1543 void rtl8192_data_hard_resume(struct net_device *dev)
1544 {
1545 // FIXME !!
1546 }
1547
1548 /* this function TX data frames when the ieee80211 stack requires this.
1549 * It checks also if we need to stop the ieee tx queue, eventually do it
1550 */
1551 void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
1552 {
1553 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1554 int ret;
1555 unsigned long flags;
1556 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1557 u8 queue_index = tcb_desc->queue_index;
1558
1559 /* shall not be referred by command packet */
1560 assert(queue_index != TXCMD_QUEUE);
1561
1562 spin_lock_irqsave(&priv->tx_lock,flags);
1563
1564 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1565 // tcb_desc->RATRIndex = 7;
1566 // tcb_desc->bTxDisableRateFallBack = 1;
1567 // tcb_desc->bTxUseDriverAssingedRate = 1;
1568 tcb_desc->bTxEnableFwCalcDur = 1;
1569 skb_push(skb, priv->ieee80211->tx_headroom);
1570 ret = priv->ops->rtl819x_tx(dev, skb);
1571
1572 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1573 //priv->ieee80211->stats.tx_packets++;
1574
1575 spin_unlock_irqrestore(&priv->tx_lock,flags);
1576
1577 // return ret;
1578 return;
1579 }
1580
1581 /* This is a rough attempt to TX a frame
1582 * This is called by the ieee 80211 stack to TX management frames.
1583 * If the ring is full packet are dropped (for data frame the queue
1584 * is stopped before this can happen).
1585 */
1586 int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
1587 {
1588 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1589 int ret;
1590 unsigned long flags;
1591 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1592 u8 queue_index = tcb_desc->queue_index;
1593
1594
1595 spin_lock_irqsave(&priv->tx_lock,flags);
1596
1597 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1598 if(queue_index == TXCMD_QUEUE) {
1599 skb_push(skb, USB_HWDESC_HEADER_LEN);
1600 priv->ops->rtl819x_tx_cmd(dev, skb);
1601 ret = 1;
1602 spin_unlock_irqrestore(&priv->tx_lock,flags);
1603 return ret;
1604 } else {
1605 skb_push(skb, priv->ieee80211->tx_headroom);
1606 ret = priv->ops->rtl819x_tx(dev, skb);
1607 }
1608
1609 spin_unlock_irqrestore(&priv->tx_lock,flags);
1610
1611 return ret;
1612 }
1613
1614
1615 void rtl8192_try_wake_queue(struct net_device *dev, int pri);
1616
1617
1618 static void rtl8192_tx_isr(struct urb *tx_urb)
1619 {
1620 struct sk_buff *skb = (struct sk_buff*)tx_urb->context;
1621 struct net_device *dev = NULL;
1622 struct r8192_priv *priv = NULL;
1623 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1624 u8 queue_index = tcb_desc->queue_index;
1625 // bool bToSend0Byte;
1626 // u16 BufLen = skb->len;
1627
1628 memcpy(&dev,(struct net_device*)(skb->cb),sizeof(struct net_device*));
1629 priv = ieee80211_priv(dev);
1630
1631 if(tcb_desc->queue_index != TXCMD_QUEUE) {
1632 if(tx_urb->status == 0) {
1633 // dev->trans_start = jiffies;
1634 // As act as station mode, destion shall be unicast address.
1635 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1636 //priv->ieee80211->stats.tx_packets++;
1637 priv->stats.txoktotal++;
1638 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
1639 priv->stats.txbytesunicast += (skb->len - priv->ieee80211->tx_headroom);
1640 } else {
1641 priv->ieee80211->stats.tx_errors++;
1642 //priv->stats.txmanageerr++;
1643 /* TODO */
1644 }
1645 }
1646
1647 /* free skb and tx_urb */
1648 if(skb != NULL) {
1649 dev_kfree_skb_any(skb);
1650 usb_free_urb(tx_urb);
1651 atomic_dec(&priv->tx_pending[queue_index]);
1652 }
1653
1654 {
1655 //
1656 // Handle HW Beacon:
1657 // We had transfer our beacon frame to host controler at this moment.
1658 //
1659 //
1660 // Caution:
1661 // Handling the wait queue of command packets.
1662 // For Tx command packets, we must not do TCB fragment because it is not handled right now.
1663 // We must cut the packets to match the size of TX_CMD_PKT before we send it.
1664 //
1665 if (queue_index == MGNT_QUEUE){
1666 if (priv->ieee80211->ack_tx_to_ieee){
1667 if (rtl8192_is_tx_queue_empty(dev)){
1668 priv->ieee80211->ack_tx_to_ieee = 0;
1669 ieee80211_ps_tx_ack(priv->ieee80211, 1);
1670 }
1671 }
1672 }
1673 /* Handle MPDU in wait queue. */
1674 if(queue_index != BEACON_QUEUE) {
1675 /* Don't send data frame during scanning.*/
1676 if((skb_queue_len(&priv->ieee80211->skb_waitQ[queue_index]) != 0)&&\
1677 (!(priv->ieee80211->queue_stop))) {
1678 if(NULL != (skb = skb_dequeue(&(priv->ieee80211->skb_waitQ[queue_index]))))
1679 priv->ieee80211->softmac_hard_start_xmit(skb, dev);
1680
1681 return; //modified by david to avoid further processing AMSDU
1682 }
1683 }
1684 }
1685 }
1686
1687 void rtl8192_beacon_stop(struct net_device *dev)
1688 {
1689 u8 msr, msrm, msr2;
1690 struct r8192_priv *priv = ieee80211_priv(dev);
1691
1692 msr = read_nic_byte(dev, MSR);
1693 msrm = msr & MSR_LINK_MASK;
1694 msr2 = msr & ~MSR_LINK_MASK;
1695
1696 if(NIC_8192U == priv->card_8192) {
1697 usb_kill_urb(priv->rx_urb[MAX_RX_URB]);
1698 }
1699 if ((msrm == (MSR_LINK_ADHOC<<MSR_LINK_SHIFT) ||
1700 (msrm == (MSR_LINK_MASTER<<MSR_LINK_SHIFT)))){
1701 write_nic_byte(dev, MSR, msr2 | MSR_LINK_NONE);
1702 write_nic_byte(dev, MSR, msr);
1703 }
1704 }
1705
1706 void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
1707 {
1708 struct r8192_priv *priv = ieee80211_priv(dev);
1709 struct ieee80211_network *net;
1710 u8 i=0, basic_rate = 0;
1711 net = & priv->ieee80211->current_network;
1712
1713 for (i=0; i<net->rates_len; i++)
1714 {
1715 basic_rate = net->rates[i]&0x7f;
1716 switch(basic_rate)
1717 {
1718 case MGN_1M: *rate_config |= RRSR_1M; break;
1719 case MGN_2M: *rate_config |= RRSR_2M; break;
1720 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1721 case MGN_11M: *rate_config |= RRSR_11M; break;
1722 case MGN_6M: *rate_config |= RRSR_6M; break;
1723 case MGN_9M: *rate_config |= RRSR_9M; break;
1724 case MGN_12M: *rate_config |= RRSR_12M; break;
1725 case MGN_18M: *rate_config |= RRSR_18M; break;
1726 case MGN_24M: *rate_config |= RRSR_24M; break;
1727 case MGN_36M: *rate_config |= RRSR_36M; break;
1728 case MGN_48M: *rate_config |= RRSR_48M; break;
1729 case MGN_54M: *rate_config |= RRSR_54M; break;
1730 }
1731 }
1732 for (i=0; i<net->rates_ex_len; i++)
1733 {
1734 basic_rate = net->rates_ex[i]&0x7f;
1735 switch(basic_rate)
1736 {
1737 case MGN_1M: *rate_config |= RRSR_1M; break;
1738 case MGN_2M: *rate_config |= RRSR_2M; break;
1739 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1740 case MGN_11M: *rate_config |= RRSR_11M; break;
1741 case MGN_6M: *rate_config |= RRSR_6M; break;
1742 case MGN_9M: *rate_config |= RRSR_9M; break;
1743 case MGN_12M: *rate_config |= RRSR_12M; break;
1744 case MGN_18M: *rate_config |= RRSR_18M; break;
1745 case MGN_24M: *rate_config |= RRSR_24M; break;
1746 case MGN_36M: *rate_config |= RRSR_36M; break;
1747 case MGN_48M: *rate_config |= RRSR_48M; break;
1748 case MGN_54M: *rate_config |= RRSR_54M; break;
1749 }
1750 }
1751 }
1752
1753
1754 #define SHORT_SLOT_TIME 9
1755 #define NON_SHORT_SLOT_TIME 20
1756
1757 void rtl8192_update_cap(struct net_device* dev, u16 cap)
1758 {
1759 //u32 tmp = 0;
1760 struct r8192_priv *priv = ieee80211_priv(dev);
1761 struct ieee80211_network *net = &priv->ieee80211->current_network;
1762 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1763
1764 //LZM MOD 090303 HW_VAR_ACK_PREAMBLE
1765 if(0)
1766 {
1767 u8 tmp = 0;
1768 tmp = ((priv->nCur40MhzPrimeSC) << 5);
1769 if (priv->short_preamble)
1770 tmp |= 0x80;
1771 write_nic_byte(dev, RRSR+2, tmp);
1772 }
1773
1774 if (net->mode & (IEEE_G|IEEE_N_24G))
1775 {
1776 u8 slot_time = 0;
1777 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1778 {//short slot time
1779 slot_time = SHORT_SLOT_TIME;
1780 }
1781 else //long slot time
1782 slot_time = NON_SHORT_SLOT_TIME;
1783 priv->slot_time = slot_time;
1784 write_nic_byte(dev, SLOT_TIME, slot_time);
1785 }
1786
1787 }
1788 void rtl8192_net_update(struct net_device *dev)
1789 {
1790
1791 struct r8192_priv *priv = ieee80211_priv(dev);
1792 struct ieee80211_network *net;
1793 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1794 u16 rate_config = 0;
1795 net = & priv->ieee80211->current_network;
1796
1797 rtl8192_config_rate(dev, &rate_config);
1798 priv->basic_rate = rate_config &= 0x15f;
1799
1800 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1801 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1802 //for(i=0;i<ETH_ALEN;i++)
1803 // write_nic_byte(dev,BSSID+i,net->bssid[i]);
1804
1805 rtl8192_update_msr(dev);
1806 // rtl8192_update_cap(dev, net->capability);
1807 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1808 {
1809 write_nic_word(dev, ATIMWND, 2);
1810 write_nic_word(dev, BCN_DMATIME, 1023);
1811 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1812 // write_nic_word(dev, BcnIntTime, 100);
1813 write_nic_word(dev, BCN_DRV_EARLY_INT, 1);
1814 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1815 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1816 // TODO: BcnIFS may required to be changed on ASIC
1817 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1818
1819 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1820 }
1821
1822
1823
1824 }
1825
1826 //temporary hw beacon is not used any more.
1827 //open it when necessary
1828 #if 1
1829 void rtl819xusb_beacon_tx(struct net_device *dev,u16 tx_rate)
1830 {
1831 }
1832 #endif
1833 inline u8 rtl8192_IsWirelessBMode(u16 rate)
1834 {
1835 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
1836 return 1;
1837 else return 0;
1838 }
1839
1840 u16 N_DBPSOfRate(u16 DataRate);
1841
1842 u16 ComputeTxTime(
1843 u16 FrameLength,
1844 u16 DataRate,
1845 u8 bManagementFrame,
1846 u8 bShortPreamble
1847 )
1848 {
1849 u16 FrameTime;
1850 u16 N_DBPS;
1851 u16 Ceiling;
1852
1853 if( rtl8192_IsWirelessBMode(DataRate) )
1854 {
1855 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
1856 { // long preamble
1857 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1858 }
1859 else
1860 { // Short preamble
1861 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1862 }
1863 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
1864 FrameTime ++;
1865 } else { //802.11g DSSS-OFDM PLCP length field calculation.
1866 N_DBPS = N_DBPSOfRate(DataRate);
1867 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1868 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1869 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1870 }
1871 return FrameTime;
1872 }
1873
1874 u16 N_DBPSOfRate(u16 DataRate)
1875 {
1876 u16 N_DBPS = 24;
1877
1878 switch(DataRate)
1879 {
1880 case 60:
1881 N_DBPS = 24;
1882 break;
1883
1884 case 90:
1885 N_DBPS = 36;
1886 break;
1887
1888 case 120:
1889 N_DBPS = 48;
1890 break;
1891
1892 case 180:
1893 N_DBPS = 72;
1894 break;
1895
1896 case 240:
1897 N_DBPS = 96;
1898 break;
1899
1900 case 360:
1901 N_DBPS = 144;
1902 break;
1903
1904 case 480:
1905 N_DBPS = 192;
1906 break;
1907
1908 case 540:
1909 N_DBPS = 216;
1910 break;
1911
1912 default:
1913 break;
1914 }
1915
1916 return N_DBPS;
1917 }
1918
1919 void rtl819xU_cmd_isr(struct urb *tx_cmd_urb, struct pt_regs *regs)
1920 {
1921 usb_free_urb(tx_cmd_urb);
1922 }
1923
1924 unsigned int txqueue2outpipe(struct r8192_priv* priv,unsigned int tx_queue) {
1925
1926 if(tx_queue >= 9)
1927 {
1928 RT_TRACE(COMP_ERR,"%s():Unknown queue ID!!!\n",__FUNCTION__);
1929 return 0x04;
1930 }
1931 return priv->txqueue_to_outpipemap[tx_queue];
1932 }
1933
1934 short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb)
1935 {
1936 struct r8192_priv *priv = ieee80211_priv(dev);
1937 int status;
1938 struct urb *tx_urb;
1939 unsigned int idx_pipe;
1940 tx_desc_cmd_819x_usb *pdesc = (tx_desc_cmd_819x_usb *)skb->data;
1941 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1942 u8 queue_index = tcb_desc->queue_index;
1943 u32 PktSize = 0;
1944
1945 //printk("\n %s::::::::::::::::::::::queue_index = %d\n",__FUNCTION__, queue_index);
1946 atomic_inc(&priv->tx_pending[queue_index]);
1947
1948 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
1949 if(!tx_urb){
1950 dev_kfree_skb(skb);
1951 return -ENOMEM;
1952 }
1953
1954 memset(pdesc, 0, USB_HWDESC_HEADER_LEN);
1955
1956 /* Tx descriptor ought to be set according to the skb->cb */
1957 pdesc->LINIP = tcb_desc->bLastIniPkt;
1958 PktSize = (u16)(skb->len - USB_HWDESC_HEADER_LEN);
1959 pdesc->PktSize = PktSize;
1960 //printk("PKTSize = %d %x\n",pdesc->PktSize,pdesc->PktSize);
1961 //----------------------------------------------------------------------------
1962 // Fill up USB_OUT_CONTEXT.
1963 //----------------------------------------------------------------------------
1964 // Get index to out pipe from specified QueueID.
1965 idx_pipe = txqueue2outpipe(priv,queue_index);
1966 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,queue_index,priv->RtOutPipes[idx_pipe]);
1967
1968 usb_fill_bulk_urb(tx_urb,
1969 priv->udev,
1970 usb_sndbulkpipe(priv->udev,priv->RtOutPipes[idx_pipe]),
1971 skb->data,
1972 skb->len,
1973 rtl8192_tx_isr,
1974 skb);
1975
1976 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
1977 if (!status){
1978 return 0;
1979 }else{
1980 printk("Error TX CMD URB, error %d",
1981 status);
1982 return -1;
1983 }
1984 }
1985
1986 /*
1987 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1988 * in TxFwInfo data structure
1989 * 2006.10.30 by Emily
1990 *
1991 * \param QUEUEID Software Queue
1992 */
1993 u8 MapHwQueueToFirmwareQueue(u8 QueueID)
1994 {
1995 u8 QueueSelect = 0x0; //defualt set to
1996
1997 switch(QueueID) {
1998 case BE_QUEUE:
1999 QueueSelect = QSLT_BE; //or QSelect = pTcb->priority;
2000 break;
2001
2002 case BK_QUEUE:
2003 QueueSelect = QSLT_BK; //or QSelect = pTcb->priority;
2004 break;
2005
2006 case VO_QUEUE:
2007 QueueSelect = QSLT_VO; //or QSelect = pTcb->priority;
2008 break;
2009
2010 case VI_QUEUE:
2011 QueueSelect = QSLT_VI; //or QSelect = pTcb->priority;
2012 break;
2013 case MGNT_QUEUE:
2014 QueueSelect = QSLT_MGNT;
2015 break;
2016
2017 case BEACON_QUEUE:
2018 QueueSelect = QSLT_BEACON;
2019 break;
2020
2021 // TODO: 2006.10.30 mark other queue selection until we verify it is OK
2022 // TODO: Remove Assertions
2023 //#if (RTL819X_FPGA_VER & RTL819X_FPGA_GUANGAN_070502)
2024 case TXCMD_QUEUE:
2025 QueueSelect = QSLT_CMD;
2026 break;
2027 //#endif
2028 case HIGH_QUEUE:
2029 QueueSelect = QSLT_HIGH;
2030 break;
2031
2032 default:
2033 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
2034 break;
2035 }
2036 return QueueSelect;
2037 }
2038
2039 u8 MRateToHwRate8190Pci(u8 rate)
2040 {
2041 u8 ret = DESC92S_RATE1M;
2042
2043 switch(rate)
2044 {
2045 // CCK and OFDM non-HT rates
2046 case MGN_1M: ret = DESC92S_RATE1M; break;
2047 case MGN_2M: ret = DESC92S_RATE2M; break;
2048 case MGN_5_5M: ret = DESC92S_RATE5_5M; break;
2049 case MGN_11M: ret = DESC92S_RATE11M; break;
2050 case MGN_6M: ret = DESC92S_RATE6M; break;
2051 case MGN_9M: ret = DESC92S_RATE9M; break;
2052 case MGN_12M: ret = DESC92S_RATE12M; break;
2053 case MGN_18M: ret = DESC92S_RATE18M; break;
2054 case MGN_24M: ret = DESC92S_RATE24M; break;
2055 case MGN_36M: ret = DESC92S_RATE36M; break;
2056 case MGN_48M: ret = DESC92S_RATE48M; break;
2057 case MGN_54M: ret = DESC92S_RATE54M; break;
2058
2059 // HT rates since here
2060 case MGN_MCS0: ret = DESC92S_RATEMCS0; break;
2061 case MGN_MCS1: ret = DESC92S_RATEMCS1; break;
2062 case MGN_MCS2: ret = DESC92S_RATEMCS2; break;
2063 case MGN_MCS3: ret = DESC92S_RATEMCS3; break;
2064 case MGN_MCS4: ret = DESC92S_RATEMCS4; break;
2065 case MGN_MCS5: ret = DESC92S_RATEMCS5; break;
2066 case MGN_MCS6: ret = DESC92S_RATEMCS6; break;
2067 case MGN_MCS7: ret = DESC92S_RATEMCS7; break;
2068 case MGN_MCS8: ret = DESC92S_RATEMCS8; break;
2069 case MGN_MCS9: ret = DESC92S_RATEMCS9; break;
2070 case MGN_MCS10: ret = DESC92S_RATEMCS10; break;
2071 case MGN_MCS11: ret = DESC92S_RATEMCS11; break;
2072 case MGN_MCS12: ret = DESC92S_RATEMCS12; break;
2073 case MGN_MCS13: ret = DESC92S_RATEMCS13; break;
2074 case MGN_MCS14: ret = DESC92S_RATEMCS14; break;
2075 case MGN_MCS15: ret = DESC92S_RATEMCS15; break;
2076
2077 // Set the highest SG rate
2078 case MGN_MCS0_SG:
2079 case MGN_MCS1_SG:
2080 case MGN_MCS2_SG:
2081 case MGN_MCS3_SG:
2082 case MGN_MCS4_SG:
2083 case MGN_MCS5_SG:
2084 case MGN_MCS6_SG:
2085 case MGN_MCS7_SG:
2086 case MGN_MCS8_SG:
2087 case MGN_MCS9_SG:
2088 case MGN_MCS10_SG:
2089 case MGN_MCS11_SG:
2090 case MGN_MCS12_SG:
2091 case MGN_MCS13_SG:
2092 case MGN_MCS14_SG:
2093 case MGN_MCS15_SG:
2094 {
2095 ret = DESC92S_RATEMCS15_SG;
2096 break;
2097 }
2098
2099 default: break;
2100 }
2101 return ret;
2102 }
2103
2104 u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
2105 {
2106 u8 tmp_Short;
2107
2108 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
2109
2110 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
2111 tmp_Short = 0;
2112
2113 return tmp_Short;
2114 }
2115
2116 static void tx_zero_isr(struct urb *tx_urb)
2117 {
2118 return;
2119 }
2120
2121
2122 /*
2123 * The tx procedure is just as following, skb->cb will contain all the following
2124 *information: * priority, morefrag, rate, &dev.
2125 * */
2126 // <Note> Buffer format for 8192S Usb bulk out:
2127 //
2128 // --------------------------------------------------
2129 // | 8192S Usb Tx Desc | 802_11_MAC_header | data |
2130 // --------------------------------------------------
2131 // | 32 bytes | 24 bytes |0-2318 bytes|
2132 // --------------------------------------------------
2133 // |<------------ BufferLen ------------------------->|
2134
2135 short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb)
2136 {
2137 struct r8192_priv *priv = ieee80211_priv(dev);
2138 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2139 tx_desc_819x_usb *tx_desc = (tx_desc_819x_usb *)skb->data;
2140 //tx_fwinfo_819x_usb *tx_fwinfo = (tx_fwinfo_819x_usb *)(skb->data + USB_HWDESC_HEADER_LEN);//92su del
2141 struct usb_device *udev = priv->udev;
2142 int pend;
2143 int status;
2144 struct urb *tx_urb = NULL, *tx_urb_zero = NULL;
2145 //int urb_len;
2146 unsigned int idx_pipe;
2147 u16 MPDUOverhead = 0;
2148 //RT_DEBUG_DATA(COMP_SEND, tcb_desc, sizeof(cb_desc));
2149
2150 pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]);
2151 /* we are locked here so the two atomic_read and inc are executed
2152 * without interleaves * !!! For debug purpose */
2153 if( pend > MAX_TX_URB){
2154 switch (tcb_desc->queue_index) {
2155 case VO_PRIORITY:
2156 priv->stats.txvodrop++;
2157 break;
2158 case VI_PRIORITY:
2159 priv->stats.txvidrop++;
2160 break;
2161 case BE_PRIORITY:
2162 priv->stats.txbedrop++;
2163 break;
2164 default://BK_PRIORITY
2165 priv->stats.txbkdrop++;
2166 break;
2167 }
2168 printk("To discard skb packet!\n");
2169 dev_kfree_skb_any(skb);
2170 return -1;
2171 }
2172
2173 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
2174 if(!tx_urb){
2175 dev_kfree_skb_any(skb);
2176 return -ENOMEM;
2177 }
2178
2179 memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2180
2181
2182 tx_desc->NonQos = (IsQoSDataFrame(skb->data)==TRUE)? 0:1;
2183
2184 /* Fill Tx descriptor */
2185 //memset(tx_fwinfo,0,sizeof(tx_fwinfo_819x_usb));
2186
2187 // This part can just fill to the first descriptor of the frame.
2188 /* DWORD 0 */
2189 tx_desc->TxHT = (tcb_desc->data_rate&0x80)?1:0;
2190
2191
2192 tx_desc->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
2193 //tx_desc->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
2194 tx_desc->TxShort = QueryIsShort(tx_desc->TxHT, tx_desc->TxRate, tcb_desc);
2195
2196
2197 // Aggregation related
2198 if(tcb_desc->bAMPDUEnable) {//AMPDU enabled
2199 tx_desc->AllowAggregation = 1;
2200 /* DWORD 1 */
2201 //tx_fwinfo->RxMF = tcb_desc->ampdu_factor;
2202 //tx_fwinfo->RxAMD = tcb_desc->ampdu_density&0x07;//ampdudensity
2203 } else {
2204 tx_desc->AllowAggregation = 0;
2205 /* DWORD 1 */
2206 //tx_fwinfo->RxMF = 0;
2207 //tx_fwinfo->RxAMD = 0;
2208 }
2209
2210 //
2211 // <Roger_Notes> For AMPDU case, we must insert SSN into TX_DESC,
2212 // FW according as this SSN to do necessary packet retry.
2213 // 2008.06.06.
2214 //
2215 {
2216 u8 *pSeq;
2217 u16 Temp;
2218 //pSeq = (u8 *)(VirtualAddress+USB_HWDESC_HEADER_LEN + FRAME_OFFSET_SEQUENCE);
2219 pSeq = (u8 *)(skb->data+USB_HWDESC_HEADER_LEN + 22);
2220 Temp = pSeq[0];
2221 Temp <<= 12;
2222 Temp |= (*(u16 *)pSeq)>>4;
2223 tx_desc->Seq = Temp;
2224 }
2225
2226 /* Protection mode related */
2227 tx_desc->RTSEn = (tcb_desc->bRTSEnable)?1:0;
2228 tx_desc->CTS2Self = (tcb_desc->bCTSEnable)?1:0;
2229 tx_desc->RTSSTBC = (tcb_desc->bRTSSTBC)?1:0;
2230 tx_desc->RTSHT = (tcb_desc->rts_rate&0x80)?1:0;
2231 tx_desc->RTSRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
2232 tx_desc->RTSSubcarrier = (tx_desc->RTSHT==0)?(tcb_desc->RTSSC):0;
2233 tx_desc->RTSBW = (tx_desc->RTSHT==1)?((tcb_desc->bRTSBW)?1:0):0;
2234 tx_desc->RTSShort = (tx_desc->RTSHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):\
2235 (tcb_desc->bRTSUseShortGI?1:0);
2236 //LZM 090219
2237 tx_desc->DisRTSFB = 0;
2238 tx_desc->RTSRateFBLmt = 0xf;
2239
2240 // <Roger_EXP> 2008.09.22. We disable RTS rate fallback temporarily.
2241 //tx_desc->DisRTSFB = 0x01;
2242
2243 /* Set Bandwidth and sub-channel settings. */
2244 if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
2245 {
2246 if(tcb_desc->bPacketBW) {
2247 tx_desc->TxBandwidth = 1;
2248 tx_desc->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode
2249 } else {
2250 tx_desc->TxBandwidth = 0;
2251 tx_desc->TxSubCarrier = priv->nCur40MhzPrimeSC;
2252 }
2253 } else {
2254 tx_desc->TxBandwidth = 0;
2255 tx_desc->TxSubCarrier = 0;
2256 }
2257
2258
2259 //memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2260 /* DWORD 0 */
2261 tx_desc->LINIP = 0;
2262 //tx_desc->CmdInit = 1; //92su del
2263 tx_desc->Offset = USB_HWDESC_HEADER_LEN;
2264
2265 {
2266 tx_desc->PktSize = (skb->len - USB_HWDESC_HEADER_LEN) & 0xffff;
2267 }
2268
2269 /*DWORD 1*/
2270 //tx_desc->SecCAMID= 0;//92su del
2271 tx_desc->RaBRSRID= tcb_desc->RATRIndex;
2272 //#ifdef RTL8192S_PREPARE_FOR_NORMAL_RELEASE
2273
2274 {
2275 MPDUOverhead = 0;
2276 //tx_desc->NoEnc = 1;//92su del
2277 }
2278
2279 tx_desc->SecType = 0x0;
2280
2281 if (tcb_desc->bHwSec)
2282 {
2283 switch (priv->ieee80211->pairwise_key_type)
2284 {
2285 case KEY_TYPE_WEP40:
2286 case KEY_TYPE_WEP104:
2287 tx_desc->SecType = 0x1;
2288 //tx_desc->NoEnc = 0;//92su del
2289 break;
2290 case KEY_TYPE_TKIP:
2291 tx_desc->SecType = 0x2;
2292 //tx_desc->NoEnc = 0;//92su del
2293 break;
2294 case KEY_TYPE_CCMP:
2295 tx_desc->SecType = 0x3;
2296 //tx_desc->NoEnc = 0;//92su del
2297 break;
2298 case KEY_TYPE_NA:
2299 tx_desc->SecType = 0x0;
2300 //tx_desc->NoEnc = 1;//92su del
2301 break;
2302 default:
2303 tx_desc->SecType = 0x0;
2304 //tx_desc->NoEnc = 1;//92su del
2305 break;
2306 }
2307 }
2308
2309 //tx_desc->TxFWInfoSize = sizeof(tx_fwinfo_819x_usb);//92su del
2310
2311
2312 tx_desc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
2313 tx_desc->DISFB = tcb_desc->bTxDisableRateFallBack;
2314 tx_desc->DataRateFBLmt = 0x1F;// Alwasy enable all rate fallback range
2315
2316 tx_desc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
2317
2318
2319 /* Fill fields that are required to be initialized in all of the descriptors */
2320 //DWORD 0
2321 tx_desc->FirstSeg = 1;
2322 tx_desc->LastSeg = 1;
2323 tx_desc->OWN = 1;
2324
2325 {
2326 //DWORD 2
2327 //tx_desc->TxBufferSize = (u32)(skb->len - USB_HWDESC_HEADER_LEN);
2328 tx_desc->TxBufferSize = (u32)(skb->len);//92su mod FIXLZM
2329 }
2330
2331 /* Get index to out pipe from specified QueueID */
2332 idx_pipe = txqueue2outpipe(priv,tcb_desc->queue_index);
2333 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,tcb_desc->queue_index,priv->RtOutPipes[idx_pipe]);
2334
2335 //RT_DEBUG_DATA(COMP_SEND,tx_fwinfo,sizeof(tx_fwinfo_819x_usb));
2336 //RT_DEBUG_DATA(COMP_SEND,tx_desc,sizeof(tx_desc_819x_usb));
2337
2338 /* To submit bulk urb */
2339 usb_fill_bulk_urb(tx_urb,
2340 udev,
2341 usb_sndbulkpipe(udev,priv->RtOutPipes[idx_pipe]),
2342 skb->data,
2343 skb->len, rtl8192_tx_isr, skb);
2344
2345 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
2346 if (!status){
2347 //we need to send 0 byte packet whenever 512N bytes/64N(HIGN SPEED/NORMAL SPEED) bytes packet has been transmitted. Otherwise, it will be halt to wait for another packet. WB. 2008.08.27
2348 bool bSend0Byte = false;
2349 u8 zero = 0;
2350 if(udev->speed == USB_SPEED_HIGH)
2351 {
2352 if (skb->len > 0 && skb->len % 512 == 0)
2353 bSend0Byte = true;
2354 }
2355 else
2356 {
2357 if (skb->len > 0 && skb->len % 64 == 0)
2358 bSend0Byte = true;
2359 }
2360 if (bSend0Byte)
2361 {
2362 #if 1
2363 tx_urb_zero = usb_alloc_urb(0,GFP_ATOMIC);
2364 if(!tx_urb_zero){
2365 RT_TRACE(COMP_ERR, "can't alloc urb for zero byte\n");
2366 return -ENOMEM;
2367 }
2368 usb_fill_bulk_urb(tx_urb_zero,udev,
2369 usb_sndbulkpipe(udev,idx_pipe), &zero,
2370 0, tx_zero_isr, dev);
2371 status = usb_submit_urb(tx_urb_zero, GFP_ATOMIC);
2372 if (status){
2373 RT_TRACE(COMP_ERR, "Error TX URB for zero byte %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]), status);
2374 return -1;
2375 }
2376 #endif
2377 }
2378 dev->trans_start = jiffies;
2379 atomic_inc(&priv->tx_pending[tcb_desc->queue_index]);
2380 return 0;
2381 }else{
2382 RT_TRACE(COMP_ERR, "Error TX URB %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]),
2383 status);
2384 return -1;
2385 }
2386 }
2387
2388 void rtl8192SU_net_update(struct net_device *dev)
2389 {
2390
2391 struct r8192_priv *priv = ieee80211_priv(dev);
2392 struct ieee80211_device* ieee = priv->ieee80211;
2393 struct ieee80211_network *net = &priv->ieee80211->current_network;
2394 //u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
2395 u16 rate_config = 0;
2396 u32 regTmp = 0;
2397 u8 rateIndex = 0;
2398 u8 retrylimit = 0x30;
2399 u16 cap = net->capability;
2400
2401 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
2402
2403 //HW_VAR_BASIC_RATE
2404 //update Basic rate: RR, BRSR
2405 rtl8192_config_rate(dev, &rate_config); //HalSetBrateCfg
2406
2407 priv->basic_rate = rate_config = rate_config & 0x15f;
2408
2409 // Set RRSR rate table.
2410 write_nic_byte(dev, RRSR, rate_config&0xff);
2411 write_nic_byte(dev, RRSR+1, (rate_config>>8)&0xff);
2412
2413 // Set RTS initial rate
2414 while(rate_config > 0x1)
2415 {
2416 rate_config = (rate_config>> 1);
2417 rateIndex++;
2418 }
2419 write_nic_byte(dev, INIRTSMCS_SEL, rateIndex);
2420 //HW_VAR_BASIC_RATE
2421
2422 //set ack preample
2423 regTmp = (priv->nCur40MhzPrimeSC) << 5;
2424 if (priv->short_preamble)
2425 regTmp |= 0x80;
2426 write_nic_byte(dev, RRSR+2, regTmp);
2427
2428 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
2429 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
2430
2431 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
2432 //2008.10.24 added by tynli for beacon changed.
2433 PHY_SetBeaconHwReg( dev, net->beacon_interval);
2434
2435 rtl8192_update_cap(dev, cap);
2436
2437 if (ieee->iw_mode == IW_MODE_ADHOC){
2438 retrylimit = 7;
2439 //we should enable ibss interrupt here, but disable it temporarily
2440 if (0){
2441 priv->irq_mask |= (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2442 //rtl8192_irq_disable(dev);
2443 //rtl8192_irq_enable(dev);
2444 }
2445 }
2446 else{
2447 if (0){
2448 priv->irq_mask &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2449 //rtl8192_irq_disable(dev);
2450 //rtl8192_irq_enable(dev);
2451 }
2452 }
2453
2454 priv->ShortRetryLimit = priv->LongRetryLimit = retrylimit;
2455
2456 write_nic_word(dev, RETRY_LIMIT,
2457 retrylimit << RETRY_LIMIT_SHORT_SHIFT | \
2458 retrylimit << RETRY_LIMIT_LONG_SHIFT);
2459 }
2460
2461 void rtl8192SU_update_ratr_table(struct net_device* dev)
2462 {
2463 struct r8192_priv* priv = ieee80211_priv(dev);
2464 struct ieee80211_device* ieee = priv->ieee80211;
2465 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2466 //struct ieee80211_network *net = &ieee->current_network;
2467 u32 ratr_value = 0;
2468
2469 u8 rate_index = 0;
2470 int WirelessMode = ieee->mode;
2471 u8 MimoPs = ieee->pHTInfo->PeerMimoPs;
2472
2473 u8 bNMode = 0;
2474
2475 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2476 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2477
2478 //switch (ieee->mode)
2479 switch (WirelessMode)
2480 {
2481 case IEEE_A:
2482 ratr_value &= 0x00000FF0;
2483 break;
2484 case IEEE_B:
2485 ratr_value &= 0x0000000D;
2486 break;
2487 case IEEE_G:
2488 ratr_value &= 0x00000FF5;
2489 break;
2490 case IEEE_N_24G:
2491 case IEEE_N_5G:
2492 {
2493 bNMode = 1;
2494
2495 if (MimoPs == 0) //MIMO_PS_STATIC
2496 {
2497 ratr_value &= 0x0007F005;
2498 }
2499 else
2500 { // MCS rate only => for 11N mode.
2501 u32 ratr_mask;
2502
2503 // 1T2R or 1T1R, Spatial Stream 2 should be disabled
2504 if ( priv->rf_type == RF_1T2R ||
2505 priv->rf_type == RF_1T1R ||
2506 (ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_2SS) )
2507 ratr_mask = 0x000ff005;
2508 else
2509 ratr_mask = 0x0f0ff005;
2510
2511 if((ieee->pHTInfo->bCurTxBW40MHz) &&
2512 !(ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_40_MHZ))
2513 ratr_mask |= 0x00000010; // Set 6MBps
2514
2515 // Select rates for rate adaptive mechanism.
2516 ratr_value &= ratr_mask;
2517 }
2518 }
2519 break;
2520 default:
2521 if(0)
2522 {
2523 if(priv->rf_type == RF_1T2R) // 1T2R, Spatial Stream 2 should be disabled
2524 {
2525 ratr_value &= 0x000ff0f5;
2526 }
2527 else
2528 {
2529 ratr_value &= 0x0f0ff0f5;
2530 }
2531 }
2532 //printk("====>%s(), mode is not correct:%x\n", __FUNCTION__, ieee->mode);
2533 break;
2534 }
2535
2536 ratr_value &= 0x0FFFFFFF;
2537
2538 // Get MAX MCS available.
2539 if ( (bNMode && ((ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_SHORT_GI)==0)) &&
2540 ((ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI40MHz) ||
2541 (!ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI20MHz)))
2542 {
2543 u8 shortGI_rate = 0;
2544 u32 tmp_ratr_value = 0;
2545 ratr_value |= 0x10000000;//???
2546 tmp_ratr_value = (ratr_value>>12);
2547 for(shortGI_rate=15; shortGI_rate>0; shortGI_rate--)
2548 {
2549 if((1<<shortGI_rate) & tmp_ratr_value)
2550 break;
2551 }
2552 shortGI_rate = (shortGI_rate<<12)|(shortGI_rate<<8)|(shortGI_rate<<4)|(shortGI_rate);
2553 write_nic_byte(dev, SG_RATE, shortGI_rate);
2554 //printk("==>SG_RATE:%x\n", read_nic_byte(dev, SG_RATE));
2555 }
2556 write_nic_dword(dev, ARFR0+rate_index*4, ratr_value);
2557 printk("=============>ARFR0+rate_index*4:%#x\n", ratr_value);
2558
2559 //2 UFWP
2560 if (ratr_value & 0xfffff000){
2561 //printk("===>set to N mode\n");
2562 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_N);
2563 }
2564 else {
2565 //printk("===>set to B/G mode\n");
2566 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_BG);
2567 }
2568 }
2569
2570 void rtl8192SU_link_change(struct net_device *dev)
2571 {
2572 struct r8192_priv *priv = ieee80211_priv(dev);
2573 struct ieee80211_device* ieee = priv->ieee80211;
2574 //unsigned long flags;
2575 u32 reg = 0;
2576
2577 printk("=====>%s 1\n", __func__);
2578 reg = read_nic_dword(dev, RCR);
2579
2580 if (ieee->state == IEEE80211_LINKED)
2581 {
2582
2583 rtl8192SU_net_update(dev);
2584 rtl8192SU_update_ratr_table(dev);
2585 ieee->SetFwCmdHandler(dev, FW_CMD_HIGH_PWR_ENABLE);
2586 priv->ReceiveConfig = reg |= RCR_CBSSID;
2587
2588 }else{
2589 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
2590
2591 }
2592
2593 write_nic_dword(dev, RCR, reg);
2594 rtl8192_update_msr(dev);
2595
2596 printk("<=====%s 2\n", __func__);
2597 }
2598
2599 static struct ieee80211_qos_parameters def_qos_parameters = {
2600 {3,3,3,3},/* cw_min */
2601 {7,7,7,7},/* cw_max */
2602 {2,2,2,2},/* aifs */
2603 {0,0,0,0},/* flags */
2604 {0,0,0,0} /* tx_op_limit */
2605 };
2606
2607
2608 void rtl8192_update_beacon(struct work_struct * work)
2609 {
2610 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
2611 struct net_device *dev = priv->ieee80211->dev;
2612 struct ieee80211_device* ieee = priv->ieee80211;
2613 struct ieee80211_network* net = &ieee->current_network;
2614
2615 if (ieee->pHTInfo->bCurrentHTSupport)
2616 HTUpdateSelfAndPeerSetting(ieee, net);
2617 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
2618 // Joseph test for turbo mode with AP
2619 ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode;
2620 rtl8192_update_cap(dev, net->capability);
2621 }
2622 /*
2623 * background support to run QoS activate functionality
2624 */
2625 int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
2626
2627 void rtl8192_qos_activate(struct work_struct * work)
2628 {
2629 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
2630 struct net_device *dev = priv->ieee80211->dev;
2631 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
2632 u8 mode = priv->ieee80211->current_network.mode;
2633 //u32 size = sizeof(struct ieee80211_qos_parameters);
2634 u8 u1bAIFS;
2635 u32 u4bAcParam;
2636 int i;
2637
2638 if (priv == NULL)
2639 return;
2640
2641 mutex_lock(&priv->mutex);
2642
2643 if(priv->ieee80211->state != IEEE80211_LINKED)
2644 goto success;
2645 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
2646 /* It better set slot time at first */
2647 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
2648 /* update the ac parameter to related registers */
2649 for(i = 0; i < QOS_QUEUE_NUM; i++) {
2650 //Mode G/A: slotTimeTimer = 9; Mode B: 20
2651 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
2652 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
2653 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
2654 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
2655 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
2656
2657 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
2658 //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4322);
2659 }
2660
2661 success:
2662 mutex_unlock(&priv->mutex);
2663 }
2664
2665 static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
2666 int active_network,
2667 struct ieee80211_network *network)
2668 {
2669 int ret = 0;
2670 u32 size = sizeof(struct ieee80211_qos_parameters);
2671
2672 if(priv->ieee80211->state !=IEEE80211_LINKED)
2673 return ret;
2674
2675 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2676 return ret;
2677
2678 if (network->flags & NETWORK_HAS_QOS_MASK) {
2679 if (active_network &&
2680 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
2681 network->qos_data.active = network->qos_data.supported;
2682
2683 if ((network->qos_data.active == 1) && (active_network == 1) &&
2684 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
2685 (network->qos_data.old_param_count !=
2686 network->qos_data.param_count)) {
2687 network->qos_data.old_param_count =
2688 network->qos_data.param_count;
2689 queue_work(priv->priv_wq, &priv->qos_activate);
2690 RT_TRACE (COMP_QOS, "QoS parameters change call "
2691 "qos_activate\n");
2692 }
2693 } else {
2694 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2695 &def_qos_parameters, size);
2696
2697 if ((network->qos_data.active == 1) && (active_network == 1)) {
2698 queue_work(priv->priv_wq, &priv->qos_activate);
2699 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
2700 }
2701 network->qos_data.active = 0;
2702 network->qos_data.supported = 0;
2703 }
2704
2705 return 0;
2706 }
2707
2708 /* handle manage frame frame beacon and probe response */
2709 static int rtl8192_handle_beacon(struct net_device * dev,
2710 struct ieee80211_probe_response *beacon,
2711 struct ieee80211_network *network)
2712 {
2713 struct r8192_priv *priv = ieee80211_priv(dev);
2714
2715 rtl8192_qos_handle_probe_response(priv,1,network);
2716 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
2717
2718 return 0;
2719
2720 }
2721
2722 /*
2723 * handling the beaconing responses. if we get different QoS setting
2724 * off the network from the associated setting, adjust the QoS
2725 * setting
2726 */
2727 static int rtl8192_qos_association_resp(struct r8192_priv *priv,
2728 struct ieee80211_network *network)
2729 {
2730 int ret = 0;
2731 unsigned long flags;
2732 u32 size = sizeof(struct ieee80211_qos_parameters);
2733 int set_qos_param = 0;
2734
2735 if ((priv == NULL) || (network == NULL))
2736 return ret;
2737
2738 if(priv->ieee80211->state !=IEEE80211_LINKED)
2739 return ret;
2740
2741 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2742 return ret;
2743
2744 spin_lock_irqsave(&priv->ieee80211->lock, flags);
2745 if(network->flags & NETWORK_HAS_QOS_PARAMETERS) {
2746 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2747 &network->qos_data.parameters,\
2748 sizeof(struct ieee80211_qos_parameters));
2749 priv->ieee80211->current_network.qos_data.active = 1;
2750 {
2751 set_qos_param = 1;
2752 /* update qos parameter for current network */
2753 priv->ieee80211->current_network.qos_data.old_param_count = \
2754 priv->ieee80211->current_network.qos_data.param_count;
2755 priv->ieee80211->current_network.qos_data.param_count = \
2756 network->qos_data.param_count;
2757 }
2758 } else {
2759 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2760 &def_qos_parameters, size);
2761 priv->ieee80211->current_network.qos_data.active = 0;
2762 priv->ieee80211->current_network.qos_data.supported = 0;
2763 set_qos_param = 1;
2764 }
2765
2766 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
2767
2768 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n",__FUNCTION__,network->flags ,priv->ieee80211->current_network.qos_data.active);
2769 if (set_qos_param == 1)
2770 queue_work(priv->priv_wq, &priv->qos_activate);
2771
2772 return ret;
2773 }
2774
2775
2776 static int rtl8192_handle_assoc_response(struct net_device *dev,
2777 struct ieee80211_assoc_response_frame *resp,
2778 struct ieee80211_network *network)
2779 {
2780 struct r8192_priv *priv = ieee80211_priv(dev);
2781 rtl8192_qos_association_resp(priv, network);
2782 return 0;
2783 }
2784
2785
2786 void rtl8192_update_ratr_table(struct net_device* dev)
2787 // POCTET_STRING posLegacyRate,
2788 // u8* pMcsRate)
2789 // PRT_WLAN_STA pEntry)
2790 {
2791 struct r8192_priv* priv = ieee80211_priv(dev);
2792 struct ieee80211_device* ieee = priv->ieee80211;
2793 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2794 //struct ieee80211_network *net = &ieee->current_network;
2795 u32 ratr_value = 0;
2796 u8 rate_index = 0;
2797 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2798 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2799 // switch (net->mode)
2800 switch (ieee->mode)
2801 {
2802 case IEEE_A:
2803 ratr_value &= 0x00000FF0;
2804 break;
2805 case IEEE_B:
2806 ratr_value &= 0x0000000F;
2807 break;
2808 case IEEE_G:
2809 ratr_value &= 0x00000FF7;
2810 break;
2811 case IEEE_N_24G:
2812 case IEEE_N_5G:
2813 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
2814 ratr_value &= 0x0007F007;
2815 else{
2816 if (priv->rf_type == RF_1T2R)
2817 ratr_value &= 0x000FF007;
2818 else
2819 ratr_value &= 0x0F81F007;
2820 }
2821 break;
2822 default:
2823 break;
2824 }
2825 ratr_value &= 0x0FFFFFFF;
2826 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
2827 ratr_value |= 0x80000000;
2828 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
2829 ratr_value |= 0x80000000;
2830 }
2831 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2832 write_nic_byte(dev, UFWP, 1);
2833 }
2834
2835 static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
2836 static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
2837 bool GetNmodeSupportBySecCfg8192(struct net_device*dev)
2838 {
2839 #if 1
2840 struct r8192_priv* priv = ieee80211_priv(dev);
2841 struct ieee80211_device* ieee = priv->ieee80211;
2842 struct ieee80211_network * network = &ieee->current_network;
2843 int wpa_ie_len= ieee->wpa_ie_len;
2844 struct ieee80211_crypt_data* crypt;
2845 int encrypt;
2846 return TRUE;
2847
2848 crypt = ieee->crypt[ieee->tx_keyidx];
2849 //we use connecting AP's capability instead of only security config on our driver to distinguish whether it should use N mode or G mode
2850 encrypt = (network->capability & WLAN_CAPABILITY_PRIVACY) || (ieee->host_encrypt && crypt && crypt->ops && (0 == strcmp(crypt->ops->name,"WEP")));
2851
2852 /* simply judge */
2853 if(encrypt && (wpa_ie_len == 0)) {
2854 /* wep encryption, no N mode setting */
2855 return false;
2856 // } else if((wpa_ie_len != 0)&&(memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) {
2857 } else if((wpa_ie_len != 0)) {
2858 /* parse pairwise key type */
2859 //if((pairwisekey = WEP40)||(pairwisekey = WEP104)||(pairwisekey = TKIP))
2860 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
2861 return true;
2862 else
2863 return false;
2864 } else {
2865 return true;
2866 }
2867
2868 return true;
2869 #endif
2870 }
2871
2872 bool GetHalfNmodeSupportByAPs819xUsb(struct net_device* dev)
2873 {
2874 bool Reval;
2875 struct r8192_priv* priv = ieee80211_priv(dev);
2876 struct ieee80211_device* ieee = priv->ieee80211;
2877
2878 // Added by Roger, 2008.08.29.
2879 return false;
2880
2881 if(ieee->bHalfWirelessN24GMode == true)
2882 Reval = true;
2883 else
2884 Reval = false;
2885
2886 return Reval;
2887 }
2888
2889 void rtl8192_refresh_supportrate(struct r8192_priv* priv)
2890 {
2891 struct ieee80211_device* ieee = priv->ieee80211;
2892 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
2893 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
2894 {
2895 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
2896 //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
2897 //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
2898 }
2899 else
2900 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
2901 return;
2902 }
2903
2904 u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
2905 {
2906 struct r8192_priv *priv = ieee80211_priv(dev);
2907 u8 ret = 0;
2908 switch(priv->rf_chip)
2909 {
2910 case RF_8225:
2911 case RF_8256:
2912 case RF_PSEUDO_11N:
2913 case RF_6052:
2914 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
2915 break;
2916 case RF_8258:
2917 ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
2918 break;
2919 default:
2920 ret = WIRELESS_MODE_B;
2921 break;
2922 }
2923 return ret;
2924 }
2925 void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
2926 {
2927 struct r8192_priv *priv = ieee80211_priv(dev);
2928 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
2929
2930 #if 1
2931 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
2932 {
2933 if(bSupportMode & WIRELESS_MODE_N_24G)
2934 {
2935 wireless_mode = WIRELESS_MODE_N_24G;
2936 }
2937 else if(bSupportMode & WIRELESS_MODE_N_5G)
2938 {
2939 wireless_mode = WIRELESS_MODE_N_5G;
2940 }
2941 else if((bSupportMode & WIRELESS_MODE_A))
2942 {
2943 wireless_mode = WIRELESS_MODE_A;
2944 }
2945 else if((bSupportMode & WIRELESS_MODE_G))
2946 {
2947 wireless_mode = WIRELESS_MODE_G;
2948 }
2949 else if((bSupportMode & WIRELESS_MODE_B))
2950 {
2951 wireless_mode = WIRELESS_MODE_B;
2952 }
2953 else{
2954 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
2955 wireless_mode = WIRELESS_MODE_B;
2956 }
2957 }
2958 #ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we shoud wait for FPGA
2959 ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
2960 #endif
2961 //LZM 090306 usb crash here, mark it temp
2962 //write_nic_word(dev, SIFS_OFDM, 0x0e0e);
2963 priv->ieee80211->mode = wireless_mode;
2964
2965 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
2966 priv->ieee80211->pHTInfo->bEnableHT = 1;
2967 else
2968 priv->ieee80211->pHTInfo->bEnableHT = 0;
2969 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
2970 rtl8192_refresh_supportrate(priv);
2971 #endif
2972
2973 }
2974
2975
2976 short rtl8192_is_tx_queue_empty(struct net_device *dev)
2977 {
2978 int i=0;
2979 struct r8192_priv *priv = ieee80211_priv(dev);
2980 //struct ieee80211_device* ieee = priv->ieee80211;
2981 for (i=0; i<=MGNT_QUEUE; i++)
2982 {
2983 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
2984 continue;
2985 if (atomic_read(&priv->tx_pending[i]))
2986 {
2987 printk("===>tx queue is not empty:%d, %d\n", i, atomic_read(&priv->tx_pending[i]));
2988 return 0;
2989 }
2990 }
2991 return 1;
2992 }
2993
2994 void rtl8192_hw_sleep_down(struct net_device *dev)
2995 {
2996 RT_TRACE(COMP_POWER, "%s()============>come to sleep down\n", __FUNCTION__);
2997 #ifdef TODO
2998 // MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
2999 #endif
3000 }
3001
3002 void rtl8192_hw_sleep_wq (struct work_struct *work)
3003 {
3004 // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3005 // struct ieee80211_device * ieee = (struct ieee80211_device*)
3006 // container_of(work, struct ieee80211_device, watch_dog_wq);
3007 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3008 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
3009 struct net_device *dev = ieee->dev;
3010
3011 //printk("=========>%s()\n", __FUNCTION__);
3012 rtl8192_hw_sleep_down(dev);
3013 }
3014 // printk("dev is %d\n",dev);
3015 // printk("&*&(^*(&(&=========>%s()\n", __FUNCTION__);
3016 void rtl8192_hw_wakeup(struct net_device* dev)
3017 {
3018 // u32 flags = 0;
3019
3020 // spin_lock_irqsave(&priv->ps_lock,flags);
3021 RT_TRACE(COMP_POWER, "%s()============>come to wake up\n", __FUNCTION__);
3022 #ifdef TODO
3023 // MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
3024 #endif
3025 //FIXME: will we send package stored while nic is sleep?
3026 // spin_unlock_irqrestore(&priv->ps_lock,flags);
3027 }
3028
3029 void rtl8192_hw_wakeup_wq (struct work_struct *work)
3030 {
3031 // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3032 // struct ieee80211_device * ieee = (struct ieee80211_device*)
3033 // container_of(work, struct ieee80211_device, watch_dog_wq);
3034 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3035 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
3036 struct net_device *dev = ieee->dev;
3037
3038 rtl8192_hw_wakeup(dev);
3039 }
3040
3041 #define MIN_SLEEP_TIME 50
3042 #define MAX_SLEEP_TIME 10000
3043 void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
3044 {
3045
3046 struct r8192_priv *priv = ieee80211_priv(dev);
3047
3048 u32 rb = jiffies;
3049 unsigned long flags;
3050
3051 spin_lock_irqsave(&priv->ps_lock,flags);
3052
3053 /* Writing HW register with 0 equals to disable
3054 * the timer, that is not really what we want
3055 */
3056 tl -= MSECS(4+16+7);
3057
3058 //if(tl == 0) tl = 1;
3059
3060 /* FIXME HACK FIXME HACK */
3061 // force_pci_posting(dev);
3062 //mdelay(1);
3063
3064 // rb = read_nic_dword(dev, TSFTR);
3065
3066 /* If the interval in witch we are requested to sleep is too
3067 * short then give up and remain awake
3068 */
3069 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3070 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3071 spin_unlock_irqrestore(&priv->ps_lock,flags);
3072 printk("too short to sleep\n");
3073 return;
3074 }
3075
3076 // write_nic_dword(dev, TimerInt, tl);
3077 // rb = read_nic_dword(dev, TSFTR);
3078 {
3079 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3080 // if (tl<rb)
3081
3082 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
3083 }
3084 /* if we suspect the TimerInt is gone beyond tl
3085 * while setting it, then give up
3086 */
3087 #if 1
3088 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3089 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3090 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
3091 spin_unlock_irqrestore(&priv->ps_lock,flags);
3092 return;
3093 }
3094 #endif
3095 // if(priv->rf_sleep)
3096 // priv->rf_sleep(dev);
3097
3098 //printk("<=========%s()\n", __FUNCTION__);
3099 queue_delayed_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq,0);
3100
3101 spin_unlock_irqrestore(&priv->ps_lock,flags);
3102 }
3103 //init priv variables here. only non_zero value should be initialized here.
3104 static void rtl8192_init_priv_variable(struct net_device* dev)
3105 {
3106 struct r8192_priv *priv = ieee80211_priv(dev);
3107 u8 i;
3108 priv->card_8192 = NIC_8192U;
3109 priv->chan = 1; //set to channel 1
3110 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
3111 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3112 priv->ieee80211->ieee_up=0;
3113 priv->retry_rts = DEFAULT_RETRY_RTS;
3114 priv->retry_data = DEFAULT_RETRY_DATA;
3115 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
3116 priv->ieee80211->rate = 110; //11 mbps
3117 priv->ieee80211->short_slot = 1;
3118 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
3119 priv->CckPwEnl = 6;
3120 //for silent reset
3121 priv->IrpPendingCount = 1;
3122 priv->ResetProgress = RESET_TYPE_NORESET;
3123 priv->bForcedSilentReset = 0;
3124 priv->bDisableNormalResetCheck = false;
3125 priv->force_reset = false;
3126
3127 priv->ieee80211->FwRWRF = 0; //we don't use FW read/write RF until stable firmware is available.
3128 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3129 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3130 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
3131 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
3132 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE |
3133 IEEE_SOFTMAC_BEACONS;//added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
3134
3135 priv->ieee80211->active_scan = 1;
3136 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
3137 priv->ieee80211->host_encrypt = 1;
3138 priv->ieee80211->host_decrypt = 1;
3139 priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
3140 priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
3141 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
3142 priv->ieee80211->set_chan = rtl8192_set_chan;
3143 priv->ieee80211->link_change = priv->ops->rtl819x_link_change;
3144 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
3145 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
3146 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
3147 priv->ieee80211->init_wmmparam_flag = 0;
3148 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
3149 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
3150 priv->ieee80211->tx_headroom = TX_PACKET_SHIFT_BYTES;
3151 priv->ieee80211->qos_support = 1;
3152
3153 //added by WB
3154 // priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
3155 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
3156 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
3157 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
3158 //for LPS
3159 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
3160 // priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
3161 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
3162 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
3163 //added by david
3164 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8192;
3165 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xUsb;
3166 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
3167 //added by amy
3168 priv->ieee80211->InitialGainHandler = priv->ops->rtl819x_initial_gain;
3169 priv->card_type = USB;
3170
3171 //1 RTL8192SU/
3172 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3173 priv->ieee80211->SetFwCmdHandler = HalSetFwCmd8192S;
3174 priv->bRFSiOrPi = 0;//o=si,1=pi;
3175 //lzm add
3176 priv->bInHctTest = false;
3177
3178 priv->MidHighPwrTHR_L1 = 0x3B;
3179 priv->MidHighPwrTHR_L2 = 0x40;
3180
3181 if(priv->bInHctTest)
3182 {
3183 priv->ShortRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3184 priv->LongRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3185 }
3186 else
3187 {
3188 priv->ShortRetryLimit = HAL_RETRY_LIMIT_INFRA;
3189 priv->LongRetryLimit = HAL_RETRY_LIMIT_INFRA;
3190 }
3191
3192 priv->SetFwCmdInProgress = false; //is set FW CMD in Progress? 92S only
3193 priv->CurrentFwCmdIO = 0;
3194
3195 priv->MinSpaceCfg = 0;
3196
3197 priv->EarlyRxThreshold = 7;
3198 priv->enable_gpio0 = 0;
3199 priv->TransmitConfig =
3200 ((u32)TCR_MXDMA_2048<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
3201 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit
3202 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
3203 (false ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
3204 if(priv->bInHctTest)
3205 priv->ReceiveConfig = //priv->CSMethod |
3206 RCR_AMF | RCR_ADF | //RCR_AAP | //accept management/data
3207 RCR_ACF |RCR_APPFCS| //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
3208 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
3209 RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
3210 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3211 ((u32)7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
3212 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
3213 (priv->EarlyRxThreshold == 7 ? RCR_OnlyErlPkt:0);
3214 else
3215 priv->ReceiveConfig = //priv->CSMethod |
3216 RCR_AMF | RCR_ADF | RCR_AB |
3217 RCR_AM | RCR_APM |RCR_AAP |RCR_ADD3|RCR_APP_ICV|
3218 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3219 RCR_APP_MIC | RCR_APPFCS;
3220
3221 // <Roger_EXP> 2008.06.16.
3222 priv->IntrMask = (u16)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK | \
3223 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK | \
3224 IMR_BDOK | IMR_RXCMDOK | /*IMR_TIMEOUT0 |*/ IMR_RDU | IMR_RXFOVW | \
3225 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
3226
3227 //1 End
3228
3229
3230 priv->AcmControl = 0;
3231 priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
3232 if (priv->pFirmware)
3233 memset(priv->pFirmware, 0, sizeof(rt_firmware));
3234
3235 /* rx related queue */
3236 skb_queue_head_init(&priv->rx_queue);
3237 skb_queue_head_init(&priv->skb_queue);
3238
3239 /* Tx related queue */
3240 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3241 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
3242 }
3243 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3244 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
3245 }
3246 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3247 skb_queue_head_init(&priv->ieee80211->skb_drv_aggQ [i]);
3248 }
3249 priv->rf_set_chan = rtl8192_phy_SwChnl;
3250 }
3251
3252 //init lock here
3253 static void rtl8192_init_priv_lock(struct r8192_priv* priv)
3254 {
3255 spin_lock_init(&priv->tx_lock);
3256 spin_lock_init(&priv->irq_lock);//added by thomas
3257 //spin_lock_init(&priv->rf_lock);//use rf_sem, or will crash in some OS.
3258 sema_init(&priv->wx_sem,1);
3259 sema_init(&priv->rf_sem,1);
3260 spin_lock_init(&priv->ps_lock);
3261 mutex_init(&priv->mutex);
3262 }
3263
3264 extern void rtl819x_watchdog_wqcallback(struct work_struct *work);
3265
3266 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
3267 //init tasklet and wait_queue here. only 2.6 above kernel is considered
3268 #define DRV_NAME "wlan0"
3269 static void rtl8192_init_priv_task(struct net_device* dev)
3270 {
3271 struct r8192_priv *priv = ieee80211_priv(dev);
3272
3273 #ifdef PF_SYNCTHREAD
3274 priv->priv_wq = create_workqueue(DRV_NAME,0);
3275 #else
3276 priv->priv_wq = create_workqueue(DRV_NAME);
3277 #endif
3278
3279 INIT_WORK(&priv->reset_wq, rtl8192_restart);
3280
3281 //INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
3282 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
3283 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
3284 // INIT_DELAYED_WORK(&priv->gpio_change_rf_wq, dm_gpio_change_rf_callback);
3285 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
3286 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
3287 INIT_DELAYED_WORK(&priv->initialgain_operate_wq, InitialGainOperateWorkItemCallBack);
3288 //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
3289 //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
3290 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
3291 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
3292 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
3293
3294 tasklet_init(&priv->irq_rx_tasklet,
3295 (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
3296 (unsigned long)priv);
3297 }
3298
3299 static void rtl8192_get_eeprom_size(struct net_device* dev)
3300 {
3301 u16 curCR = 0;
3302 struct r8192_priv *priv = ieee80211_priv(dev);
3303 RT_TRACE(COMP_EPROM, "===========>%s()\n", __FUNCTION__);
3304 curCR = read_nic_word_E(dev,EPROM_CMD);
3305 RT_TRACE(COMP_EPROM, "read from Reg EPROM_CMD(%x):%x\n", EPROM_CMD, curCR);
3306 //whether need I consider BIT5?
3307 priv->epromtype = (curCR & Cmd9346CR_9356SEL) ? EPROM_93c56 : EPROM_93c46;
3308 RT_TRACE(COMP_EPROM, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
3309 }
3310
3311 //used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
3312 static inline u16 endian_swap(u16* data)
3313 {
3314 u16 tmp = *data;
3315 *data = (tmp >> 8) | (tmp << 8);
3316 return *data;
3317 }
3318
3319 u8 rtl8192SU_UsbOptionToEndPointNumber(u8 UsbOption)
3320 {
3321 u8 nEndPoint = 0;
3322 switch(UsbOption)
3323 {
3324 case 0:
3325 nEndPoint = 6;
3326 break;
3327 case 1:
3328 nEndPoint = 11;
3329 break;
3330 case 2:
3331 nEndPoint = 4;
3332 break;
3333 default:
3334 RT_TRACE(COMP_INIT, "UsbOptionToEndPointNumber(): Invalid UsbOption(%#x)\n", UsbOption);
3335 break;
3336 }
3337 return nEndPoint;
3338 }
3339
3340 u8 rtl8192SU_BoardTypeToRFtype(struct net_device* dev, u8 Boardtype)
3341 {
3342 u8 RFtype = RF_1T2R;
3343
3344 switch(Boardtype)
3345 {
3346 case 0:
3347 RFtype = RF_1T1R;
3348 break;
3349 case 1:
3350 RFtype = RF_1T2R;
3351 break;
3352 case 2:
3353 RFtype = RF_2T2R;
3354 break;
3355 case 3:
3356 RFtype = RF_2T2R_GREEN;
3357 break;
3358 default:
3359 break;
3360 }
3361
3362 return RFtype;
3363 }
3364
3365 //
3366 // Description:
3367 // Config HW adapter information into initial value.
3368 //
3369 // Assumption:
3370 // 1. After Auto load fail(i.e, check CR9346 fail)
3371 //
3372 // Created by Roger, 2008.10.21.
3373 //
3374 void
3375 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
3376 {
3377 struct r8192_priv *priv = ieee80211_priv(dev);
3378 //u16 i,usValue;
3379 //u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
3380 u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
3381 int i;
3382
3383 RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n");
3384
3385 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3386 //PlatformStallExecution(10000);
3387 mdelay(10);
3388 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
3389
3390 //RT_ASSERT(priv->AutoloadFailFlag==TRUE, ("ReadAdapterInfo8192SEEPROM(): AutoloadFailFlag !=TRUE\n"));
3391
3392 // Initialize IC Version && Channel Plan
3393 priv->eeprom_vid = 0;
3394 priv->eeprom_pid = 0;
3395 priv->card_8192_version = 0;
3396 priv->eeprom_ChannelPlan = 0;
3397 priv->eeprom_CustomerID = 0;
3398 priv->eeprom_SubCustomerID = 0;
3399 priv->bIgnoreDiffRateTxPowerOffset = false;
3400
3401 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3402 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3403 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3404 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3405 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3406 RT_TRACE(COMP_INIT, "IgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3407
3408
3409
3410 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3411 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3412
3413 for(i=0; i<5; i++)
3414 priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM;
3415
3416 //RT_PRINT_DATA(COMP_INIT|COMP_EFUSE, DBG_LOUD, ("EFUSE USB PHY Param: \n"), priv->EEPROMUsbPhyParam, 5);
3417
3418 {
3419 //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15.
3420 static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
3421 u8 i;
3422
3423 //sMacAddr[5] = (u8)GetRandomNumber(1, 254);
3424
3425 for(i = 0; i < 6; i++)
3426 dev->dev_addr[i] = sMacAddr[i];
3427 }
3428 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3429 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3430 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3431
3432 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
3433 dev->dev_addr[0], dev->dev_addr[1],
3434 dev->dev_addr[2], dev->dev_addr[3],
3435 dev->dev_addr[4], dev->dev_addr[5]);
3436
3437 priv->EEPROMBoardType = EEPROM_Default_BoardType;
3438 priv->rf_type = RF_1T2R; //RF_2T2R
3439 priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3440 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3441 priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3442 priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3443 priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3444 priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3445 priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
3446
3447
3448
3449 for (rf_path = 0; rf_path < 2; rf_path++)
3450 {
3451 for (i = 0; i < 3; i++)
3452 {
3453 // Read CCK RF A & B Tx power
3454 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3455 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3456 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3457 (u8)(EEPROM_Default_TxPower & 0xff);
3458 }
3459 }
3460
3461 for (i = 0; i < 3; i++)
3462 {
3463 //RT_TRACE((COMP_EFUSE), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3464 //priv->RfCckChnlAreaTxPwr[rf_path][i]);
3465 //RT_TRACE((COMP_EFUSE), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3466 //priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
3467 //RT_TRACE((COMP_EFUSE), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3468 //priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
3469 }
3470
3471 // Assign dedicated channel tx power
3472 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3473 {
3474 if (i < 3) // Cjanel 1-3
3475 index = 0;
3476 else if (i < 9) // Channel 4-9
3477 index = 1;
3478 else // Channel 10-14
3479 index = 2;
3480
3481 // Record A & B CCK /OFDM - 1T/2T Channel area tx power
3482 priv->RfTxPwrLevelCck[rf_path][i] =
3483 priv->RfCckChnlAreaTxPwr[rf_path][index];
3484 priv->RfTxPwrLevelOfdm1T[rf_path][i] =
3485 priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
3486 priv->RfTxPwrLevelOfdm2T[rf_path][i] =
3487 priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
3488 }
3489
3490 for(i=0; i<14; i++)
3491 {
3492 //RT_TRACE((COMP_EFUSE), "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
3493 //rf_path, i, priv->RfTxPwrLevelCck[0][i],
3494 //priv->RfTxPwrLevelOfdm1T[0][i] ,
3495 //priv->RfTxPwrLevelOfdm2T[0][i] );
3496 }
3497
3498 //
3499 // Update remained HAL variables.
3500 //
3501 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
3502 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;//new
3503 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
3504 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit0~3
3505 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit4~7
3506 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit12~15
3507 priv->ThermalMeter[0] = priv->EEPROMThermalMeter;// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
3508 priv->LedStrategy = SW_LED_MODE0;
3509
3510 init_rate_adaptive(dev);
3511
3512 RT_TRACE(COMP_INIT, "<==== ConfigAdapterInfo8192SForAutoLoadFail\n");
3513
3514 }
3515
3516 //
3517 // Description:
3518 // Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
3519 //
3520 // Assumption:
3521 // 1. CR9346 regiser has verified.
3522 // 2. PASSIVE_LEVEL (USB interface)
3523 //
3524 // Created by Roger, 2008.10.21.
3525 //
3526 void
3527 rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
3528 {
3529 struct r8192_priv *priv = ieee80211_priv(dev);
3530 u16 i,usValue;
3531 u8 tmpU1b, tempval;
3532 u16 EEPROMId;
3533 u8 hwinfo[HWSET_MAX_SIZE_92S];
3534 u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
3535
3536
3537 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
3538
3539 //
3540 // <Roger_Note> The following operation are prevent Efuse leakage by turn on 2.5V.
3541 // 2008.11.25.
3542 //
3543 tmpU1b = read_nic_byte(dev, EFUSE_TEST+3);
3544 write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80);
3545 //PlatformStallExecution(1000);
3546 mdelay(10);
3547 write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7)));
3548
3549 // Retrieve Chip version.
3550 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
3551 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
3552
3553 switch(priv->card_8192_version)
3554 {
3555 case 0:
3556 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
3557 break;
3558 case 1:
3559 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
3560 break;
3561 case 2:
3562 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
3563 break;
3564 default:
3565 RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
3566 priv->card_8192_version = VERSION_8192S_BCUT;
3567 break;
3568 }
3569
3570 //if (IS_BOOT_FROM_EEPROM(Adapter))
3571 if(priv->EepromOrEfuse)
3572 { // Read frin EEPROM
3573 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3574 //PlatformStallExecution(10000);
3575 mdelay(10);
3576 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
3577 // Read all Content from EEPROM or EFUSE.
3578 for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2)
3579 {
3580 usValue = eprom_read(dev, (u16) (i>>1));
3581 *((u16*)(&hwinfo[i])) = usValue;
3582 }
3583 }
3584 else if (!(priv->EepromOrEfuse))
3585 { // Read from EFUSE
3586
3587 //
3588 // <Roger_Notes> We set Isolation signals from Loader and reset EEPROM after system resuming
3589 // from suspend mode.
3590 // 2008.10.21.
3591 //
3592 //PlatformEFIOWrite1Byte(Adapter, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3593 //PlatformStallExecution(10000);
3594 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x40);
3595 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x50);
3596
3597 //tmpU1b = PlatformEFIORead1Byte(Adapter, EFUSE_TEST+3);
3598 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, (tmpU1b | 0x80));
3599 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, 0x72);
3600 //PlatformEFIOWrite1Byte(Adapter, EFUSE_CLK, 0x03);
3601
3602 // Read EFUSE real map to shadow.
3603 EFUSE_ShadowMapUpdate(dev);
3604 memcpy(hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
3605 }
3606 else
3607 {
3608 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SUsb(): Invalid boot type!!\n");
3609 }
3610
3611 //YJ,test,090106
3612 //dump_buf(hwinfo,HWSET_MAX_SIZE_92S);
3613 //
3614 // <Roger_Notes> The following are EFUSE/EEPROM independent operations!!
3615 //
3616 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("MAP: \n"), hwinfo, HWSET_MAX_SIZE_92S);
3617
3618 //
3619 // <Roger_Notes> Event though CR9346 regiser can verify whether Autoload is success or not, but we still
3620 // double check ID codes for 92S here(e.g., due to HW GPIO polling fail issue).
3621 // 2008.10.21.
3622 //
3623 EEPROMId = *((u16 *)&hwinfo[0]);
3624
3625 if( EEPROMId != RTL8190_EEPROM_ID )
3626 {
3627 RT_TRACE(COMP_INIT, "ID(%#x) is invalid!!\n", EEPROMId);
3628 priv->bTXPowerDataReadFromEEPORM = FALSE;
3629 priv->AutoloadFailFlag=TRUE;
3630 }
3631 else
3632 {
3633 priv->AutoloadFailFlag=FALSE;
3634 priv->bTXPowerDataReadFromEEPORM = TRUE;
3635 }
3636 // Read IC Version && Channel Plan
3637 if(!priv->AutoloadFailFlag)
3638 {
3639 // VID, PID
3640 priv->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
3641 priv->eeprom_pid = *(u16 *)&hwinfo[EEPROM_PID];
3642 priv->bIgnoreDiffRateTxPowerOffset = false; //cosa for test
3643
3644
3645 // EEPROM Version ID, Channel plan
3646 priv->EEPROMVersion = *(u8 *)&hwinfo[EEPROM_Version];
3647 priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan];
3648
3649 // Customer ID, 0x00 and 0xff are reserved for Realtek.
3650 priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID];
3651 priv->eeprom_SubCustomerID = *(u8 *)&hwinfo[EEPROM_SubCustomID];
3652 }
3653 else
3654 {
3655 //priv->eeprom_vid = 0;
3656 //priv->eeprom_pid = 0;
3657 //priv->EEPROMVersion = 0;
3658 //priv->eeprom_ChannelPlan = 0;
3659 //priv->eeprom_CustomerID = 0;
3660 //priv->eeprom_SubCustomerID = 0;
3661
3662 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
3663 return;
3664 }
3665
3666
3667 RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId);
3668 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3669 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3670 RT_TRACE(COMP_INIT, "EEPROM Version ID: 0x%2x\n", priv->EEPROMVersion);
3671 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3672 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3673 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3674 RT_TRACE(COMP_INIT, "bIgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3675
3676
3677 // Read USB optional function.
3678 if(!priv->AutoloadFailFlag)
3679 {
3680 priv->EEPROMUsbOption = *(u8 *)&hwinfo[EEPROM_USB_OPTIONAL];
3681 }
3682 else
3683 {
3684 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3685 }
3686
3687
3688 priv->EEPROMUsbEndPointNumber = rtl8192SU_UsbOptionToEndPointNumber((priv->EEPROMUsbOption&EEPROM_EP_NUMBER)>>3);
3689
3690 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3691 RT_TRACE(COMP_INIT, "EndPoint Number = %#x\n", priv->EEPROMUsbEndPointNumber);
3692
3693 #ifdef TO_DO_LIST
3694 //
3695 // Decide CustomerID according to VID/DID or EEPROM
3696 //
3697 switch(pHalData->EEPROMCustomerID)
3698 {
3699 case EEPROM_CID_ALPHA:
3700 pMgntInfo->CustomerID = RT_CID_819x_ALPHA;
3701 break;
3702
3703 case EEPROM_CID_CAMEO:
3704 pMgntInfo->CustomerID = RT_CID_819x_CAMEO;
3705 break;
3706
3707 case EEPROM_CID_SITECOM:
3708 pMgntInfo->CustomerID = RT_CID_819x_Sitecom;
3709 RT_TRACE(COMP_INIT, DBG_LOUD, ("CustomerID = 0x%4x\n", pMgntInfo->CustomerID));
3710
3711 break;
3712
3713 case EEPROM_CID_WHQL:
3714 Adapter->bInHctTest = TRUE;
3715
3716 pMgntInfo->bSupportTurboMode = FALSE;
3717 pMgntInfo->bAutoTurboBy8186 = FALSE;
3718
3719 pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
3720 pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
3721 pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
3722 pMgntInfo->keepAliveLevel = 0;
3723 break;
3724
3725 default:
3726 pMgntInfo->CustomerID = RT_CID_DEFAULT;
3727 break;
3728
3729 }
3730
3731 //
3732 // Led mode
3733 //
3734 switch(pMgntInfo->CustomerID)
3735 {
3736 case RT_CID_DEFAULT:
3737 case RT_CID_819x_ALPHA:
3738 pHalData->LedStrategy = SW_LED_MODE1;
3739 pHalData->bRegUseLed = TRUE;
3740 pHalData->SwLed1.bLedOn = TRUE;
3741 break;
3742 case RT_CID_819x_CAMEO:
3743 pHalData->LedStrategy = SW_LED_MODE1;
3744 pHalData->bRegUseLed = TRUE;
3745 break;
3746
3747 case RT_CID_819x_Sitecom:
3748 pHalData->LedStrategy = SW_LED_MODE2;
3749 pHalData->bRegUseLed = TRUE;
3750 break;
3751
3752 default:
3753 pHalData->LedStrategy = SW_LED_MODE0;
3754 break;
3755 }
3756 #endif
3757
3758 // Read USB PHY parameters.
3759 for(i=0; i<5; i++)
3760 priv->EEPROMUsbPhyParam[i] = *(u8 *)&hwinfo[EEPROM_USB_PHY_PARA1+i];
3761
3762 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("USB PHY Param: \n"), pHalData->EEPROMUsbPhyParam, 5);
3763
3764
3765 //Read Permanent MAC address
3766 for(i=0; i<6; i++)
3767 dev->dev_addr[i] = *(u8 *)&hwinfo[EEPROM_NODE_ADDRESS_BYTE_0+i];
3768
3769 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3770 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3771 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3772
3773 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
3774 dev->dev_addr[0], dev->dev_addr[1],
3775 dev->dev_addr[2], dev->dev_addr[3],
3776 dev->dev_addr[4], dev->dev_addr[5]);
3777
3778 //
3779 // Get CustomerID(Boad Type)
3780 // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
3781 // Others: Reserved. Default is 0x2: RTL8192SU.
3782 //
3783 //if(!priv->AutoloadFailFlag)
3784 //{
3785 priv->EEPROMBoardType = *(u8 *)&hwinfo[EEPROM_BoardType];
3786 priv->rf_type = rtl8192SU_BoardTypeToRFtype(dev, priv->EEPROMBoardType);
3787 //}
3788 //else
3789 //{
3790 // priv->EEPROMBoardType = EEPROM_Default_BoardType;
3791 // priv->rf_type = RF_1T2R;
3792 //}
3793
3794 priv->rf_chip = RF_6052;
3795
3796 priv->rf_chip = RF_6052;//lzm test
3797 RT_TRACE(COMP_INIT, "BoardType = 0x%2x\n", priv->EEPROMBoardType);
3798 RT_TRACE(COMP_INIT, "RF_Type = 0x%2x\n", priv->rf_type);
3799
3800 //
3801 // Read antenna tx power offset of B/C/D to A from EEPROM
3802 // and read ThermalMeter from EEPROM
3803 //
3804 //if(!priv->AutoloadFailFlag)
3805 {
3806 priv->EEPROMTxPowerDiff = *(u8 *)&hwinfo[EEPROM_PwDiff];
3807 priv->EEPROMThermalMeter = *(u8 *)&hwinfo[EEPROM_ThermalMeter];
3808 }
3809 //else
3810 //{
3811 // priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3812 // priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3813 //}
3814
3815 RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMTxPowerDiff);
3816 RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
3817
3818 //
3819 // Read Tx Power gain offset of legacy OFDM to HT rate.
3820 // Read CrystalCap from EEPROM
3821 //
3822 //if(!priv->AutoloadFailFlag)
3823 {
3824 priv->EEPROMCrystalCap = *(u8 *)&hwinfo[EEPROM_CrystalCap];
3825 }
3826 //else
3827 //{
3828 // priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3829 //}
3830
3831 RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
3832
3833 //
3834 // Get Tx Power Base.
3835 //
3836 //if(!priv->AutoloadFailFlag)
3837 {
3838 priv->EEPROMTxPwrBase = *(u8 *)&hwinfo[EEPROM_TxPowerBase];
3839 }
3840 //else
3841 //{
3842 // priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3843 //}
3844
3845 RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
3846
3847
3848 //
3849 // Get TSSI value for each path.
3850 //
3851 //if(!priv->AutoloadFailFlag)
3852 {
3853 priv->EEPROMTSSI_A = *(u8 *)&hwinfo[EEPROM_TSSI_A];
3854 priv->EEPROMTSSI_B = *(u8 *)&hwinfo[EEPROM_TSSI_B];
3855 }
3856 //else
3857 //{ // Default setting for Empty EEPROM
3858 // priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3859 // priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3860 //}
3861
3862 RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n", priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
3863
3864 //
3865 // Get Tx Power tracking mode.
3866 //
3867 //if(!priv->AutoloadFailFlag)
3868 {
3869 priv->EEPROMTxPwrTkMode = *(u8 *)&hwinfo[EEPROM_TxPwTkMode];
3870 }
3871
3872 RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
3873
3874
3875 {
3876 //
3877 // Buffer TxPwIdx(i.e., from offset 0x55~0x66, total 18Bytes)
3878 // Update CCK, OFDM (1T/2T)Tx Power Index from above buffer.
3879 //
3880
3881 //
3882 // Get Tx Power Level by Channel
3883 //
3884 //if(!priv->AutoloadFailFlag)
3885 {
3886 // Read Tx power of Channel 1 ~ 14 from EFUSE.
3887 // 92S suupport RF A & B
3888 for (rf_path = 0; rf_path < 2; rf_path++)
3889 {
3890 for (i = 0; i < 3; i++)
3891 {
3892 // Read CCK RF A & B Tx power
3893 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3894 hwinfo[EEPROM_TxPwIndex+rf_path*3+i];
3895
3896 // Read OFDM RF A & B Tx power for 1T
3897 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3898 hwinfo[EEPROM_TxPwIndex+6+rf_path*3+i];
3899
3900 // Read OFDM RF A & B Tx power for 2T
3901 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3902 hwinfo[EEPROM_TxPwIndex+12+rf_path*3+i];
3903 }
3904 }
3905
3906 }
3907 //
3908 // Update Tx Power HAL variables.
3909 //
3910 for (rf_path = 0; rf_path < 2; rf_path++)
3911 {
3912 for (i = 0; i < 3; i++)
3913 {
3914 RT_TRACE((COMP_INIT), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3915 priv->RfCckChnlAreaTxPwr[rf_path][i]);
3916 RT_TRACE((COMP_INIT), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3917 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
3918 RT_TRACE((COMP_INIT), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
3919 }
3920
3921 // Assign dedicated channel tx power
3922 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3923 {
3924 if (i < 3) // Cjanel 1-3
3925 index = 0;
3926 else if (i < 9) // Channel 4-9
3927 index = 1;
3928 else // Channel 10-14
3929 index = 2;
3930
3931 // Record A & B CCK /OFDM - 1T/2T Channel area tx power
3932 priv->RfTxPwrLevelCck[rf_path][i] =
3933 priv->RfCckChnlAreaTxPwr[rf_path][index];
3934 priv->RfTxPwrLevelOfdm1T[rf_path][i] =
3935 priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
3936 priv->RfTxPwrLevelOfdm2T[rf_path][i] =
3937 priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
3938 if (rf_path == 0)
3939 {
3940 priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ;
3941 priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i];
3942 }
3943 }
3944
3945 for(i=0; i<14; i++)
3946 {
3947 RT_TRACE((COMP_INIT),
3948 "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
3949 rf_path, i, priv->RfTxPwrLevelCck[rf_path][i],
3950 priv->RfTxPwrLevelOfdm1T[rf_path][i] ,
3951 priv->RfTxPwrLevelOfdm2T[rf_path][i] );
3952 }
3953 }
3954 }
3955
3956 //
3957 // 2009/02/09 Cosa add for new EEPROM format
3958 //
3959 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3960 {
3961 // Read tx power difference between HT OFDM 20/40 MHZ
3962 if (i < 3) // Cjanel 1-3
3963 index = 0;
3964 else if (i < 9) // Channel 4-9
3965 index = 1;
3966 else // Channel 10-14
3967 index = 2;
3968
3969 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_HT20_DIFF+index])&0xff;
3970 priv->TxPwrHt20Diff[RF90_PATH_A][i] = (tempval&0xF);
3971 priv->TxPwrHt20Diff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3972
3973 // Read OFDM<->HT tx power diff
3974 if (i < 3) // Cjanel 1-3
3975 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF])&0xff;
3976 else if (i < 9) // Channel 4-9
3977 tempval = (*(u8 *)&hwinfo[EEPROM_PwDiff])&0xff;
3978 else // Channel 10-14
3979 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+1])&0xff;
3980
3981 //cosa tempval = (*(u1Byte *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+index])&0xff;
3982 priv->TxPwrLegacyHtDiff[RF90_PATH_A][i] = (tempval&0xF);
3983 priv->TxPwrLegacyHtDiff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3984
3985 //
3986 // Read Band Edge tx power offset and check if user enable the ability
3987 //
3988 // HT 40 band edge channel
3989 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE])&0xff;
3990 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3991 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3992 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+1])&0xff;
3993 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3994 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3995 // HT 20 band edge channel
3996 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+2])&0xff;
3997 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3998 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3999 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+3])&0xff;
4000 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
4001 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
4002 // OFDM band edge channel
4003 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+4])&0xff;
4004 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
4005 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
4006 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+5])&0xff;
4007 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
4008 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
4009
4010 priv->TxPwrbandEdgeFlag = (*(u8 *)&hwinfo[TX_PWR_BAND_EDGE_CHK]);
4011 }
4012
4013 for(i=0; i<14; i++)
4014 RT_TRACE(COMP_INIT, "RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_A][i]);
4015 for(i=0; i<14; i++)
4016 RT_TRACE(COMP_INIT, "RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_A][i]);
4017 for(i=0; i<14; i++)
4018 RT_TRACE(COMP_INIT, "RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_B][i]);
4019 for(i=0; i<14; i++)
4020 RT_TRACE(COMP_INIT, "RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_B][i]);
4021 RT_TRACE(COMP_INIT, "RF-A HT40 band-edge low/high power diff = 0x%x/0x%x\n",
4022 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0],
4023 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1]);
4024 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT40 band-edge low/high power diff = 0x%x/0x%x\n",
4025 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0],
4026 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1]);
4027
4028 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A HT20 band-edge low/high power diff = 0x%x/0x%x\n",
4029 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0],
4030 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1]);
4031 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT20 band-edge low/high power diff = 0x%x/0x%x\n",
4032 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0],
4033 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1]);
4034
4035 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A OFDM band-edge low/high power diff = 0x%x/0x%x\n",
4036 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0],
4037 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1]);
4038 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B OFDM band-edge low/high power diff = 0x%x/0x%x\n",
4039 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0],
4040 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1]);
4041 RT_TRACE((COMP_INIT&COMP_DBG), "Band-edge enable flag = %d\n", priv->TxPwrbandEdgeFlag);
4042
4043 //
4044 // Update remained HAL variables.
4045 //
4046 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
4047 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;
4048 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
4049 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit[3:0]
4050 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit[7:4]
4051 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit[15:12]
4052 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter&0x1f);// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
4053 priv->LedStrategy = SW_LED_MODE0;
4054
4055 init_rate_adaptive(dev);
4056
4057 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4058
4059 //return RT_STATUS_SUCCESS;
4060 }
4061
4062
4063 //
4064 // Description:
4065 // Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
4066 //
4067 // Assumption:
4068 // 1. CR9346 regiser has verified.
4069 // 2. PASSIVE_LEVEL (USB interface)
4070 //
4071 // Created by Roger, 2008.10.21.
4072 //
4073 static void rtl8192SU_read_eeprom_info(struct net_device *dev)
4074 {
4075 struct r8192_priv *priv = ieee80211_priv(dev);
4076 u8 tmpU1b;
4077
4078 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
4079
4080 // Retrieve Chip version.
4081 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
4082 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
4083
4084 tmpU1b = read_nic_byte(dev, EPROM_CMD);//CR9346
4085
4086 // To check system boot selection.
4087 if (tmpU1b & CmdEERPOMSEL)
4088 {
4089 RT_TRACE(COMP_INIT, "Boot from EEPROM\n");
4090 priv->EepromOrEfuse = TRUE;
4091 }
4092 else
4093 {
4094 RT_TRACE(COMP_INIT, "Boot from EFUSE\n");
4095 priv->EepromOrEfuse = FALSE;
4096 }
4097
4098 // To check autoload success or not.
4099 if (tmpU1b & CmdEEPROM_En)
4100 {
4101 RT_TRACE(COMP_INIT, "Autoload OK!!\n");
4102 priv->AutoloadFailFlag=FALSE;
4103 rtl8192SU_ReadAdapterInfo8192SUsb(dev);//eeprom or e-fuse
4104 }
4105 else
4106 { // Auto load fail.
4107 RT_TRACE(COMP_INIT, "AutoLoad Fail reported from CR9346!!\n");
4108 priv->AutoloadFailFlag=TRUE;
4109 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
4110
4111 //if (IS_BOOT_FROM_EFUSE(Adapter))
4112 if(!priv->EepromOrEfuse)
4113 {
4114 RT_TRACE(COMP_INIT, "Update shadow map for EFuse future use!!\n");
4115 EFUSE_ShadowMapUpdate(dev);
4116 }
4117 }
4118 #ifdef TO_DO_LIST
4119 if((priv->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
4120 {
4121 pMgntInfo->ChannelPlan = HalMapChannelPlan8192S(Adapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
4122 pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change channel plan.
4123 }
4124 else
4125 {
4126 pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan;
4127 }
4128
4129 switch(pMgntInfo->ChannelPlan)
4130 {
4131 case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
4132 {
4133 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
4134
4135 pDot11dInfo->bEnabled = TRUE;
4136 }
4137 RT_TRACE(COMP_INIT, DBG_LOUD, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
4138 break;
4139 }
4140
4141 RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan));
4142 RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
4143
4144 RT_TRACE(COMP_INIT, DBG_LOUD, ("<==== ReadAdapterInfo8192S\n"));
4145 #endif
4146
4147 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4148
4149 //return RT_STATUS_SUCCESS;
4150 }
4151
4152 short rtl8192_get_channel_map(struct net_device * dev)
4153 {
4154 struct r8192_priv *priv = ieee80211_priv(dev);
4155 if(priv->ChannelPlan > COUNTRY_CODE_GLOBAL_DOMAIN){
4156 printk("rtl8180_init:Error channel plan! Set to default.\n");
4157 priv->ChannelPlan= 0;
4158 }
4159 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
4160
4161 rtl819x_set_channel_map(priv->ChannelPlan, priv);
4162 return 0;
4163 }
4164
4165 short rtl8192_init(struct net_device *dev)
4166 {
4167
4168 struct r8192_priv *priv = ieee80211_priv(dev);
4169
4170 rtl8192_init_priv_variable(dev);
4171 rtl8192_init_priv_lock(priv);
4172 rtl8192_init_priv_task(dev);
4173 rtl8192_get_eeprom_size(dev);
4174 priv->ops->rtl819x_read_eeprom_info(dev);
4175 rtl8192_get_channel_map(dev);
4176 init_hal_dm(dev);
4177 init_timer(&priv->watch_dog_timer);
4178 priv->watch_dog_timer.data = (unsigned long)dev;
4179 priv->watch_dog_timer.function = watch_dog_timer_callback;
4180
4181 //rtl8192_adapter_start(dev);
4182 #ifdef DEBUG_EPROM
4183 dump_eprom(dev);
4184 #endif
4185 return 0;
4186 }
4187
4188 /******************************************************************************
4189 *function: This function actually only set RRSR, RATR and BW_OPMODE registers
4190 * not to do all the hw config as its name says
4191 * input: net_device dev
4192 * output: none
4193 * return: none
4194 * notice: This part need to modified according to the rate set we filtered
4195 * ****************************************************************************/
4196 void rtl8192_hwconfig(struct net_device* dev)
4197 {
4198 u32 regRATR = 0, regRRSR = 0;
4199 u8 regBwOpMode = 0, regTmp = 0;
4200 struct r8192_priv *priv = ieee80211_priv(dev);
4201
4202 // Set RRSR, RATR, and BW_OPMODE registers
4203 //
4204 switch(priv->ieee80211->mode)
4205 {
4206 case WIRELESS_MODE_B:
4207 regBwOpMode = BW_OPMODE_20MHZ;
4208 regRATR = RATE_ALL_CCK;
4209 regRRSR = RATE_ALL_CCK;
4210 break;
4211 case WIRELESS_MODE_A:
4212 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4213 regRATR = RATE_ALL_OFDM_AG;
4214 regRRSR = RATE_ALL_OFDM_AG;
4215 break;
4216 case WIRELESS_MODE_G:
4217 regBwOpMode = BW_OPMODE_20MHZ;
4218 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4219 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4220 break;
4221 case WIRELESS_MODE_AUTO:
4222 #ifdef TO_DO_LIST
4223 if (Adapter->bInHctTest)
4224 {
4225 regBwOpMode = BW_OPMODE_20MHZ;
4226 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4227 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4228 }
4229 else
4230 #endif
4231 {
4232 regBwOpMode = BW_OPMODE_20MHZ;
4233 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4234 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4235 }
4236 break;
4237 case WIRELESS_MODE_N_24G:
4238 // It support CCK rate by default.
4239 // CCK rate will be filtered out only when associated AP does not support it.
4240 regBwOpMode = BW_OPMODE_20MHZ;
4241 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4242 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4243 break;
4244 case WIRELESS_MODE_N_5G:
4245 regBwOpMode = BW_OPMODE_5G;
4246 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4247 regRRSR = RATE_ALL_OFDM_AG;
4248 break;
4249 }
4250
4251 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4252 {
4253 u32 ratr_value = 0;
4254 ratr_value = regRATR;
4255 if (priv->rf_type == RF_1T2R)
4256 {
4257 ratr_value &= ~(RATE_ALL_OFDM_2SS);
4258 }
4259 write_nic_dword(dev, RATR0, ratr_value);
4260 write_nic_byte(dev, UFWP, 1);
4261 }
4262 regTmp = read_nic_byte(dev, 0x313);
4263 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
4264 write_nic_dword(dev, RRSR, regRRSR);
4265
4266 //
4267 // Set Retry Limit here
4268 //
4269 write_nic_word(dev, RETRY_LIMIT,
4270 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
4271 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
4272 // Set Contention Window here
4273
4274 // Set Tx AGC
4275
4276 // Set Tx Antenna including Feedback control
4277
4278 // Set Auto Rate fallback control
4279
4280
4281 }
4282
4283
4284 //
4285 // Description:
4286 // Initial HW relted registers.
4287 //
4288 // Assumption:
4289 // Config RTL8192S USB MAC, we should config MAC before download FW.
4290 //
4291 // 2008.09.03, Added by Roger.
4292 //
4293 static void rtl8192SU_MacConfigBeforeFwDownloadASIC(struct net_device *dev)
4294 {
4295 u8 tmpU1b;// i;
4296 // u16 tmpU2b;
4297 // u32 tmpU4b;
4298 u8 PollingCnt = 20;
4299
4300 RT_TRACE(COMP_INIT, "--->MacConfigBeforeFwDownloadASIC()\n");
4301
4302 //2MAC Initialization for power on sequence, Revised by Roger. 2008.09.03.
4303
4304 //
4305 //<Roger_Notes> Set control path switch to HW control and reset Digital Core, CPU Core and
4306 // MAC I/O to solve FW download fail when system from resume sate.
4307 // 2008.11.04.
4308 //
4309 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4310 if(tmpU1b & 0x80)
4311 {
4312 tmpU1b &= 0x3f;
4313 write_nic_byte(dev, SYS_CLKR+1, tmpU1b);
4314 }
4315 // Clear FW RPWM for FW control LPS. by tynli. 2009.02.23
4316 write_nic_byte(dev, RPWM, 0x0);
4317
4318 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4319 tmpU1b &= 0x73;
4320 write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
4321 udelay(1000);
4322
4323 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4324 write_nic_byte(dev, SPS0_CTRL+1, 0x53);
4325 write_nic_byte(dev, SPS0_CTRL, 0x57);
4326
4327 //Enable AFE Macro Block's Bandgap adn Enable AFE Macro Block's Mbias
4328 tmpU1b = read_nic_byte(dev, AFE_MISC);
4329 write_nic_byte(dev, AFE_MISC, (tmpU1b|AFE_BGEN|AFE_MBEN));
4330
4331 //Enable PLL Power (LDOA15V)
4332 tmpU1b = read_nic_byte(dev, LDOA15_CTRL);
4333 write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|LDA15_EN));
4334
4335 //Enable LDOV12D block
4336 tmpU1b = read_nic_byte(dev, LDOV12D_CTRL);
4337 write_nic_byte(dev, LDOV12D_CTRL, (tmpU1b|LDV12_EN));
4338
4339 //mpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4340 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_LDEN));
4341
4342 //PlatformSleepUs(2000);
4343
4344 //Enable Switch Regulator Block
4345 //tmpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4346 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_SWEN));
4347
4348 //write_nic_dword(Adapter, SPS1_CTRL, 0x00a7b267);
4349
4350 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4351 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b|0x08));
4352
4353 //Engineer Packet CP test Enable
4354 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4355 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x20));
4356
4357 //Support 64k IMEM, suggested by SD1 Alex.
4358 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4359 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b& 0x68));
4360
4361 //Enable AFE clock
4362 tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);
4363 write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b& 0xfb));
4364
4365 //Enable AFE PLL Macro Block
4366 tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);
4367 write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|0x11));
4368
4369 //Attatch AFE PLL to MACTOP/BB/PCIe Digital
4370 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL);
4371 write_nic_byte(dev, SYS_ISO_CTRL, (tmpU1b&0xEE));
4372
4373 // Switch to 40M clock
4374 write_nic_byte(dev, SYS_CLKR, 0x00);
4375
4376 //SSC Disable
4377 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4378 //write_nic_byte(dev, SYS_CLKR, (tmpU1b&0x5f));
4379 write_nic_byte(dev, SYS_CLKR, (tmpU1b|0xa0));
4380
4381 //Enable MAC clock
4382 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4383 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x18));
4384
4385 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4386 write_nic_byte(dev, PMC_FSM, 0x02);
4387
4388 //Enable Core digital and enable IOREG R/W
4389 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4390 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x08));
4391
4392 //Enable REG_EN
4393 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4394 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x80));
4395
4396 //Switch the control path to FW
4397 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4398 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x80)& 0xBF);
4399
4400 write_nic_byte(dev, CMDR, 0xFC);
4401 write_nic_byte(dev, CMDR+1, 0x37);
4402
4403 //Fix the RX FIFO issue(usb error), 970410
4404 tmpU1b = read_nic_byte_E(dev, 0x5c);
4405 write_nic_byte_E(dev, 0x5c, (tmpU1b|BIT7));
4406
4407 //For power save, used this in the bit file after 970621
4408 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4409 write_nic_byte(dev, SYS_CLKR, tmpU1b&(~SYS_CPU_CLKSEL));
4410
4411 // Revised for 8051 ROM code wrong operation. Added by Roger. 2008.10.16.
4412 write_nic_byte_E(dev, 0x1c, 0x80);
4413
4414 //
4415 // <Roger_EXP> To make sure that TxDMA can ready to download FW.
4416 // We should reset TxDMA if IMEM RPT was not ready.
4417 // Suggested by SD1 Alex. 2008.10.23.
4418 //
4419 do
4420 {
4421 tmpU1b = read_nic_byte(dev, TCR);
4422 if((tmpU1b & TXDMA_INIT_VALUE) == TXDMA_INIT_VALUE)
4423 break;
4424 //PlatformStallExecution(5);
4425 udelay(5);
4426 }while(PollingCnt--); // Delay 1ms
4427
4428 if(PollingCnt <= 0 )
4429 {
4430 RT_TRACE(COMP_INIT, "MacConfigBeforeFwDownloadASIC(): Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", tmpU1b);
4431 tmpU1b = read_nic_byte(dev, CMDR);
4432 write_nic_byte(dev, CMDR, tmpU1b&(~TXDMA_EN));
4433 udelay(2);
4434 write_nic_byte(dev, CMDR, tmpU1b|TXDMA_EN);// Reset TxDMA
4435 }
4436
4437
4438 RT_TRACE(COMP_INIT, "<---MacConfigBeforeFwDownloadASIC()\n");
4439 }
4440
4441 //
4442 // Description:
4443 // Initial HW relted registers.
4444 //
4445 // Assumption:
4446 // 1. This function is only invoked at driver intialization once.
4447 // 2. PASSIVE LEVEL.
4448 //
4449 // 2008.06.10, Added by Roger.
4450 //
4451 static void rtl8192SU_MacConfigAfterFwDownload(struct net_device *dev)
4452 {
4453 struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
4454 //PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
4455 //u8 tmpU1b, RxPageCfg, i;
4456 u16 tmpU2b;
4457 u8 tmpU1b;//, i;
4458
4459
4460 RT_TRACE(COMP_INIT, "--->MacConfigAfterFwDownload()\n");
4461
4462 // Enable Tx/Rx
4463 tmpU2b = (BBRSTn|BB_GLB_RSTn|SCHEDULE_EN|MACRXEN|MACTXEN|DDMA_EN|
4464 FW2HW_EN|RXDMA_EN|TXDMA_EN|HCI_RXDMA_EN|HCI_TXDMA_EN); //3
4465 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_COMMAND, &tmpU1b );
4466 write_nic_word(dev, CMDR, tmpU2b); //LZM REGISTER COM 090305
4467
4468 // Loopback mode or not
4469 priv->LoopbackMode = RTL8192SU_NO_LOOPBACK; // Set no loopback as default.
4470 if(priv->LoopbackMode == RTL8192SU_NO_LOOPBACK)
4471 tmpU1b = LBK_NORMAL;
4472 else if (priv->LoopbackMode == RTL8192SU_MAC_LOOPBACK )
4473 tmpU1b = LBK_MAC_DLB;
4474 else
4475 RT_TRACE(COMP_INIT, "Serious error: wrong loopback mode setting\n");
4476
4477 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_LBK_MODE, &tmpU1b);
4478 write_nic_byte(dev, LBKMD_SEL, tmpU1b);
4479
4480 // Set RCR
4481 write_nic_dword(dev, RCR, priv->ReceiveConfig);
4482 RT_TRACE(COMP_INIT, "MacConfigAfterFwDownload(): Current RCR settings(%#x)\n", priv->ReceiveConfig);
4483
4484
4485 // Set RQPN
4486 //
4487 // <Roger_Notes> 2008.08.18.
4488 // 6 endpoints:
4489 // (1) Page number on CMDQ is 0x03.
4490 // (2) Page number on BCNQ, HQ and MGTQ is 0.
4491 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4492 // (4) Page number on PUBQ is 0xdd
4493 //
4494 // 11 endpoints:
4495 // (1) Page number on CMDQ is 0x00.
4496 // (2) Page number on BCNQ is 0x02, HQ and MGTQ are 0x03.
4497 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4498 // (4) Page number on PUBQ is 0xd8
4499 //
4500 //write_nic_dword(Adapter, 0xa0, 0x07070707); //BKQ, BEQ, VIQ and VOQ
4501 //write_nic_byte(dev, 0xa4, 0x00); // HCCAQ
4502
4503 // Fix the RX FIFO issue(USB error), Rivesed by Roger, 2008-06-14
4504 tmpU1b = read_nic_byte_E(dev, 0x5C);
4505 write_nic_byte_E(dev, 0x5C, tmpU1b|BIT7);
4506
4507 // For EFUSE init configuration.
4508 //if (IS_BOOT_FROM_EFUSE(Adapter)) // We may R/W EFUSE in EFUSE mode
4509 if (priv->bBootFromEfuse)
4510 {
4511 u8 tempval;
4512
4513 tempval = read_nic_byte(dev, SYS_ISO_CTRL+1);
4514 tempval &= 0xFE;
4515 write_nic_byte(dev, SYS_ISO_CTRL+1, tempval);
4516
4517 // Enable LDO 2.5V for write action
4518 //tempval = read_nic_byte(Adapter, EFUSE_TEST+3);
4519 //write_nic_byte(Adapter, EFUSE_TEST+3, (tempval | 0x80));
4520
4521 // Change Efuse Clock for write action
4522 //write_nic_byte(Adapter, EFUSE_CLK, 0x03);
4523
4524 // Change Program timing
4525 write_nic_byte(dev, EFUSE_CTRL+3, 0x72);
4526 //printk("!!!!!!!!!!!!!!!!!!!!!%s: write 0x33 with 0x72\n",__FUNCTION__);
4527 RT_TRACE(COMP_INIT, "EFUSE CONFIG OK\n");
4528 }
4529
4530
4531 RT_TRACE(COMP_INIT, "<---MacConfigAfterFwDownload()\n");
4532 }
4533
4534 void rtl8192SU_HwConfigureRTL8192SUsb(struct net_device *dev)
4535 {
4536
4537 struct r8192_priv *priv = ieee80211_priv(dev);
4538 u8 regBwOpMode = 0;
4539 u32 regRATR = 0, regRRSR = 0;
4540 u8 regTmp = 0;
4541 u32 i = 0;
4542
4543 //1 This part need to modified according to the rate set we filtered!!
4544 //
4545 // Set RRSR, RATR, and BW_OPMODE registers
4546 //
4547 switch(priv->ieee80211->mode)
4548 {
4549 case WIRELESS_MODE_B:
4550 regBwOpMode = BW_OPMODE_20MHZ;
4551 regRATR = RATE_ALL_CCK;
4552 regRRSR = RATE_ALL_CCK;
4553 break;
4554 case WIRELESS_MODE_A:
4555 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4556 regRATR = RATE_ALL_OFDM_AG;
4557 regRRSR = RATE_ALL_OFDM_AG;
4558 break;
4559 case WIRELESS_MODE_G:
4560 regBwOpMode = BW_OPMODE_20MHZ;
4561 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4562 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4563 break;
4564 case WIRELESS_MODE_AUTO:
4565 if (priv->bInHctTest)
4566 {
4567 regBwOpMode = BW_OPMODE_20MHZ;
4568 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4569 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4570 }
4571 else
4572 {
4573 regBwOpMode = BW_OPMODE_20MHZ;
4574 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4575 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4576 }
4577 break;
4578 case WIRELESS_MODE_N_24G:
4579 // It support CCK rate by default.
4580 // CCK rate will be filtered out only when associated AP does not support it.
4581 regBwOpMode = BW_OPMODE_20MHZ;
4582 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4583 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4584 break;
4585 case WIRELESS_MODE_N_5G:
4586 regBwOpMode = BW_OPMODE_5G;
4587 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4588 regRRSR = RATE_ALL_OFDM_AG;
4589 break;
4590 }
4591
4592 //
4593 // <Roger_Notes> We disable CCK response rate until FIB CCK rate IC's back.
4594 // 2008.09.23.
4595 //
4596 regTmp = read_nic_byte(dev, INIRTSMCS_SEL);
4597 regRRSR = ((regRRSR & 0x000fffff)<<8) | regTmp;
4598
4599 //
4600 // Update SIFS timing.
4601 //
4602 //priv->SifsTime = 0x0e0e0a0a;
4603 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SIFS, (pu1Byte)&pHalData->SifsTime);
4604 { u8 val[4] = {0x0e, 0x0e, 0x0a, 0x0a};
4605 // SIFS for CCK Data ACK
4606 write_nic_byte(dev, SIFS_CCK, val[0]);
4607 // SIFS for CCK consecutive tx like CTS data!
4608 write_nic_byte(dev, SIFS_CCK+1, val[1]);
4609
4610 // SIFS for OFDM Data ACK
4611 write_nic_byte(dev, SIFS_OFDM, val[2]);
4612 // SIFS for OFDM consecutive tx like CTS data!
4613 write_nic_byte(dev, SIFS_OFDM+1, val[3]);
4614 }
4615
4616 write_nic_dword(dev, INIRTSMCS_SEL, regRRSR);
4617 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4618
4619 //
4620 // Suggested by SD1 Alex, 2008-06-14.
4621 //
4622 //PlatformEFIOWrite1Byte(Adapter, TXOP_STALL_CTRL, 0x80);//NAV to protect all TXOP.
4623
4624 //
4625 // Set Data Auto Rate Fallback Retry Count register.
4626 //
4627 write_nic_dword(dev, DARFRC, 0x02010000);
4628 write_nic_dword(dev, DARFRC+4, 0x06050403);
4629 write_nic_dword(dev, RARFRC, 0x02010000);
4630 write_nic_dword(dev, RARFRC+4, 0x06050403);
4631
4632 // Set Data Auto Rate Fallback Reg. Added by Roger, 2008.09.22.
4633 for (i = 0; i < 8; i++)
4634 write_nic_dword(dev, ARFR0+i*4, 0x1f0ffff0);
4635
4636 //
4637 // Aggregation length limit. Revised by Roger. 2008.09.22.
4638 //
4639 write_nic_byte(dev, AGGLEN_LMT_H, 0x0f); // Set AMPDU length to 12Kbytes for ShortGI case.
4640 write_nic_dword(dev, AGGLEN_LMT_L, 0xddd77442); // Long GI
4641 write_nic_dword(dev, AGGLEN_LMT_L+4, 0xfffdd772);
4642
4643 // Set NAV protection length
4644 write_nic_word(dev, NAV_PROT_LEN, 0x0080);
4645
4646 // Set TXOP stall control for several queue/HI/BCN/MGT/
4647 write_nic_byte(dev, TXOP_STALL_CTRL, 0x00); // NAV Protect next packet.
4648
4649 // Set MSDU lifetime.
4650 write_nic_byte(dev, MLT, 0x8f);
4651
4652 // Set CCK/OFDM SIFS
4653 write_nic_word(dev, SIFS_CCK, 0x0a0a); // CCK SIFS shall always be 10us.
4654 write_nic_word(dev, SIFS_OFDM, 0x0e0e);
4655
4656 write_nic_byte(dev, ACK_TIMEOUT, 0x40);
4657
4658 // CF-END Threshold
4659 write_nic_byte(dev, CFEND_TH, 0xFF);
4660
4661 //
4662 // For Min Spacing configuration.
4663 //
4664 switch(priv->rf_type)
4665 {
4666 case RF_1T2R:
4667 case RF_1T1R:
4668 RT_TRACE(COMP_INIT, "Initializeadapter: RF_Type%s\n", (priv->rf_type==RF_1T1R? "(1T1R)":"(1T2R)"));
4669 priv->MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);
4670 break;
4671 case RF_2T2R:
4672 case RF_2T2R_GREEN:
4673 RT_TRACE(COMP_INIT, "Initializeadapter:RF_Type(2T2R)\n");
4674 priv->MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);
4675 break;
4676 }
4677 write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);
4678
4679 //LZM 090219
4680 //
4681 // For Min Spacing configuration.
4682 //
4683 //priv->MinSpaceCfg = 0x00;
4684 //rtl8192SU_SetHwRegAmpduMinSpace(dev, priv->MinSpaceCfg);
4685 }
4686
4687
4688 // Description: Initial HW relted registers.
4689 //
4690 // Assumption: This function is only invoked at driver intialization once.
4691 //
4692 // 2008.06.10, Added by Roger.
4693 bool rtl8192SU_adapter_start(struct net_device *dev)
4694 {
4695 struct r8192_priv *priv = ieee80211_priv(dev);
4696 //u32 dwRegRead = 0;
4697 //bool init_status = true;
4698 //u32 ulRegRead;
4699 bool rtStatus = true;
4700 //u8 PipeIndex;
4701 //u8 eRFPath, tmpU1b;
4702 u8 fw_download_times = 1;
4703
4704
4705 RT_TRACE(COMP_INIT, "--->InitializeAdapter8192SUsb()\n");
4706
4707 //pHalData->bGPIOChangeRF = FALSE;
4708
4709
4710 //
4711 // <Roger_Notes> 2008.06.15.
4712 //
4713 // Initialization Steps on RTL8192SU:
4714 // a. MAC initialization prior to sending down firmware code.
4715 // b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4716 // c. MAC configuration after firmware has been download successfully.
4717 // d. Initialize BB related configurations.
4718 // e. Initialize RF related configurations.
4719 // f. Start to BulkIn transfer.
4720 //
4721
4722 //
4723 //a. MAC initialization prior to send down firmware code.
4724 //
4725 start:
4726 rtl8192SU_MacConfigBeforeFwDownloadASIC(dev);
4727
4728 //
4729 //b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4730 //
4731 rtStatus = FirmwareDownload92S(dev);
4732 if(rtStatus != true)
4733 {
4734 if(fw_download_times == 1){
4735 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed once, Download again!!\n");
4736 fw_download_times = fw_download_times + 1;
4737 goto start;
4738 }else{
4739 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed twice, end!!\n");
4740 goto end;
4741 }
4742 }
4743 //
4744 //c. MAC configuration after firmware has been download successfully.
4745 //
4746 rtl8192SU_MacConfigAfterFwDownload(dev);
4747
4748 //priv->bLbusEnable = TRUE;
4749 //if(priv->RegRfOff == TRUE)
4750 // priv->eRFPowerState = eRfOff;
4751
4752 // Save target channel
4753 // <Roger_Notes> Current Channel will be updated again later.
4754 //priv->CurrentChannel = Channel;
4755 rtStatus = PHY_MACConfig8192S(dev);//===>ok
4756 if(rtStatus != true)
4757 {
4758 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure MAC!!\n");
4759 goto end;
4760 }
4761 if (1){
4762 int i;
4763 for (i=0; i<4; i++)
4764 write_nic_dword(dev,WDCAPARA_ADD[i], 0x5e4322);
4765 write_nic_byte(dev,AcmHwCtrl, 0x01);
4766 }
4767
4768
4769 //
4770 //d. Initialize BB related configurations.
4771 //
4772
4773 rtStatus = PHY_BBConfig8192S(dev);//===>ok
4774 if(rtStatus != true)
4775 {
4776 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure BB!!\n");
4777 goto end;
4778 }
4779
4780 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58);//===>ok
4781
4782 //
4783 // e. Initialize RF related configurations.
4784 //
4785 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
4786 priv->Rf_Mode = RF_OP_By_SW_3wire;
4787
4788 // For RF test only from Scott's suggestion
4789 //write_nic_byte(dev, 0x27, 0xDB);
4790 //write_nic_byte(dev, 0x1B, 0x07);
4791
4792
4793 write_nic_byte(dev, AFE_XTAL_CTRL+1, 0xDB);
4794
4795 // <Roger_Notes> The following IOs are configured for each RF modules.
4796 // Enable RF module and reset RF and SDM module. 2008.11.17.
4797 if(priv->card_8192_version == VERSION_8192S_ACUT)
4798 write_nic_byte(dev, SPS1_CTRL+3, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB)); // Fix A-Cut bug.
4799 else
4800 write_nic_byte(dev, RF_CTRL, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB));
4801
4802 rtStatus = PHY_RFConfig8192S(dev);//===>ok
4803 if(rtStatus != true)
4804 {
4805 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure RF!!\n");
4806 goto end;
4807 }
4808
4809
4810 // Set CCK and OFDM Block "ON"
4811 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4812 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4813
4814 //
4815 // Turn off Radio B while RF type is 1T1R by SD3 Wilsion's request.
4816 // Revised by Roger, 2008.12.18.
4817 //
4818 if(priv->rf_type == RF_1T1R)
4819 {
4820 // This is needed for PHY_REG after 20081219
4821 rtl8192_setBBreg(dev, rFPGA0_RFMOD, 0xff000000, 0x03);
4822 // This is needed for PHY_REG before 20081219
4823 //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x11);
4824 }
4825
4826
4827 //LZM 090219
4828 // Set CCK and OFDM Block "ON"
4829 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4830 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4831
4832
4833 //3//Get hardware version, do it in read eeprom?
4834 //GetHardwareVersion819xUsb(Adapter);
4835
4836 //3//
4837 //3 //Set Hardware
4838 //3//
4839 rtl8192SU_HwConfigureRTL8192SUsb(dev);//==>ok
4840
4841 //
4842 // <Roger_Notes> We set MAC address here if autoload was failed before,
4843 // otherwise IDR0 will NOT contain any value.
4844 //
4845 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
4846 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
4847 if(!priv->bInHctTest)
4848 {
4849 if(priv->ResetProgress == RESET_TYPE_NORESET)
4850 {
4851 //RT_TRACE(COMP_MLME, DBG_LOUD, ("Initializeadapter8192SUsb():RegWirelessMode(%#x) \n", Adapter->RegWirelessMode));
4852 //Adapter->HalFunc.SetWirelessModeHandler(Adapter, Adapter->RegWirelessMode);
4853 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);//===>ok
4854 }
4855 }
4856 else
4857 {
4858 priv->ieee80211->mode = WIRELESS_MODE_G;
4859 rtl8192_SetWirelessMode(dev, WIRELESS_MODE_G);
4860 }
4861
4862 //Security related.
4863 //-----------------------------------------------------------------------------
4864 // Set up security related. 070106, by rcnjko:
4865 // 1. Clear all H/W keys.
4866 // 2. Enable H/W encryption/decryption.
4867 //-----------------------------------------------------------------------------
4868 //CamResetAllEntry(Adapter);
4869 //Adapter->HalFunc.EnableHWSecCfgHandler(Adapter);
4870
4871 //SecClearAllKeys(Adapter);
4872 CamResetAllEntry(dev);
4873 //SecInit(Adapter);
4874 {
4875 u8 SECR_value = 0x0;
4876 SECR_value |= SCR_TxEncEnable;
4877 SECR_value |= SCR_RxDecEnable;
4878 SECR_value |= SCR_NoSKMC;
4879 write_nic_byte(dev, SECR, SECR_value);
4880 }
4881
4882 #ifdef TO_DO_LIST
4883
4884 //PHY_UpdateInitialGain(dev);
4885
4886 if(priv->RegRfOff == true)
4887 { // User disable RF via registry.
4888 u8 eRFPath = 0;
4889
4890 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RegRfOff ----------\n");
4891 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
4892 // Those action will be discard in MgntActSet_RF_State because off the same state
4893 for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
4894 rtl8192_setBBreg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
4895 }
4896 else if(priv->RfOffReason > RF_CHANGE_BY_PS)
4897 { // H/W or S/W RF OFF before sleep.
4898 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RfOffReason(%d) ----------\n", priv->RfOffReason);
4899 MgntActSet_RF_State(dev, eRfOff, priv->RfOffReason);
4900 }
4901 else
4902 {
4903 priv->eRFPowerState = eRfOn;
4904 priv->RfOffReason = 0;
4905 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): RF is on ----------\n");
4906 }
4907
4908 #endif
4909
4910
4911 //
4912 // f. Start to BulkIn transfer.
4913 //
4914 #ifdef TO_DO_LIST
4915
4916 #ifndef UNDER_VISTA
4917 {
4918 u8 i;
4919 PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
4920
4921 for(PipeIndex=0; PipeIndex < MAX_RX_QUEUE; PipeIndex++)
4922 {
4923 if (PipeIndex == 0)
4924 {
4925 for(i=0; i<32; i++)
4926 HalUsbInMpdu(Adapter, PipeIndex);
4927 }
4928 else
4929 {
4930 //HalUsbInMpdu(Adapter, PipeIndex);
4931 //HalUsbInMpdu(Adapter, PipeIndex);
4932 //HalUsbInMpdu(Adapter, PipeIndex);
4933 }
4934 }
4935 PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
4936 }
4937 #else
4938 // Joseph add to 819X code base for Vista USB platform.
4939 // This part may need to be add to Hal819xU code base. too.
4940 PlatformUsbEnableInPipes(Adapter);
4941 #endif
4942
4943 RT_TRACE(COMP_INIT, "HighestOperaRate = %x\n", Adapter->MgntInfo.HighestOperaRate);
4944
4945 PlatformStartWorkItem( &(pHalData->RtUsbCheckForHangWorkItem) );
4946
4947 //
4948 // <Roger_EXP> The following configurations are for ASIC verification temporally.
4949 // 2008.07.10.
4950 //
4951
4952 #endif
4953
4954 //
4955 // Read EEPROM TX power index and PHY_REG_PG.txt to capture correct
4956 // TX power index for different rate set.
4957 //
4958 //if(priv->card_8192_version >= VERSION_8192S_ACUT)
4959 {
4960 // Get original hw reg values
4961 PHY_GetHWRegOriginalValue(dev);
4962
4963 // Write correct tx power index//FIXLZM
4964 PHY_SetTxPowerLevel8192S(dev, priv->chan);
4965 }
4966
4967 {
4968 u8 tmpU1b = 0;
4969 // EEPROM R/W workaround
4970 tmpU1b = read_nic_byte(dev, MAC_PINMUX_CFG);
4971 write_nic_byte(dev, MAC_PINMUX_CFG, tmpU1b&(~GPIOMUX_EN));
4972 }
4973
4974 //
4975 //<Roger_Notes> 2008.08.19.
4976 // We return status here for temporal FPGA verification, 2008.08.19.
4977
4978 #ifdef RTL8192SU_FW_IQK
4979 write_nic_dword(dev, WFM5, FW_IQK_ENABLE);
4980 ChkFwCmdIoDone(dev);
4981 #endif
4982
4983 //
4984 // <Roger_Notes> We enable high power mechanism after NIC initialized.
4985 // 2008.11.27.
4986 //
4987 write_nic_dword(dev, WFM5, FW_RA_RESET);
4988 ChkFwCmdIoDone(dev);
4989 write_nic_dword(dev, WFM5, FW_RA_ACTIVE);
4990 ChkFwCmdIoDone(dev);
4991 write_nic_dword(dev, WFM5, FW_RA_REFRESH);
4992 ChkFwCmdIoDone(dev);
4993 write_nic_dword(dev, WFM5, FW_BB_RESET_ENABLE);
4994
4995 // <Roger_Notes> We return status here for temporal FPGA verification. 2008.05.12.
4996 //
4997
4998 end:
4999 return rtStatus;
5000 }
5001
5002 /***************************************************************************
5003 -------------------------------NET STUFF---------------------------
5004 ***************************************************************************/
5005
5006 static struct net_device_stats *rtl8192_stats(struct net_device *dev)
5007 {
5008 struct r8192_priv *priv = ieee80211_priv(dev);
5009
5010 return &priv->ieee80211->stats;
5011 }
5012
5013 bool
5014 HalTxCheckStuck819xUsb(
5015 struct net_device *dev
5016 )
5017 {
5018 struct r8192_priv *priv = ieee80211_priv(dev);
5019 u16 RegTxCounter = read_nic_word(dev, 0x128);
5020 bool bStuck = FALSE;
5021 RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
5022 if(priv->TxCounter==RegTxCounter)
5023 bStuck = TRUE;
5024
5025 priv->TxCounter = RegTxCounter;
5026
5027 return bStuck;
5028 }
5029
5030 /*
5031 * <Assumption: RT_TX_SPINLOCK is acquired.>
5032 * First added: 2006.11.19 by emily
5033 */
5034 RESET_TYPE
5035 TxCheckStuck(struct net_device *dev)
5036 {
5037 struct r8192_priv *priv = ieee80211_priv(dev);
5038 u8 QueueID;
5039 // PRT_TCB pTcb;
5040 // u8 ResetThreshold;
5041 bool bCheckFwTxCnt = false;
5042 //unsigned long flags;
5043
5044 //
5045 // Decide Stuch threshold according to current power save mode
5046 //
5047
5048 // RT_TRACE(COMP_RESET, " ==> TxCheckStuck()\n");
5049 // PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK);
5050 // spin_lock_irqsave(&priv->ieee80211->lock,flags);
5051 for (QueueID = 0; QueueID<=BEACON_QUEUE;QueueID ++)
5052 {
5053 if(QueueID == TXCMD_QUEUE)
5054 continue;
5055 #if 1
5056 if((skb_queue_len(&priv->ieee80211->skb_waitQ[QueueID]) == 0) && (skb_queue_len(&priv->ieee80211->skb_aggQ[QueueID]) == 0))
5057 continue;
5058 #endif
5059
5060 bCheckFwTxCnt = true;
5061 }
5062 // PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK);
5063 // spin_unlock_irqrestore(&priv->ieee80211->lock,flags);
5064 // RT_TRACE(COMP_RESET,"bCheckFwTxCnt is %d\n",bCheckFwTxCnt);
5065 #if 1
5066 if(bCheckFwTxCnt)
5067 {
5068 if(HalTxCheckStuck819xUsb(dev))
5069 {
5070 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
5071 return RESET_TYPE_SILENT;
5072 }
5073 }
5074 #endif
5075 return RESET_TYPE_NORESET;
5076 }
5077
5078 bool
5079 HalRxCheckStuck819xUsb(struct net_device *dev)
5080 {
5081 u16 RegRxCounter = read_nic_word(dev, 0x130);
5082 struct r8192_priv *priv = ieee80211_priv(dev);
5083 bool bStuck = FALSE;
5084 //#ifdef RTL8192SU
5085
5086 //#else
5087 static u8 rx_chk_cnt = 0;
5088 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
5089 // If rssi is small, we should check rx for long time because of bad rx.
5090 // or maybe it will continuous silent reset every 2 seconds.
5091 rx_chk_cnt++;
5092 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
5093 {
5094 rx_chk_cnt = 0; //high rssi, check rx stuck right now.
5095 }
5096 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
5097 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
5098 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
5099 {
5100 if(rx_chk_cnt < 2)
5101 {
5102 return bStuck;
5103 }
5104 else
5105 {
5106 rx_chk_cnt = 0;
5107 }
5108 }
5109 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
5110 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
5111 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
5112 {
5113 if(rx_chk_cnt < 4)
5114 {
5115 //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5116 return bStuck;
5117 }
5118 else
5119 {
5120 rx_chk_cnt = 0;
5121 //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5122 }
5123 }
5124 else
5125 {
5126 if(rx_chk_cnt < 8)
5127 {
5128 //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
5129 return bStuck;
5130 }
5131 else
5132 {
5133 rx_chk_cnt = 0;
5134 //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
5135 }
5136 }
5137 //#endif
5138
5139 if(priv->RxCounter==RegRxCounter)
5140 bStuck = TRUE;
5141
5142 priv->RxCounter = RegRxCounter;
5143
5144 return bStuck;
5145 }
5146
5147 RESET_TYPE
5148 RxCheckStuck(struct net_device *dev)
5149 {
5150 struct r8192_priv *priv = ieee80211_priv(dev);
5151 //int i;
5152 bool bRxCheck = FALSE;
5153
5154 // RT_TRACE(COMP_RESET," ==> RxCheckStuck()\n");
5155 //PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
5156
5157 if(priv->IrpPendingCount > 1)
5158 bRxCheck = TRUE;
5159 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
5160
5161 // RT_TRACE(COMP_RESET,"bRxCheck is %d \n",bRxCheck);
5162 if(bRxCheck)
5163 {
5164 if(HalRxCheckStuck819xUsb(dev))
5165 {
5166 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
5167 return RESET_TYPE_SILENT;
5168 }
5169 }
5170 return RESET_TYPE_NORESET;
5171 }
5172
5173
5174 /**
5175 * This function is called by Checkforhang to check whether we should ask OS to reset driver
5176 *
5177 * \param pAdapter The adapter context for this miniport
5178 *
5179 * Note:NIC with USB interface sholud not call this function because we cannot scan descriptor
5180 * to judge whether there is tx stuck.
5181 * Note: This function may be required to be rewrite for Vista OS.
5182 * <<<Assumption: Tx spinlock has been acquired >>>
5183 *
5184 * 8185 and 8185b does not implement this function. This is added by Emily at 2006.11.24
5185 */
5186 RESET_TYPE
5187 rtl819x_ifcheck_resetornot(struct net_device *dev)
5188 {
5189 struct r8192_priv *priv = ieee80211_priv(dev);
5190 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
5191 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
5192 RT_RF_POWER_STATE rfState;
5193
5194 return RESET_TYPE_NORESET;
5195
5196 rfState = priv->ieee80211->eRFPowerState;
5197
5198 TxResetType = TxCheckStuck(dev);
5199 #if 1
5200 if( rfState != eRfOff ||
5201 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
5202 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
5203 {
5204 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
5205 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
5206 // if driver is in firmware download failure status, driver should initialize RF in the following
5207 // silent reset procedure Emily, 2008.01.21
5208
5209 // Driver should not check RX stuck in IBSS mode because it is required to
5210 // set Check BSSID in order to send beacon, however, if check BSSID is
5211 // set, STA cannot hear any packet a all. Emily, 2008.04.12
5212 RxResetType = RxCheckStuck(dev);
5213 }
5214 #endif
5215 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
5216 return RESET_TYPE_NORMAL;
5217 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT){
5218 RT_TRACE(COMP_RESET,"%s():silent reset\n",__FUNCTION__);
5219 return RESET_TYPE_SILENT;
5220 }
5221 else
5222 return RESET_TYPE_NORESET;
5223
5224 }
5225
5226 void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
5227 int _rtl8192_up(struct net_device *dev);
5228 int rtl8192_close(struct net_device *dev);
5229
5230
5231
5232 void
5233 CamRestoreAllEntry( struct net_device *dev)
5234 {
5235 u8 EntryId = 0;
5236 struct r8192_priv *priv = ieee80211_priv(dev);
5237 u8* MacAddr = priv->ieee80211->current_network.bssid;
5238
5239 static u8 CAM_CONST_ADDR[4][6] = {
5240 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
5241 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
5242 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
5243 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
5244 static u8 CAM_CONST_BROAD[] =
5245 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
5246
5247 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
5248
5249
5250 if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
5251 (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
5252 {
5253
5254 for(EntryId=0; EntryId<4; EntryId++)
5255 {
5256 {
5257 MacAddr = CAM_CONST_ADDR[EntryId];
5258 setKey(dev,
5259 EntryId ,
5260 EntryId,
5261 priv->ieee80211->pairwise_key_type,
5262 MacAddr,
5263 0,
5264 NULL);
5265 }
5266 }
5267
5268 }
5269 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
5270 {
5271
5272 {
5273 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5274 setKey(dev,
5275 4,
5276 0,
5277 priv->ieee80211->pairwise_key_type,
5278 (u8*)dev->dev_addr,
5279 0,
5280 NULL);
5281 else
5282 setKey(dev,
5283 4,
5284 0,
5285 priv->ieee80211->pairwise_key_type,
5286 MacAddr,
5287 0,
5288 NULL);
5289 }
5290 }
5291 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
5292 {
5293
5294 {
5295 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5296 setKey(dev,
5297 4,
5298 0,
5299 priv->ieee80211->pairwise_key_type,
5300 (u8*)dev->dev_addr,
5301 0,
5302 NULL);
5303 else
5304 setKey(dev,
5305 4,
5306 0,
5307 priv->ieee80211->pairwise_key_type,
5308 MacAddr,
5309 0,
5310 NULL);
5311 }
5312 }
5313
5314
5315
5316 if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
5317 {
5318 MacAddr = CAM_CONST_BROAD;
5319 for(EntryId=1 ; EntryId<4 ; EntryId++)
5320 {
5321 {
5322 setKey(dev,
5323 EntryId,
5324 EntryId,
5325 priv->ieee80211->group_key_type,
5326 MacAddr,
5327 0,
5328 NULL);
5329 }
5330 }
5331 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5332 setKey(dev,
5333 0,
5334 0,
5335 priv->ieee80211->group_key_type,
5336 CAM_CONST_ADDR[0],
5337 0,
5338 NULL);
5339 }
5340 else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
5341 {
5342 MacAddr = CAM_CONST_BROAD;
5343 for(EntryId=1; EntryId<4 ; EntryId++)
5344 {
5345 {
5346 setKey(dev,
5347 EntryId ,
5348 EntryId,
5349 priv->ieee80211->group_key_type,
5350 MacAddr,
5351 0,
5352 NULL);
5353 }
5354 }
5355
5356 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5357 setKey(dev,
5358 0 ,
5359 0,
5360 priv->ieee80211->group_key_type,
5361 CAM_CONST_ADDR[0],
5362 0,
5363 NULL);
5364 }
5365 }
5366 //////////////////////////////////////////////////////////////
5367 // This function is used to fix Tx/Rx stop bug temporarily.
5368 // This function will do "system reset" to NIC when Tx or Rx is stuck.
5369 // The method checking Tx/Rx stuck of this function is supported by FW,
5370 // which reports Tx and Rx counter to register 0x128 and 0x130.
5371 //////////////////////////////////////////////////////////////
5372 void
5373 rtl819x_ifsilentreset(struct net_device *dev)
5374 {
5375 //OCTET_STRING asocpdu;
5376 struct r8192_priv *priv = ieee80211_priv(dev);
5377 u8 reset_times = 0;
5378 int reset_status = 0;
5379 struct ieee80211_device *ieee = priv->ieee80211;
5380
5381
5382 // 2007.07.20. If we need to check CCK stop, please uncomment this line.
5383 //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
5384
5385 if(priv->ResetProgress==RESET_TYPE_NORESET)
5386 {
5387 RESET_START:
5388
5389 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
5390
5391 // Set the variable for reset.
5392 priv->ResetProgress = RESET_TYPE_SILENT;
5393 // rtl8192_close(dev);
5394 #if 1
5395 down(&priv->wx_sem);
5396 if(priv->up == 0)
5397 {
5398 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
5399 up(&priv->wx_sem);
5400 return ;
5401 }
5402 priv->up = 0;
5403 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
5404 // if(!netif_queue_stopped(dev))
5405 // netif_stop_queue(dev);
5406
5407 rtl8192_rtx_disable(dev);
5408 rtl8192_cancel_deferred_work(priv);
5409 deinit_hal_dm(dev);
5410 del_timer_sync(&priv->watch_dog_timer);
5411
5412 ieee->sync_scan_hurryup = 1;
5413 if(ieee->state == IEEE80211_LINKED)
5414 {
5415 down(&ieee->wx_sem);
5416 printk("ieee->state is IEEE80211_LINKED\n");
5417 ieee80211_stop_send_beacons(priv->ieee80211);
5418 del_timer_sync(&ieee->associate_timer);
5419 cancel_delayed_work(&ieee->associate_retry_wq);
5420 ieee80211_stop_scan(ieee);
5421 netif_carrier_off(dev);
5422 up(&ieee->wx_sem);
5423 }
5424 else{
5425 printk("ieee->state is NOT LINKED\n");
5426 ieee80211_softmac_stop_protocol(priv->ieee80211); }
5427 up(&priv->wx_sem);
5428 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
5429 //rtl8192_irq_disable(dev);
5430 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
5431 reset_status = _rtl8192_up(dev);
5432
5433 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
5434 if(reset_status == -EAGAIN)
5435 {
5436 if(reset_times < 3)
5437 {
5438 reset_times++;
5439 goto RESET_START;
5440 }
5441 else
5442 {
5443 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n", __FUNCTION__);
5444 }
5445 }
5446 #endif
5447 ieee->is_silent_reset = 1;
5448 #if 1
5449 EnableHWSecurityConfig8192(dev);
5450 #if 1
5451 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
5452 {
5453 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5454
5455 #if 1
5456 queue_work(ieee->wq, &ieee->associate_complete_wq);
5457 #endif
5458
5459 }
5460 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
5461 {
5462 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5463 ieee->link_change(ieee->dev);
5464
5465 // notify_wx_assoc_event(ieee);
5466
5467 ieee80211_start_send_beacons(ieee);
5468
5469 if (ieee->data_hard_resume)
5470 ieee->data_hard_resume(ieee->dev);
5471 netif_carrier_on(ieee->dev);
5472 }
5473 #endif
5474
5475 CamRestoreAllEntry(dev);
5476
5477 priv->ResetProgress = RESET_TYPE_NORESET;
5478 priv->reset_count++;
5479
5480 priv->bForcedSilentReset =false;
5481 priv->bResetInProgress = false;
5482
5483 // For test --> force write UFWP.
5484 write_nic_byte(dev, UFWP, 1);
5485 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
5486 #endif
5487 }
5488 }
5489
5490 void CAM_read_entry(
5491 struct net_device *dev,
5492 u32 iIndex
5493 )
5494 {
5495 u32 target_command=0;
5496 u32 target_content=0;
5497 u8 entry_i=0;
5498 u32 ulStatus;
5499 s32 i=100;
5500 // printk("=======>start read CAM\n");
5501 for(entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
5502 {
5503 // polling bit, and No Write enable, and address
5504 target_command= entry_i+CAM_CONTENT_COUNT*iIndex;
5505 target_command= target_command | BIT31;
5506
5507 //Check polling bit is clear
5508 // mdelay(1);
5509 #if 1
5510 while((i--)>=0)
5511 {
5512 ulStatus = read_nic_dword(dev, RWCAM);
5513 if(ulStatus & BIT31){
5514 continue;
5515 }
5516 else{
5517 break;
5518 }
5519 }
5520 #endif
5521 write_nic_dword(dev, RWCAM, target_command);
5522 RT_TRACE(COMP_SEC,"CAM_read_entry(): WRITE A0: %x \n",target_command);
5523 // printk("CAM_read_entry(): WRITE A0: %lx \n",target_command);
5524 target_content = read_nic_dword(dev, RCAMO);
5525 RT_TRACE(COMP_SEC, "CAM_read_entry(): WRITE A8: %x \n",target_content);
5526 // printk("CAM_read_entry(): WRITE A8: %lx \n",target_content);
5527 }
5528 printk("\n");
5529 }
5530
5531 void rtl819x_update_rxcounts(
5532 struct r8192_priv *priv,
5533 u32* TotalRxBcnNum,
5534 u32* TotalRxDataNum
5535 )
5536 {
5537 u16 SlotIndex;
5538 u8 i;
5539
5540 *TotalRxBcnNum = 0;
5541 *TotalRxDataNum = 0;
5542
5543 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
5544 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
5545 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
5546 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
5547 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
5548 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
5549 }
5550 }
5551
5552 extern void rtl819x_watchdog_wqcallback(struct work_struct *work)
5553 {
5554 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
5555 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
5556 struct net_device *dev = priv->ieee80211->dev;
5557 struct ieee80211_device* ieee = priv->ieee80211;
5558 RESET_TYPE ResetType = RESET_TYPE_NORESET;
5559 static u8 check_reset_cnt=0;
5560 bool bBusyTraffic = false;
5561
5562 if(!priv->up)
5563 return;
5564 hal_dm_watchdog(dev);
5565
5566 {//to get busy traffic condition
5567 if(ieee->state == IEEE80211_LINKED)
5568 {
5569 //windows mod 666 to 100.
5570 //if( ieee->LinkDetectInfo.NumRxOkInPeriod> 666 ||
5571 // ieee->LinkDetectInfo.NumTxOkInPeriod> 666 ) {
5572 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
5573 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
5574 bBusyTraffic = true;
5575 }
5576 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
5577 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
5578 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
5579 }
5580 }
5581 //added by amy for AP roaming
5582 {
5583 if(priv->ieee80211->state == IEEE80211_LINKED && priv->ieee80211->iw_mode == IW_MODE_INFRA)
5584 {
5585 u32 TotalRxBcnNum = 0;
5586 u32 TotalRxDataNum = 0;
5587
5588 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
5589 if((TotalRxBcnNum+TotalRxDataNum) == 0)
5590 {
5591 #ifdef TODO
5592 if(rfState == eRfOff)
5593 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
5594 #endif
5595 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
5596 // Dot11d_Reset(dev);
5597 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5598 notify_wx_assoc_event(priv->ieee80211);
5599 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
5600 ieee->is_roaming = true;
5601 priv->ieee80211->link_change(dev);
5602 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5603 }
5604 }
5605 priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod=0;
5606 priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod=0;
5607 }
5608 // CAM_read_entry(dev,4);
5609 //check if reset the driver
5610 if(check_reset_cnt++ >= 3 && !ieee->is_roaming)
5611 {
5612 ResetType = rtl819x_ifcheck_resetornot(dev);
5613 check_reset_cnt = 3;
5614 //DbgPrint("Start to check silent reset\n");
5615 }
5616 // RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
5617 #if 1
5618 if( (priv->force_reset) || (priv->ResetProgress==RESET_TYPE_NORESET &&
5619 (priv->bForcedSilentReset ||
5620 (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT)))) // This is control by OID set in Pomelo
5621 {
5622 RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
5623 rtl819x_ifsilentreset(dev);
5624 }
5625 #endif
5626 priv->force_reset = false;
5627 priv->bForcedSilentReset = false;
5628 priv->bResetInProgress = false;
5629 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
5630
5631 }
5632
5633 void watch_dog_timer_callback(unsigned long data)
5634 {
5635 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
5636 //printk("===============>watch_dog timer\n");
5637 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq, 0);
5638 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
5639 }
5640 int _rtl8192_up(struct net_device *dev)
5641 {
5642 struct r8192_priv *priv = ieee80211_priv(dev);
5643 //int i;
5644 int init_status = 0;
5645 priv->up=1;
5646 priv->ieee80211->ieee_up=1;
5647 RT_TRACE(COMP_INIT, "Bringing up iface");
5648 init_status = priv->ops->rtl819x_adapter_start(dev);
5649 if(!init_status)
5650 {
5651 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n", __FUNCTION__);
5652 priv->up=priv->ieee80211->ieee_up = 0;
5653 return -EAGAIN;
5654 }
5655 RT_TRACE(COMP_INIT, "start adapter finished\n");
5656 rtl8192_rx_enable(dev);
5657 // rtl8192_tx_enable(dev);
5658 if(priv->ieee80211->state != IEEE80211_LINKED)
5659 ieee80211_softmac_start_protocol(priv->ieee80211);
5660 ieee80211_reset_queue(priv->ieee80211);
5661 watch_dog_timer_callback((unsigned long) dev);
5662 if(!netif_queue_stopped(dev))
5663 netif_start_queue(dev);
5664 else
5665 netif_wake_queue(dev);
5666
5667 /*
5668 * Make sure that drop_unencrypted is initialized as "0"
5669 * No packets will be sent in non-security mode if we had set drop_unencrypted.
5670 * ex, After kill wpa_supplicant process, make the driver up again.
5671 * drop_unencrypted remains as "1", which is set by wpa_supplicant. 2008/12/04.john
5672 */
5673 priv->ieee80211->drop_unencrypted = 0;
5674
5675 return 0;
5676 }
5677
5678
5679 int rtl8192_open(struct net_device *dev)
5680 {
5681 struct r8192_priv *priv = ieee80211_priv(dev);
5682 int ret;
5683 down(&priv->wx_sem);
5684 ret = rtl8192_up(dev);
5685 up(&priv->wx_sem);
5686 return ret;
5687
5688 }
5689
5690
5691 int rtl8192_up(struct net_device *dev)
5692 {
5693 struct r8192_priv *priv = ieee80211_priv(dev);
5694
5695 if (priv->up == 1) return -1;
5696
5697 return _rtl8192_up(dev);
5698 }
5699
5700
5701 int rtl8192_close(struct net_device *dev)
5702 {
5703 struct r8192_priv *priv = ieee80211_priv(dev);
5704 int ret;
5705
5706 down(&priv->wx_sem);
5707
5708 ret = rtl8192_down(dev);
5709
5710 up(&priv->wx_sem);
5711
5712 return ret;
5713
5714 }
5715
5716 int rtl8192_down(struct net_device *dev)
5717 {
5718 struct r8192_priv *priv = ieee80211_priv(dev);
5719 int i;
5720
5721 if (priv->up == 0) return -1;
5722
5723 priv->up=0;
5724 priv->ieee80211->ieee_up = 0;
5725 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
5726 /* FIXME */
5727 if (!netif_queue_stopped(dev))
5728 netif_stop_queue(dev);
5729
5730 rtl8192_rtx_disable(dev);
5731 //rtl8192_irq_disable(dev);
5732
5733 /* Tx related queue release */
5734 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5735 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
5736 }
5737 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5738 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
5739 }
5740
5741 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5742 skb_queue_purge(&priv->ieee80211->skb_drv_aggQ [i]);
5743 }
5744
5745 //as cancel_delayed_work will del work->timer, so if work is not definedas struct delayed_work, it will corrupt
5746 // flush_scheduled_work();
5747 rtl8192_cancel_deferred_work(priv);
5748 deinit_hal_dm(dev);
5749 del_timer_sync(&priv->watch_dog_timer);
5750
5751
5752 ieee80211_softmac_stop_protocol(priv->ieee80211);
5753 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
5754 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
5755
5756 return 0;
5757 }
5758
5759
5760 void rtl8192_commit(struct net_device *dev)
5761 {
5762 struct r8192_priv *priv = ieee80211_priv(dev);
5763 int reset_status = 0;
5764 //u8 reset_times = 0;
5765 if (priv->up == 0) return ;
5766 priv->up = 0;
5767
5768 rtl8192_cancel_deferred_work(priv);
5769 del_timer_sync(&priv->watch_dog_timer);
5770 //cancel_delayed_work(&priv->SwChnlWorkItem);
5771
5772 ieee80211_softmac_stop_protocol(priv->ieee80211);
5773
5774 //rtl8192_irq_disable(dev);
5775 rtl8192_rtx_disable(dev);
5776 reset_status = _rtl8192_up(dev);
5777
5778 }
5779
5780 /*
5781 void rtl8192_restart(struct net_device *dev)
5782 {
5783 struct r8192_priv *priv = ieee80211_priv(dev);
5784 */
5785 void rtl8192_restart(struct work_struct *work)
5786 {
5787 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
5788 struct net_device *dev = priv->ieee80211->dev;
5789
5790 down(&priv->wx_sem);
5791
5792 rtl8192_commit(dev);
5793
5794 up(&priv->wx_sem);
5795 }
5796
5797 static void r8192_set_multicast(struct net_device *dev)
5798 {
5799 struct r8192_priv *priv = ieee80211_priv(dev);
5800 short promisc;
5801
5802 //down(&priv->wx_sem);
5803
5804 /* FIXME FIXME */
5805
5806 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5807
5808 if (promisc != priv->promisc)
5809 // rtl8192_commit(dev);
5810
5811 priv->promisc = promisc;
5812
5813 //schedule_work(&priv->reset_wq);
5814 //up(&priv->wx_sem);
5815 }
5816
5817
5818 int r8192_set_mac_adr(struct net_device *dev, void *mac)
5819 {
5820 struct r8192_priv *priv = ieee80211_priv(dev);
5821 struct sockaddr *addr = mac;
5822
5823 down(&priv->wx_sem);
5824
5825 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5826
5827 schedule_work(&priv->reset_wq);
5828
5829 up(&priv->wx_sem);
5830
5831 return 0;
5832 }
5833
5834 /* based on ipw2200 driver */
5835 int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5836 {
5837 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5838 struct iwreq *wrq = (struct iwreq *)rq;
5839 int ret=-1;
5840 struct ieee80211_device *ieee = priv->ieee80211;
5841 u32 key[4];
5842 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
5843 u8 zero_addr[6] = {0};
5844 struct iw_point *p = &wrq->u.data;
5845 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
5846
5847 down(&priv->wx_sem);
5848
5849
5850 if (p->length < sizeof(struct ieee_param) || !p->pointer){
5851 ret = -EINVAL;
5852 goto out;
5853 }
5854
5855 ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
5856 if (ipw == NULL){
5857 ret = -ENOMEM;
5858 goto out;
5859 }
5860 if (copy_from_user(ipw, p->pointer, p->length)) {
5861 kfree(ipw);
5862 ret = -EFAULT;
5863 goto out;
5864 }
5865
5866 switch (cmd) {
5867 case RTL_IOCTL_WPA_SUPPLICANT:
5868 //parse here for HW security
5869 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
5870 {
5871 if (ipw->u.crypt.set_tx)
5872 {
5873 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5874 ieee->pairwise_key_type = KEY_TYPE_CCMP;
5875 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5876 ieee->pairwise_key_type = KEY_TYPE_TKIP;
5877 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5878 {
5879 if (ipw->u.crypt.key_len == 13)
5880 ieee->pairwise_key_type = KEY_TYPE_WEP104;
5881 else if (ipw->u.crypt.key_len == 5)
5882 ieee->pairwise_key_type = KEY_TYPE_WEP40;
5883 }
5884 else
5885 ieee->pairwise_key_type = KEY_TYPE_NA;
5886
5887 if (ieee->pairwise_key_type)
5888 {
5889 // FIXME:these two lines below just to fix ipw interface bug, that is, it will never set mode down to driver. So treat it as ADHOC mode, if no association procedure. WB. 2009.02.04
5890 if (memcmp(ieee->ap_mac_addr, zero_addr, 6) == 0)
5891 ieee->iw_mode = IW_MODE_ADHOC;
5892 memcpy((u8*)key, ipw->u.crypt.key, 16);
5893 EnableHWSecurityConfig8192(dev);
5894 //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
5895 //added by WB.
5896 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5897 if (ieee->iw_mode == IW_MODE_ADHOC)
5898 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5899 }
5900 }
5901 else //if (ipw->u.crypt.idx) //group key use idx > 0
5902 {
5903 memcpy((u8*)key, ipw->u.crypt.key, 16);
5904 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5905 ieee->group_key_type= KEY_TYPE_CCMP;
5906 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5907 ieee->group_key_type = KEY_TYPE_TKIP;
5908 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5909 {
5910 if (ipw->u.crypt.key_len == 13)
5911 ieee->group_key_type = KEY_TYPE_WEP104;
5912 else if (ipw->u.crypt.key_len == 5)
5913 ieee->group_key_type = KEY_TYPE_WEP40;
5914 }
5915 else
5916 ieee->group_key_type = KEY_TYPE_NA;
5917
5918 if (ieee->group_key_type)
5919 {
5920 setKey( dev,
5921 ipw->u.crypt.idx,
5922 ipw->u.crypt.idx, //KeyIndex
5923 ieee->group_key_type, //KeyType
5924 broadcast_addr, //MacAddr
5925 0, //DefaultKey
5926 key); //KeyContent
5927 }
5928 }
5929 }
5930 #ifdef JOHN_HWSEC_DEBUG
5931 //john's test 0711
5932 printk("@@ wrq->u pointer = ");
5933 for(i=0;i<wrq->u.data.length;i++){
5934 if(i%10==0) printk("\n");
5935 printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
5936 }
5937 printk("\n");
5938 #endif /*JOHN_HWSEC_DEBUG*/
5939 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5940 break;
5941
5942 default:
5943 ret = -EOPNOTSUPP;
5944 break;
5945 }
5946 kfree(ipw);
5947 ipw = NULL;
5948 out:
5949 up(&priv->wx_sem);
5950 return ret;
5951 }
5952
5953 u8 rtl8192SU_HwRateToMRate(bool bIsHT, u8 rate,bool bFirstAMPDU)
5954 {
5955
5956 u8 ret_rate = 0x02;
5957
5958 if( bFirstAMPDU )
5959 {
5960 if(!bIsHT)
5961 {
5962 switch(rate)
5963 {
5964
5965 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
5966 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
5967 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
5968 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
5969 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
5970 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
5971 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
5972 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
5973 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
5974 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
5975 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
5976 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
5977
5978 default:
5979 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
5980 break;
5981 }
5982 }
5983 else
5984 {
5985 switch(rate)
5986 {
5987
5988 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
5989 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
5990 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
5991 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
5992 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
5993 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
5994 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
5995 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
5996 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
5997 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
5998 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
5999 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
6000 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
6001 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
6002 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
6003 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
6004 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
6005
6006 default:
6007 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
6008 break;
6009 }
6010
6011 }
6012 }
6013 else
6014 {
6015 switch(rate)
6016 {
6017
6018 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
6019 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
6020 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
6021 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
6022 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
6023 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
6024 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
6025 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
6026 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
6027 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
6028 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
6029 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
6030 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
6031 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
6032 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
6033 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
6034 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
6035 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
6036 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
6037 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
6038 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
6039 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
6040 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
6041 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
6042 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
6043 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
6044 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
6045 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
6046 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
6047
6048 default:
6049 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
6050 break;
6051 }
6052 }
6053 return ret_rate;
6054 }
6055
6056 u8 HwRateToMRate90(bool bIsHT, u8 rate)
6057 {
6058 u8 ret_rate = 0xff;
6059
6060 if(!bIsHT) {
6061 switch(rate) {
6062 case DESC90_RATE1M: ret_rate = MGN_1M; break;
6063 case DESC90_RATE2M: ret_rate = MGN_2M; break;
6064 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
6065 case DESC90_RATE11M: ret_rate = MGN_11M; break;
6066 case DESC90_RATE6M: ret_rate = MGN_6M; break;
6067 case DESC90_RATE9M: ret_rate = MGN_9M; break;
6068 case DESC90_RATE12M: ret_rate = MGN_12M; break;
6069 case DESC90_RATE18M: ret_rate = MGN_18M; break;
6070 case DESC90_RATE24M: ret_rate = MGN_24M; break;
6071 case DESC90_RATE36M: ret_rate = MGN_36M; break;
6072 case DESC90_RATE48M: ret_rate = MGN_48M; break;
6073 case DESC90_RATE54M: ret_rate = MGN_54M; break;
6074
6075 default:
6076 ret_rate = 0xff;
6077 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
6078 break;
6079 }
6080
6081 } else {
6082 switch(rate) {
6083 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
6084 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
6085 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
6086 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
6087 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
6088 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
6089 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
6090 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
6091 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
6092 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
6093 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
6094 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
6095 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
6096 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
6097 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
6098 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
6099 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
6100
6101 default:
6102 ret_rate = 0xff;
6103 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
6104 break;
6105 }
6106 }
6107
6108 return ret_rate;
6109 }
6110
6111 /**
6112 * Function: UpdateRxPktTimeStamp
6113 * Overview: Recored down the TSF time stamp when receiving a packet
6114 *
6115 * Input:
6116 * PADAPTER Adapter
6117 * PRT_RFD pRfd,
6118 *
6119 * Output:
6120 * PRT_RFD pRfd
6121 * (pRfd->Status.TimeStampHigh is updated)
6122 * (pRfd->Status.TimeStampLow is updated)
6123 * Return:
6124 * None
6125 */
6126 void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
6127 {
6128 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6129
6130 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
6131 stats->mac_time[0] = priv->LastRxDescTSFLow;
6132 stats->mac_time[1] = priv->LastRxDescTSFHigh;
6133 } else {
6134 priv->LastRxDescTSFLow = stats->mac_time[0];
6135 priv->LastRxDescTSFHigh = stats->mac_time[1];
6136 }
6137 }
6138
6139 //by amy 080606
6140
6141 long rtl819x_translate_todbm(u8 signal_strength_index )// 0-100 index.
6142 {
6143 long signal_power; // in dBm.
6144
6145 // Translate to dBm (x=0.5y-95).
6146 signal_power = (long)((signal_strength_index + 1) >> 1);
6147 signal_power -= 95;
6148
6149 return signal_power;
6150 }
6151
6152
6153 /* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
6154 be a local static. Otherwise, it may increase when we return from S3/S4. The
6155 value will be kept in memory or disk. We must delcare the value in adapter
6156 and it will be reinitialized when return from S3/S4. */
6157 void rtl8192_process_phyinfo(struct r8192_priv * priv,u8* buffer, struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
6158 {
6159 bool bcheck = false;
6160 u8 rfpath;
6161 u32 nspatial_stream, tmp_val;
6162 //u8 i;
6163 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
6164 static u32 slide_evm_index=0, slide_evm_statistics=0;
6165 static u32 last_rssi=0, last_evm=0;
6166
6167 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
6168 static u32 last_beacon_adc_pwdb=0;
6169
6170 struct ieee80211_hdr_3addr *hdr;
6171 u16 sc ;
6172 unsigned int frag,seq;
6173 hdr = (struct ieee80211_hdr_3addr *)buffer;
6174 sc = le16_to_cpu(hdr->seq_ctl);
6175 frag = WLAN_GET_SEQ_FRAG(sc);
6176 seq = WLAN_GET_SEQ_SEQ(sc);
6177 //cosa add 04292008 to record the sequence number
6178 pcurrent_stats->Seq_Num = seq;
6179 //
6180 // Check whether we should take the previous packet into accounting
6181 //
6182 if(!pprevious_stats->bIsAMPDU)
6183 {
6184 // if previous packet is not aggregated packet
6185 bcheck = true;
6186 }else
6187 {
6188 }
6189
6190
6191 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
6192 {
6193 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
6194 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
6195 priv->stats.slide_rssi_total -= last_rssi;
6196 }
6197 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
6198
6199 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
6200 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
6201 slide_rssi_index = 0;
6202
6203 // <1> Showed on UI for user, in dbm
6204 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
6205 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
6206 pcurrent_stats->rssi = priv->stats.signal_strength;
6207 //
6208 // If the previous packet does not match the criteria, neglect it
6209 //
6210 if(!pprevious_stats->bPacketMatchBSSID)
6211 {
6212 if(!pprevious_stats->bToSelfBA)
6213 return;
6214 }
6215
6216 if(!bcheck)
6217 return;
6218
6219
6220 //rtl8190_process_cck_rxpathsel(priv,pprevious_stats);//only rtl8190 supported
6221
6222 //
6223 // Check RSSI
6224 //
6225 priv->stats.num_process_phyinfo++;
6226
6227 /* record the general signal strength to the sliding window. */
6228
6229
6230 // <2> Showed on UI for engineering
6231 // hardware does not provide rssi information for each rf path in CCK
6232 if(!pprevious_stats->bIsCCK && (pprevious_stats->bPacketToSelf || pprevious_stats->bToSelfBA))
6233 {
6234 for (rfpath = RF90_PATH_A; rfpath < priv->NumTotalRFPath; rfpath++)
6235 {
6236 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
6237 continue;
6238
6239 //Fixed by Jacken 2008-03-20
6240 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
6241 {
6242 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
6243 //DbgPrint("MIMO RSSI initialize \n");
6244 }
6245 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
6246 {
6247 priv->stats.rx_rssi_percentage[rfpath] =
6248 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6249 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6250 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
6251 }
6252 else
6253 {
6254 priv->stats.rx_rssi_percentage[rfpath] =
6255 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6256 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6257 }
6258 RT_TRACE(COMP_DBG,"priv->stats.rx_rssi_percentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
6259 }
6260 }
6261
6262
6263 //
6264 // Check PWDB.
6265 //
6266 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6267 pprevious_stats->bIsCCK? "CCK": "OFDM",
6268 pprevious_stats->RxPWDBAll);
6269
6270 if(pprevious_stats->bPacketBeacon)
6271 {
6272 /* record the beacon pwdb to the sliding window. */
6273 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6274 {
6275 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
6276 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
6277 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
6278 //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
6279 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
6280 }
6281 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
6282 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
6283 //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
6284 slide_beacon_adc_pwdb_index++;
6285 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6286 slide_beacon_adc_pwdb_index = 0;
6287 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
6288 if(pprevious_stats->RxPWDBAll >= 3)
6289 pprevious_stats->RxPWDBAll -= 3;
6290 }
6291
6292 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6293 pprevious_stats->bIsCCK? "CCK": "OFDM",
6294 pprevious_stats->RxPWDBAll);
6295
6296
6297 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6298 {
6299 if(priv->undecorated_smoothed_pwdb < 0) // initialize
6300 {
6301 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
6302 //DbgPrint("First pwdb initialize \n");
6303 }
6304 #if 1
6305 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
6306 {
6307 priv->undecorated_smoothed_pwdb =
6308 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6309 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6310 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
6311 }
6312 else
6313 {
6314 priv->undecorated_smoothed_pwdb =
6315 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6316 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6317 }
6318 #else
6319 //Fixed by Jacken 2008-03-20
6320 if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
6321 {
6322 pHalData->UndecoratedSmoothedPWDB =
6323 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6324 pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
6325 }
6326 else
6327 {
6328 pHalData->UndecoratedSmoothedPWDB =
6329 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6330 }
6331 #endif
6332
6333 }
6334
6335 //
6336 // Check EVM
6337 //
6338 /* record the general EVM to the sliding window. */
6339 if(pprevious_stats->SignalQuality == 0)
6340 {
6341 }
6342 else
6343 {
6344 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
6345 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
6346 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
6347 last_evm = priv->stats.slide_evm[slide_evm_index];
6348 priv->stats.slide_evm_total -= last_evm;
6349 }
6350
6351 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
6352
6353 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
6354 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
6355 slide_evm_index = 0;
6356
6357 // <1> Showed on UI for user, in percentage.
6358 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
6359 priv->stats.signal_quality = tmp_val;
6360 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
6361 priv->stats.last_signal_strength_inpercent = tmp_val;
6362 }
6363
6364 // <2> Showed on UI for engineering
6365 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6366 {
6367 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
6368 {
6369 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
6370 {
6371 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
6372 {
6373 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
6374 }
6375 priv->stats.rx_evm_percentage[nspatial_stream] =
6376 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
6377 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
6378 }
6379 }
6380 }
6381 }
6382
6383
6384 }
6385
6386 /*-----------------------------------------------------------------------------
6387 * Function: rtl819x_query_rxpwrpercentage()
6388 *
6389 * Overview:
6390 *
6391 * Input: char antpower
6392 *
6393 * Output: NONE
6394 *
6395 * Return: 0-100 percentage
6396 *
6397 * Revised History:
6398 * When Who Remark
6399 * 05/26/2008 amy Create Version 0 porting from windows code.
6400 *
6401 *---------------------------------------------------------------------------*/
6402 static u8 rtl819x_query_rxpwrpercentage(
6403 char antpower
6404 )
6405 {
6406 if ((antpower <= -100) || (antpower >= 20))
6407 {
6408 return 0;
6409 }
6410 else if (antpower >= 0)
6411 {
6412 return 100;
6413 }
6414 else
6415 {
6416 return (100+antpower);
6417 }
6418
6419 } /* QueryRxPwrPercentage */
6420
6421 static u8
6422 rtl819x_evm_dbtopercentage(
6423 char value
6424 )
6425 {
6426 char ret_val;
6427
6428 ret_val = value;
6429
6430 if(ret_val >= 0)
6431 ret_val = 0;
6432 if(ret_val <= -33)
6433 ret_val = -33;
6434 ret_val = 0 - ret_val;
6435 ret_val*=3;
6436 if(ret_val == 99)
6437 ret_val = 100;
6438 return(ret_val);
6439 }
6440 //
6441 // Description:
6442 // We want good-looking for signal strength/quality
6443 // 2007/7/19 01:09, by cosa.
6444 //
6445 long
6446 rtl819x_signal_scale_mapping(
6447 long currsig
6448 )
6449 {
6450 long retsig;
6451
6452 // Step 1. Scale mapping.
6453 if(currsig >= 61 && currsig <= 100)
6454 {
6455 retsig = 90 + ((currsig - 60) / 4);
6456 }
6457 else if(currsig >= 41 && currsig <= 60)
6458 {
6459 retsig = 78 + ((currsig - 40) / 2);
6460 }
6461 else if(currsig >= 31 && currsig <= 40)
6462 {
6463 retsig = 66 + (currsig - 30);
6464 }
6465 else if(currsig >= 21 && currsig <= 30)
6466 {
6467 retsig = 54 + (currsig - 20);
6468 }
6469 else if(currsig >= 5 && currsig <= 20)
6470 {
6471 retsig = 42 + (((currsig - 5) * 2) / 3);
6472 }
6473 else if(currsig == 4)
6474 {
6475 retsig = 36;
6476 }
6477 else if(currsig == 3)
6478 {
6479 retsig = 27;
6480 }
6481 else if(currsig == 2)
6482 {
6483 retsig = 18;
6484 }
6485 else if(currsig == 1)
6486 {
6487 retsig = 9;
6488 }
6489 else
6490 {
6491 retsig = currsig;
6492 }
6493
6494 return retsig;
6495 }
6496
6497 /*-----------------------------------------------------------------------------
6498 * Function: QueryRxPhyStatus8192S()
6499 *
6500 * Overview:
6501 *
6502 * Input: NONE
6503 *
6504 * Output: NONE
6505 *
6506 * Return: NONE
6507 *
6508 * Revised History:
6509 * When Who Remark
6510 * 06/01/2007 MHC Create Version 0.
6511 * 06/05/2007 MHC Accordign to HW's new data sheet, we add CCK and OFDM
6512 * descriptor definition.
6513 * 07/04/2007 MHC According to Jerry and Bryant's document. We read
6514 * ir_isolation and ext_lna for RF's init value and use
6515 * to compensate RSSI after receiving packets.
6516 * 09/10/2008 MHC Modify name and PHY status field for 92SE.
6517 * 09/19/2008 MHC Add CCK/OFDM SS/SQ for 92S series.
6518 *
6519 *---------------------------------------------------------------------------*/
6520 static void rtl8192SU_query_rxphystatus(
6521 struct r8192_priv * priv,
6522 struct ieee80211_rx_stats * pstats,
6523 rx_desc_819x_usb *pDesc,
6524 rx_drvinfo_819x_usb * pdrvinfo,
6525 struct ieee80211_rx_stats * precord_stats,
6526 bool bpacket_match_bssid,
6527 bool bpacket_toself,
6528 bool bPacketBeacon,
6529 bool bToSelfBA
6530 )
6531 {
6532 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
6533 //PHY_STS_CCK_8192S_T *pCck_buf;
6534 phy_sts_cck_819xusb_t * pcck_buf;
6535 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
6536 //u8 *prxpkt;
6537 //u8 i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
6538 u8 i, max_spatial_stream, rxsc_sgien_exflg;
6539 char rx_pwr[4], rx_pwr_all=0;
6540 //long rx_avg_pwr = 0;
6541 //char rx_snrX, rx_evmX;
6542 u8 evm, pwdb_all;
6543 u32 RSSI, total_rssi=0;//, total_evm=0;
6544 // long signal_strength_index = 0;
6545 u8 is_cck_rate=0;
6546 u8 rf_rx_num = 0;
6547
6548
6549
6550 priv->stats.numqry_phystatus++;
6551
6552 is_cck_rate = rx_hal_is_cck_rate(pDesc);
6553
6554 // Record it for next packet processing
6555 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
6556 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
6557 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
6558 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
6559 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
6560 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
6561
6562
6563 pstats->RxMIMOSignalQuality[0] = -1;
6564 pstats->RxMIMOSignalQuality[1] = -1;
6565 precord_stats->RxMIMOSignalQuality[0] = -1;
6566 precord_stats->RxMIMOSignalQuality[1] = -1;
6567
6568 if(is_cck_rate)
6569 {
6570 u8 report;//, tmp_pwdb;
6571 //char cck_adc_pwdb[4];
6572
6573 // CCK Driver info Structure is not the same as OFDM packet.
6574 pcck_buf = (phy_sts_cck_819xusb_t *)pdrvinfo;
6575
6576 //
6577 // (1)Hardware does not provide RSSI for CCK
6578 //
6579
6580 //
6581 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6582 //
6583
6584 priv->stats.numqry_phystatusCCK++;
6585
6586 if(!priv->bCckHighPower)
6587 {
6588 report = pcck_buf->cck_agc_rpt & 0xc0;
6589 report = report>>6;
6590 switch(report)
6591 {
6592 //Fixed by Jacken from Bryant 2008-03-20
6593 //Original value is -38 , -26 , -14 , -2
6594 //Fixed value is -35 , -23 , -11 , 6
6595 case 0x3:
6596 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
6597 break;
6598 case 0x2:
6599 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
6600 break;
6601 case 0x1:
6602 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
6603 break;
6604 case 0x0:
6605 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);//6->8
6606 break;
6607 }
6608 }
6609 else
6610 {
6611 report = pdrvinfo->cfosho[0] & 0x60;
6612 report = report>>5;
6613 switch(report)
6614 {
6615 case 0x3:
6616 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6617 break;
6618 case 0x2:
6619 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
6620 break;
6621 case 0x1:
6622 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6623 break;
6624 case 0x0:
6625 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;//6->-8
6626 break;
6627 }
6628 }
6629
6630 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);//check it
6631 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6632 //pstats->RecvSignalPower = pwdb_all;
6633 pstats->RecvSignalPower = rx_pwr_all;
6634
6635 //
6636 // (3) Get Signal Quality (EVM)
6637 //
6638 //if(bpacket_match_bssid)
6639 {
6640 u8 sq;
6641
6642 if(pstats->RxPWDBAll > 40)
6643 {
6644 sq = 100;
6645 }else
6646 {
6647 sq = pcck_buf->sq_rpt;
6648
6649 if(pcck_buf->sq_rpt > 64)
6650 sq = 0;
6651 else if (pcck_buf->sq_rpt < 20)
6652 sq = 100;
6653 else
6654 sq = ((64-sq) * 100) / 44;
6655 }
6656 pstats->SignalQuality = precord_stats->SignalQuality = sq;
6657 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
6658 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
6659 }
6660 }
6661 else
6662 {
6663 priv->stats.numqry_phystatusHT++;
6664
6665 // 2008/09/19 MH For 92S debug, RX RF path always enable!!
6666 priv->brfpath_rxenable[0] = priv->brfpath_rxenable[1] = TRUE;
6667
6668 //
6669 // (1)Get RSSI for HT rate
6670 //
6671 //for(i=RF90_PATH_A; i<priv->NumTotalRFPath; i++)
6672 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
6673 {
6674 // 2008/01/30 MH we will judge RF RX path now.
6675 if (priv->brfpath_rxenable[i])
6676 rf_rx_num++;
6677 //else
6678 // continue;
6679
6680 //if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, i))
6681 // continue;
6682
6683 //Fixed by Jacken from Bryant 2008-03-20
6684 //Original value is 106
6685 //rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
6686 rx_pwr[i] = ((pdrvinfo->gain_trsw[i]&0x3F)*2) - 110;
6687
6688 /* Translate DBM to percentage. */
6689 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]); //check ok
6690 total_rssi += RSSI;
6691 RT_TRACE(COMP_RF, "RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI);
6692
6693 //Get Rx snr value in DB
6694 //tmp_rxsnr = pofdm_buf->rxsnr_X[i];
6695 //rx_snrX = (char)(tmp_rxsnr);
6696 //rx_snrX /= 2;
6697 //priv->stats.rxSNRdB[i] = (long)rx_snrX;
6698 priv->stats.rxSNRdB[i] = (long)(pdrvinfo->rxsnr[i]/2);
6699
6700 /* Translate DBM to percentage. */
6701 //RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
6702 //total_rssi += RSSI;
6703
6704 /* Record Signal Strength for next packet */
6705 //if(bpacket_match_bssid)
6706 {
6707 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
6708 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
6709 }
6710 }
6711
6712
6713 //
6714 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6715 //
6716 //Fixed by Jacken from Bryant 2008-03-20
6717 //Original value is 106
6718 //rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
6719 rx_pwr_all = (((pdrvinfo->pwdb_all ) >> 1 )& 0x7f) -106;
6720 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
6721
6722 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6723 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
6724 pstats->RecvSignalPower = rx_pwr_all;
6725
6726 //
6727 // (3)EVM of HT rate
6728 //
6729 //if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
6730 // pdrvinfo->RxRate<=DESC90_RATEMCS15)
6731 if(pDesc->RxHT && pDesc->RxMCS>=DESC92S_RATEMCS8 &&
6732 pDesc->RxMCS<=DESC92S_RATEMCS15)
6733 max_spatial_stream = 2; //both spatial stream make sense
6734 else
6735 max_spatial_stream = 1; //only spatial stream 1 makes sense
6736
6737 for(i=0; i<max_spatial_stream; i++)
6738 {
6739 //tmp_rxevm = pofdm_buf->rxevm_X[i];
6740 //rx_evmX = (char)(tmp_rxevm);
6741
6742 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
6743 // fill most significant bit to "zero" when doing shifting operation which may change a negative
6744 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
6745 //rx_evmX /= 2; //dbm
6746
6747 //evm = rtl819x_evm_dbtopercentage(rx_evmX);
6748 evm = rtl819x_evm_dbtopercentage( (pdrvinfo->rxevm[i] /*/ 2*/)); //dbm
6749 RT_TRACE(COMP_RF, "RXRATE=%x RXEVM=%x EVM=%s%d\n", pDesc->RxMCS, pdrvinfo->rxevm[i], "%", evm);
6750
6751 //if(bpacket_match_bssid)
6752 {
6753 if(i==0) // Fill value in RFD, Get the first spatial stream only
6754 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
6755 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
6756 }
6757 }
6758
6759
6760 /* record rx statistics for debug */
6761 //rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
6762 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
6763 //if(pdrvinfo->BW) //40M channel
6764 if(pDesc->BW) //40M channel
6765 priv->stats.received_bwtype[1+pdrvinfo->rxsc]++;
6766 else //20M channel
6767 priv->stats.received_bwtype[0]++;
6768 }
6769
6770 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
6771 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
6772 if(is_cck_rate)
6773 {
6774 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;//check ok
6775
6776 }
6777 else
6778 {
6779 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u8)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u8)(total_rssi/=RF90_PATH_MAX);
6780 // We can judge RX path number now.
6781 if (rf_rx_num != 0)
6782 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
6783 }
6784 }/* QueryRxPhyStatus8192S */
6785
6786 void
6787 rtl8192_record_rxdesc_forlateruse(
6788 struct ieee80211_rx_stats * psrc_stats,
6789 struct ieee80211_rx_stats * ptarget_stats
6790 )
6791 {
6792 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
6793 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
6794 ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
6795 }
6796
6797 static void rtl8192SU_query_rxphystatus(
6798 struct r8192_priv * priv,
6799 struct ieee80211_rx_stats * pstats,
6800 rx_desc_819x_usb *pDesc,
6801 rx_drvinfo_819x_usb * pdrvinfo,
6802 struct ieee80211_rx_stats * precord_stats,
6803 bool bpacket_match_bssid,
6804 bool bpacket_toself,
6805 bool bPacketBeacon,
6806 bool bToSelfBA
6807 );
6808 void rtl8192SU_TranslateRxSignalStuff(struct sk_buff *skb,
6809 struct ieee80211_rx_stats * pstats,
6810 rx_desc_819x_usb *pDesc,
6811 rx_drvinfo_819x_usb *pdrvinfo)
6812 {
6813 // TODO: We must only check packet for current MAC address. Not finish
6814 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6815 struct net_device *dev=info->dev;
6816 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6817 bool bpacket_match_bssid, bpacket_toself;
6818 bool bPacketBeacon=FALSE, bToSelfBA=FALSE;
6819 static struct ieee80211_rx_stats previous_stats;
6820 struct ieee80211_hdr_3addr *hdr;//by amy
6821 u16 fc,type;
6822
6823 // Get Signal Quality for only RX data queue (but not command queue)
6824
6825 u8* tmp_buf;
6826 //u16 tmp_buf_len = 0;
6827 u8 *praddr;
6828
6829 /* Get MAC frame start address. */
6830 tmp_buf = (u8*)skb->data;// + get_rxpacket_shiftbytes_819xusb(pstats);
6831
6832 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
6833 fc = le16_to_cpu(hdr->frame_ctl);
6834 type = WLAN_FC_GET_TYPE(fc);
6835 praddr = hdr->addr1;
6836
6837 /* Check if the received packet is acceptabe. */
6838 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
6839 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
6840 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
6841 bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
6842
6843 #if 1//cosa
6844 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
6845 {
6846 bPacketBeacon = true;
6847 //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6848 }
6849 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
6850 {
6851 if((eqMacAddr(praddr,dev->dev_addr)))
6852 bToSelfBA = true;
6853 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6854 }
6855
6856 #endif
6857
6858
6859 if(bpacket_match_bssid)
6860 {
6861 priv->stats.numpacket_matchbssid++;
6862 }
6863 if(bpacket_toself){
6864 priv->stats.numpacket_toself++;
6865 }
6866 //
6867 // Process PHY information for previous packet (RSSI/PWDB/EVM)
6868 //
6869 // Because phy information is contained in the last packet of AMPDU only, so driver
6870 // should process phy information of previous packet
6871 rtl8192_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
6872 rtl8192SU_query_rxphystatus(priv, pstats, pDesc, pdrvinfo, &previous_stats, bpacket_match_bssid,bpacket_toself,bPacketBeacon,bToSelfBA);
6873 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
6874
6875 }
6876
6877 /**
6878 * Function: UpdateReceivedRateHistogramStatistics
6879 * Overview: Recored down the received data rate
6880 *
6881 * Input:
6882 * struct net_device *dev
6883 * struct ieee80211_rx_stats *stats
6884 *
6885 * Output:
6886 *
6887 * (priv->stats.ReceivedRateHistogram[] is updated)
6888 * Return:
6889 * None
6890 */
6891 void
6892 UpdateReceivedRateHistogramStatistics8190(
6893 struct net_device *dev,
6894 struct ieee80211_rx_stats *stats
6895 )
6896 {
6897 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6898 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
6899 u32 rateIndex;
6900 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
6901
6902
6903 if(stats->bCRC)
6904 rcvType = 2;
6905 else if(stats->bICV)
6906 rcvType = 3;
6907
6908 if(stats->bShortPreamble)
6909 preamble_guardinterval = 1;// short
6910 else
6911 preamble_guardinterval = 0;// long
6912
6913 switch(stats->rate)
6914 {
6915 //
6916 // CCK rate
6917 //
6918 case MGN_1M: rateIndex = 0; break;
6919 case MGN_2M: rateIndex = 1; break;
6920 case MGN_5_5M: rateIndex = 2; break;
6921 case MGN_11M: rateIndex = 3; break;
6922 //
6923 // Legacy OFDM rate
6924 //
6925 case MGN_6M: rateIndex = 4; break;
6926 case MGN_9M: rateIndex = 5; break;
6927 case MGN_12M: rateIndex = 6; break;
6928 case MGN_18M: rateIndex = 7; break;
6929 case MGN_24M: rateIndex = 8; break;
6930 case MGN_36M: rateIndex = 9; break;
6931 case MGN_48M: rateIndex = 10; break;
6932 case MGN_54M: rateIndex = 11; break;
6933 //
6934 // 11n High throughput rate
6935 //
6936 case MGN_MCS0: rateIndex = 12; break;
6937 case MGN_MCS1: rateIndex = 13; break;
6938 case MGN_MCS2: rateIndex = 14; break;
6939 case MGN_MCS3: rateIndex = 15; break;
6940 case MGN_MCS4: rateIndex = 16; break;
6941 case MGN_MCS5: rateIndex = 17; break;
6942 case MGN_MCS6: rateIndex = 18; break;
6943 case MGN_MCS7: rateIndex = 19; break;
6944 case MGN_MCS8: rateIndex = 20; break;
6945 case MGN_MCS9: rateIndex = 21; break;
6946 case MGN_MCS10: rateIndex = 22; break;
6947 case MGN_MCS11: rateIndex = 23; break;
6948 case MGN_MCS12: rateIndex = 24; break;
6949 case MGN_MCS13: rateIndex = 25; break;
6950 case MGN_MCS14: rateIndex = 26; break;
6951 case MGN_MCS15: rateIndex = 27; break;
6952 default: rateIndex = 28; break;
6953 }
6954 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
6955 priv->stats.received_rate_histogram[0][rateIndex]++; //total
6956 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
6957 }
6958
6959 void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe)
6960 {
6961 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6962 struct net_device *dev=info->dev;
6963 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6964 //rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6965 rx_drvinfo_819x_usb *driver_info = NULL;
6966
6967 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
6968 //PHAL_DATA_8192SUSB pHalData = GET_HAL_DATA(Adapter);
6969 //pu1Byte pDesc = (pu1Byte)pDescIn;
6970 //PRX_DRIVER_INFO_8192S pDrvInfo;
6971
6972 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6973
6974 if(0)
6975 {
6976 int m = 0;
6977 printk("========================");
6978 for(m=0; m<skb->len; m++){
6979 if((m%32) == 0)
6980 printk("\n");
6981 printk("%2x ",((u8*)skb->data)[m]);
6982 }
6983 printk("\n========================\n");
6984
6985 }
6986
6987
6988 //
6989 //Get Rx Descriptor Raw Information
6990 //
6991 stats->Length = desc->Length ;
6992 stats->RxDrvInfoSize = desc->RxDrvInfoSize*RX_DRV_INFO_SIZE_UNIT;
6993 stats->RxBufShift = (desc->Shift)&0x03;
6994 stats->bICV = desc->ICV;
6995 stats->bCRC = desc->CRC32;
6996 stats->bHwError = stats->bCRC|stats->bICV;
6997 stats->Decrypted = !desc->SWDec;//RTL8190 set this bit to indicate that Hw does not decrypt packet
6998 stats->bIsAMPDU = (desc->AMSDU==1);
6999 stats->bFirstMPDU = (desc->PAGGR==1) && (desc->FAGGR==1);
7000 stats->bShortPreamble = desc->SPLCP;
7001 stats->RxIs40MHzPacket = (desc->BW==1);
7002 stats->TimeStampLow = desc->TSFL;
7003
7004 if((desc->FAGGR==1) || (desc->PAGGR==1))
7005 {// Rx A-MPDU
7006 RT_TRACE(COMP_RXDESC, "FirstAGGR = %d, PartAggr = %d\n", desc->FAGGR, desc->PAGGR);
7007 }
7008 //YJ,test,090310
7009 if(stats->bHwError)
7010 {
7011 if(stats->bICV)
7012 printk("%s: Receive ICV error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
7013 if(stats->bCRC)
7014 printk("%s: Receive CRC error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
7015 }
7016
7017 if(IS_UNDER_11N_AES_MODE(priv->ieee80211))
7018 {
7019 // Always received ICV error packets in AES mode.
7020 // This fixed HW later MIC write bug.
7021 if(stats->bICV && !stats->bCRC)
7022 {
7023 stats->bICV = FALSE;
7024 stats->bHwError = FALSE;
7025 }
7026 }
7027
7028 // Transform HwRate to MRate
7029 if(!stats->bHwError)
7030 //stats->DataRate = HwRateToMRate(
7031 // (BOOLEAN)GET_RX_DESC_RXHT(pDesc),
7032 // (u1Byte)GET_RX_DESC_RXMCS(pDesc),
7033 // (BOOLEAN)GET_RX_DESC_PAGGR(pDesc));
7034 stats->rate = rtl8192SU_HwRateToMRate(desc->RxHT, desc->RxMCS, desc->PAGGR);
7035 else
7036 stats->rate = MGN_1M;
7037
7038 //
7039 // Collect Rx rate/AMPDU/TSFL
7040 //
7041 //UpdateRxdRateHistogramStatistics8192S(Adapter, pRfd);
7042 //UpdateRxAMPDUHistogramStatistics8192S(Adapter, pRfd);
7043 //UpdateRxPktTimeStamp8192S(Adapter, pRfd);
7044 UpdateReceivedRateHistogramStatistics8190(dev, stats);
7045 //UpdateRxAMPDUHistogramStatistics8192S(dev, stats); //FIXLZM
7046 UpdateRxPktTimeStamp8190(dev, stats);
7047
7048 //
7049 // Get PHY Status and RSVD parts.
7050 // <Roger_Notes> It only appears on last aggregated packet.
7051 //
7052 if (desc->PHYStatus)
7053 {
7054 //driver_info = (rx_drvinfo_819x_usb *)(skb->data + RX_DESC_SIZE + stats->RxBufShift);
7055 driver_info = (rx_drvinfo_819x_usb *)(skb->data + sizeof(rx_desc_819x_usb) + \
7056 stats->RxBufShift);
7057 if(0)
7058 {
7059 int m = 0;
7060 printk("========================\n");
7061 printk("RX_DESC_SIZE:%d, RxBufShift:%d, RxDrvInfoSize:%d\n",
7062 RX_DESC_SIZE, stats->RxBufShift, stats->RxDrvInfoSize);
7063 for(m=0; m<32; m++){
7064 printk("%2x ",((u8*)driver_info)[m]);
7065 }
7066 printk("\n========================\n");
7067
7068 }
7069
7070 }
7071
7072 //YJ,add,090107
7073 skb_pull(skb, sizeof(rx_desc_819x_usb));
7074 //YJ,add,090107,end
7075
7076 //
7077 // Get Total offset of MPDU Frame Body
7078 //
7079 if((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
7080 {
7081 stats->bShift = 1;
7082 //YJ,add,090107
7083 skb_pull(skb, stats->RxBufShift + stats->RxDrvInfoSize);
7084 //YJ,add,090107,end
7085 }
7086
7087 //
7088 // Get PHY Status and RSVD parts.
7089 // <Roger_Notes> It only appears on last aggregated packet.
7090 //
7091 if (desc->PHYStatus)
7092 {
7093 rtl8192SU_TranslateRxSignalStuff(skb, stats, desc, driver_info);
7094 }
7095 }
7096
7097 //
7098 // Description:
7099 // The strarting address of wireless lan header will shift 1 or 2 or 3 or "more" bytes for the following reason :
7100 // (1) QoS control : shift 2 bytes
7101 // (2) Mesh Network : shift 1 or 3 bytes
7102 // (3) RxDriverInfo occupies the front parts of Rx Packets buffer(shift units is in 8Bytes)
7103 //
7104 // It is because Lextra CPU used by 8186 or 865x series assert exception if the statrting address
7105 // of IP header is not double word alignment.
7106 // This features is supported in 818xb and 8190 only, but not 818x.
7107 //
7108 // parameter: PRT_RFD, Pointer of Reeceive frame descriptor which is initialized according to
7109 // Rx Descriptor
7110 // return value: unsigned int, number of total shifted bytes
7111 //
7112 // Notes: 2008/06/28, created by Roger
7113 //
7114 u32 GetRxPacketShiftBytes8192SU(struct ieee80211_rx_stats *Status, bool bIsRxAggrSubframe)
7115 {
7116 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
7117
7118 return (sizeof(rx_desc_819x_usb) + Status->RxDrvInfoSize + Status->RxBufShift);
7119 }
7120
7121 void rtl8192SU_rx_nomal(struct sk_buff* skb)
7122 {
7123 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7124 struct net_device *dev=info->dev;
7125 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7126 struct ieee80211_rx_stats stats = {
7127 .signal = 0,
7128 .noise = -98,
7129 .rate = 0,
7130 // .mac_time = jiffies,
7131 .freq = IEEE80211_24GHZ_BAND,
7132 };
7133 u32 rx_pkt_len = 0;
7134 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
7135 bool unicast_packet = false;
7136
7137 //printk("**********skb->len = %d\n", skb->len);
7138 /* 20 is for ps-poll */
7139 if((skb->len >=(20 + sizeof(rx_desc_819x_usb))) && (skb->len < RX_URB_SIZE)) {
7140
7141 /* first packet should not contain Rx aggregation header */
7142 rtl8192SU_query_rxdesc_status(skb, &stats, false);
7143 /* TODO */
7144
7145 /* hardware related info */
7146 priv->stats.rxoktotal++; //YJ,test,090108
7147
7148 /* Process the MPDU recevied */
7149 skb_trim(skb, skb->len - 4/*sCrcLng*/);//FIXLZM
7150
7151 rx_pkt_len = skb->len;
7152 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
7153 unicast_packet = false;
7154 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
7155 //TODO
7156 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
7157 //TODO
7158 }else {
7159 /* unicast packet */
7160 unicast_packet = true;
7161 }
7162
7163 if(!ieee80211_rx(priv->ieee80211,skb, &stats)) {
7164 dev_kfree_skb_any(skb);
7165 } else {
7166 // priv->stats.rxoktotal++; //YJ,test,090108
7167 if(unicast_packet) {
7168 priv->stats.rxbytesunicast += rx_pkt_len;
7169 }
7170 }
7171
7172 //up is firs pkt, follow is next and next
7173 }
7174 else
7175 {
7176 priv->stats.rxurberr++;
7177 printk("actual_length:%d\n", skb->len);
7178 dev_kfree_skb_any(skb);
7179 }
7180
7181 }
7182
7183 void
7184 rtl819xusb_process_received_packet(
7185 struct net_device *dev,
7186 struct ieee80211_rx_stats *pstats
7187 )
7188 {
7189 // bool bfreerfd=false, bqueued=false;
7190 u8* frame;
7191 u16 frame_len=0;
7192 struct r8192_priv *priv = ieee80211_priv(dev);
7193 // u8 index = 0;
7194 // u8 TID = 0;
7195 //u16 seqnum = 0;
7196 //PRX_TS_RECORD pts = NULL;
7197
7198 // Get shifted bytes of Starting address of 802.11 header. 2006.09.28, by Emily
7199 //porting by amy 080508
7200 pstats->virtual_address += get_rxpacket_shiftbytes_819xusb(pstats);
7201 frame = pstats->virtual_address;
7202 frame_len = pstats->packetlength;
7203 #ifdef TODO // by amy about HCT
7204 if(!Adapter->bInHctTest)
7205 CountRxErrStatistics(Adapter, pRfd);
7206 #endif
7207 {
7208 #ifdef ENABLE_PS //by amy for adding ps function in future
7209 RT_RF_POWER_STATE rtState;
7210 // When RF is off, we should not count the packet for hw/sw synchronize
7211 // reason, ie. there may be a duration while sw switch is changed and hw
7212 // switch is being changed. 2006.12.04, by shien chang.
7213 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (u8* )(&rtState));
7214 if (rtState == eRfOff)
7215 {
7216 return;
7217 }
7218 #endif
7219 priv->stats.rxframgment++;
7220
7221 }
7222 #ifdef TODO
7223 RmMonitorSignalStrength(Adapter, pRfd);
7224 #endif
7225 /* 2007/01/16 MH Add RX command packet handle here. */
7226 /* 2007/03/01 MH We have to release RFD and return if rx pkt is cmd pkt. */
7227 if (rtl819xusb_rx_command_packet(dev, pstats))
7228 {
7229 return;
7230 }
7231
7232 #ifdef SW_CRC_CHECK
7233 SwCrcCheck();
7234 #endif
7235
7236
7237 }
7238
7239 void query_rx_cmdpkt_desc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats)
7240 {
7241 // rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7242 // struct net_device *dev=info->dev;
7243 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7244 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
7245 // rx_drvinfo_819x_usb *driver_info;
7246
7247 //
7248 //Get Rx Descriptor Information
7249 //
7250 stats->virtual_address = (u8*)skb->data;
7251 stats->Length = desc->Length;
7252 stats->RxDrvInfoSize = 0;
7253 stats->RxBufShift = 0;
7254 stats->packetlength = stats->Length-scrclng;
7255 stats->fraglength = stats->packetlength;
7256 stats->fragoffset = 0;
7257 stats->ntotalfrag = 1;
7258 }
7259
7260 void rtl8192SU_rx_cmd(struct sk_buff *skb)
7261 {
7262 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7263 struct net_device *dev = info->dev;
7264
7265 /* TODO */
7266 struct ieee80211_rx_stats stats = {
7267 .signal = 0,
7268 .noise = -98,
7269 .rate = 0,
7270 // .mac_time = jiffies,
7271 .freq = IEEE80211_24GHZ_BAND,
7272 };
7273
7274 //
7275 // Check buffer length to determine if this is a valid MPDU.
7276 //
7277 if( (skb->len >= sizeof(rx_desc_819x_usb)) && (skb->len <= RX_URB_SIZE) )//&&
7278 //(pHalData->SwChnlInProgress == FALSE))
7279 {
7280 //
7281 // Collection information in Rx descriptor.
7282 //
7283 query_rx_cmdpkt_desc_status(skb,&stats);
7284 // this is to be done by amy 080508 prfd->queue_id = 1;
7285
7286 //
7287 // Process the MPDU recevied.
7288 //
7289 rtl819xusb_process_received_packet(dev,&stats);
7290
7291 dev_kfree_skb_any(skb);
7292 }
7293 else
7294 {
7295 //RTInsertTailListWithCnt(&pAdapter->RfdIdleQueue, &pRfd->List, &pAdapter->NumIdleRfd);
7296 //RT_ASSERT(pAdapter->NumIdleRfd <= pAdapter->NumRfd, ("HalUsbInCommandComplete8192SUsb(): Adapter->NumIdleRfd(%d)\n", pAdapter->NumIdleRfd));
7297 //RT_TRACE(COMP_RECV, DBG_LOUD, ("HalUsbInCommandComplete8192SUsb(): NOT enough Resources!! BufLenUsed(%d), NumIdleRfd(%d)\n",
7298 //pContext->BufLenUsed, pAdapter->NumIdleRfd));
7299 }
7300
7301 //
7302 // Reuse USB_IN_CONTEXT since we had finished processing the
7303 // buffer in USB_IN_CONTEXT.
7304 //
7305 //HalUsbReturnInContext(pAdapter, pContext);
7306
7307 //
7308 // Issue another bulk IN transfer.
7309 //
7310 //HalUsbInMpdu(pAdapter, PipeIndex);
7311
7312 RT_TRACE(COMP_RECV, "<--- HalUsbInCommandComplete8192SUsb()\n");
7313
7314 }
7315
7316 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
7317 {
7318 struct sk_buff *skb;
7319 struct rtl8192_rx_info *info;
7320
7321 while (NULL != (skb = skb_dequeue(&priv->skb_queue))) {
7322 info = (struct rtl8192_rx_info *)skb->cb;
7323 switch (info->out_pipe) {
7324 /* Nomal packet pipe */
7325 case 3:
7326 //RT_TRACE(COMP_RECV, "normal in-pipe index(%d)\n",info->out_pipe);
7327 priv->IrpPendingCount--;
7328 priv->ops->rtl819x_rx_nomal(skb);
7329 break;
7330
7331 /* Command packet pipe */
7332 case 9:
7333 RT_TRACE(COMP_RECV, "command in-pipe index(%d)\n",\
7334 info->out_pipe);
7335 priv->ops->rtl819x_rx_cmd(skb);
7336 break;
7337
7338 default: /* should never get here! */
7339 RT_TRACE(COMP_ERR, "Unknown in-pipe index(%d)\n",\
7340 info->out_pipe);
7341 dev_kfree_skb(skb);
7342 break;
7343
7344 }
7345 }
7346 }
7347
7348
7349
7350 /****************************************************************************
7351 ---------------------------- USB_STUFF---------------------------
7352 *****************************************************************************/
7353 //LZM Merge from windows HalUsbSetQueuePipeMapping8192SUsb 090319
7354 static void HalUsbSetQueuePipeMapping8192SUsb(struct usb_interface *intf, struct net_device *dev)
7355 {
7356 struct r8192_priv *priv = ieee80211_priv(dev);
7357 struct usb_host_interface *iface_desc;
7358 struct usb_endpoint_descriptor *endpoint;
7359 u8 i = 0;
7360
7361 priv->ep_in_num = 0;
7362 priv->ep_out_num = 0;
7363 memset(priv->RtOutPipes,0,16);
7364 memset(priv->RtInPipes,0,16);
7365
7366 iface_desc = intf->cur_altsetting;
7367 priv->ep_num = iface_desc->desc.bNumEndpoints;
7368
7369 for (i = 0; i < priv->ep_num; ++i) {
7370 endpoint = &iface_desc->endpoint[i].desc;
7371 if (usb_endpoint_is_bulk_in(endpoint)) {
7372 priv->RtInPipes[priv->ep_in_num] = usb_endpoint_num(endpoint);
7373 priv->ep_in_num ++;
7374 //printk("in_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7375 } else if (usb_endpoint_is_bulk_out(endpoint)) {
7376 priv->RtOutPipes[priv->ep_out_num] = usb_endpoint_num(endpoint);
7377 priv->ep_out_num ++;
7378 //printk("out_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7379 }
7380 }
7381 {
7382 memset(priv->txqueue_to_outpipemap,0,9);
7383 if (priv->ep_num == 6) {
7384 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7385 u8 queuetopipe[] = {3, 2, 1, 0, 4, 4, 4, 4, 4};
7386
7387 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7388 } else if (priv->ep_num == 4) {
7389 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7390 u8 queuetopipe[] = {1, 1, 0, 0, 2, 2, 2, 2, 2};
7391
7392 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7393 } else if (priv->ep_num > 9) {
7394 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7395 u8 queuetopipe[] = {3, 2, 1, 0, 4, 8, 7, 6, 5};
7396
7397 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7398 } else {//use sigle pipe
7399 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7400 u8 queuetopipe[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
7401 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7402 }
7403 }
7404 printk("==>ep_num:%d, in_ep_num:%d, out_ep_num:%d\n", priv->ep_num, priv->ep_in_num, priv->ep_out_num);
7405
7406 printk("==>RtInPipes:");
7407 for(i=0; i < priv->ep_in_num; i++)
7408 printk("%d ", priv->RtInPipes[i]);
7409 printk("\n");
7410
7411 printk("==>RtOutPipes:");
7412 for(i=0; i < priv->ep_out_num; i++)
7413 printk("%d ", priv->RtOutPipes[i]);
7414 printk("\n");
7415
7416 printk("==>txqueue_to_outpipemap for BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON:\n");
7417 for(i=0; i < 9; i++)
7418 printk("%d ", priv->txqueue_to_outpipemap[i]);
7419 printk("\n");
7420
7421 return;
7422 }
7423
7424 static const struct net_device_ops rtl8192_netdev_ops = {
7425 .ndo_open = rtl8192_open,
7426 .ndo_stop = rtl8192_close,
7427 .ndo_get_stats = rtl8192_stats,
7428 .ndo_tx_timeout = tx_timeout,
7429 .ndo_do_ioctl = rtl8192_ioctl,
7430 .ndo_set_multicast_list = r8192_set_multicast,
7431 .ndo_set_mac_address = r8192_set_mac_adr,
7432 .ndo_validate_addr = eth_validate_addr,
7433 .ndo_change_mtu = eth_change_mtu,
7434 .ndo_start_xmit = rtl8192_ieee80211_xmit,
7435 };
7436
7437 static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
7438 const struct usb_device_id *id)
7439 {
7440 // unsigned long ioaddr = 0;
7441 struct net_device *dev = NULL;
7442 struct r8192_priv *priv= NULL;
7443 struct usb_device *udev = interface_to_usbdev(intf);
7444
7445 RT_TRACE(COMP_INIT, "Oops: i'm coming\n");
7446
7447 dev = alloc_ieee80211(sizeof(struct r8192_priv));
7448
7449 usb_set_intfdata(intf, dev);
7450 SET_NETDEV_DEV(dev, &intf->dev);
7451 priv = ieee80211_priv(dev);
7452 priv->ieee80211 = netdev_priv(dev);
7453 priv->udev=udev;
7454
7455 HalUsbSetQueuePipeMapping8192SUsb(intf, dev);
7456
7457 //printk("===============>NIC 8192SU\n");
7458 priv->ops = &rtl8192su_ops;
7459
7460 dev->netdev_ops = &rtl8192_netdev_ops;
7461
7462 //DMESG("Oops: i'm coming\n");
7463 dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
7464
7465 dev->type=ARPHRD_ETHER;
7466
7467 dev->watchdog_timeo = HZ*3; //modified by john, 0805
7468
7469 if (dev_alloc_name(dev, ifname) < 0){
7470 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
7471 ifname = "wlan%d";
7472 dev_alloc_name(dev, ifname);
7473 }
7474
7475 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
7476 #if 1
7477 if(rtl8192_init(dev)!=0){
7478 RT_TRACE(COMP_ERR, "Initialization failed");
7479 goto fail;
7480 }
7481 #endif
7482 netif_carrier_off(dev);
7483 netif_stop_queue(dev);
7484
7485 register_netdev(dev);
7486 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
7487 rtl8192_proc_init_one(dev);
7488
7489
7490 RT_TRACE(COMP_INIT, "Driver probe completed\n");
7491 return 0;
7492 fail:
7493 free_ieee80211(dev);
7494
7495 RT_TRACE(COMP_ERR, "wlan driver load failed\n");
7496 return -ENODEV;
7497 }
7498
7499 //detach all the work and timer structure declared or inititialize in r8192U_init function.
7500 void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
7501 {
7502 cancel_work_sync(&priv->reset_wq);
7503 cancel_work_sync(&priv->qos_activate);
7504 cancel_delayed_work(&priv->watch_dog_wq);
7505 cancel_delayed_work(&priv->update_beacon_wq);
7506 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
7507 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
7508 //cancel_work_sync(&priv->SetBWModeWorkItem);
7509 //cancel_work_sync(&priv->SwChnlWorkItem);
7510 }
7511
7512 static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf)
7513 {
7514 struct net_device *dev = usb_get_intfdata(intf);
7515 struct r8192_priv *priv = ieee80211_priv(dev);
7516 if(dev){
7517
7518 unregister_netdev(dev);
7519
7520 RT_TRACE(COMP_DOWN, "=============>wlan driver to be removed\n");
7521 rtl8192_proc_remove_one(dev);
7522
7523 rtl8192_down(dev);
7524 if (priv->pFirmware)
7525 {
7526 vfree(priv->pFirmware);
7527 priv->pFirmware = NULL;
7528 }
7529 // priv->rf_close(dev);
7530 // rtl8192_SetRFPowerState(dev, eRfOff);
7531 destroy_workqueue(priv->priv_wq);
7532 //rtl8192_irq_disable(dev);
7533 //rtl8192_reset(dev);
7534 mdelay(10);
7535
7536 }
7537 free_ieee80211(dev);
7538 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
7539 }
7540
7541 /* fun with the built-in ieee80211 stack... */
7542 extern int ieee80211_debug_init(void);
7543 extern void ieee80211_debug_exit(void);
7544 extern int ieee80211_crypto_init(void);
7545 extern void ieee80211_crypto_deinit(void);
7546 extern int ieee80211_crypto_tkip_init(void);
7547 extern void ieee80211_crypto_tkip_exit(void);
7548 extern int ieee80211_crypto_ccmp_init(void);
7549 extern void ieee80211_crypto_ccmp_exit(void);
7550 extern int ieee80211_crypto_wep_init(void);
7551 extern void ieee80211_crypto_wep_exit(void);
7552
7553 static int __init rtl8192_usb_module_init(void)
7554 {
7555 int ret;
7556
7557 #ifdef CONFIG_IEEE80211_DEBUG
7558 ret = ieee80211_debug_init();
7559 if (ret) {
7560 printk(KERN_ERR "ieee80211_debug_init() failed %d\n", ret);
7561 return ret;
7562 }
7563 #endif
7564 ret = ieee80211_crypto_init();
7565 if (ret) {
7566 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
7567 return ret;
7568 }
7569
7570 ret = ieee80211_crypto_tkip_init();
7571 if (ret) {
7572 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n",
7573 ret);
7574 return ret;
7575 }
7576
7577 ret = ieee80211_crypto_ccmp_init();
7578 if (ret) {
7579 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n",
7580 ret);
7581 return ret;
7582 }
7583
7584 ret = ieee80211_crypto_wep_init();
7585 if (ret) {
7586 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
7587 return ret;
7588 }
7589
7590 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
7591 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
7592 RT_TRACE(COMP_INIT, "Initializing module");
7593 RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
7594 rtl8192_proc_module_init();
7595 return usb_register(&rtl8192_usb_driver);
7596 }
7597
7598
7599 static void __exit rtl8192_usb_module_exit(void)
7600 {
7601 usb_deregister(&rtl8192_usb_driver);
7602
7603 RT_TRACE(COMP_DOWN, "Exiting");
7604 rtl8192_proc_module_remove();
7605
7606 ieee80211_crypto_tkip_exit();
7607 ieee80211_crypto_ccmp_exit();
7608 ieee80211_crypto_wep_exit();
7609 ieee80211_crypto_deinit();
7610 #ifdef CONFIG_IEEE80211_DEBUG
7611 ieee80211_debug_exit();
7612 #endif
7613 }
7614
7615
7616 void rtl8192_try_wake_queue(struct net_device *dev, int pri)
7617 {
7618 unsigned long flags;
7619 short enough_desc;
7620 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7621
7622 spin_lock_irqsave(&priv->tx_lock,flags);
7623 enough_desc = check_nic_enough_desc(dev,pri);
7624 spin_unlock_irqrestore(&priv->tx_lock,flags);
7625
7626 if(enough_desc)
7627 ieee80211_wake_queue(priv->ieee80211);
7628 }
7629
7630 void EnableHWSecurityConfig8192(struct net_device *dev)
7631 {
7632 u8 SECR_value = 0x0;
7633 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7634 struct ieee80211_device* ieee = priv->ieee80211;
7635
7636 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
7637 #if 1
7638 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
7639 {
7640 SECR_value |= SCR_RxUseDK;
7641 SECR_value |= SCR_TxUseDK;
7642 }
7643 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
7644 {
7645 SECR_value |= SCR_RxUseDK;
7646 SECR_value |= SCR_TxUseDK;
7647 }
7648 #endif
7649 //add HWSec active enable here.
7650 //default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
7651
7652 ieee->hwsec_active = 1;
7653
7654 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
7655 {
7656 ieee->hwsec_active = 0;
7657 SECR_value &= ~SCR_RxDecEnable;
7658 }
7659
7660 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, \
7661 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
7662 {
7663 write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK );
7664 }
7665 }
7666
7667
7668 void setKey( struct net_device *dev,
7669 u8 EntryNo,
7670 u8 KeyIndex,
7671 u16 KeyType,
7672 u8 *MacAddr,
7673 u8 DefaultKey,
7674 u32 *KeyContent )
7675 {
7676 u32 TargetCommand = 0;
7677 u32 TargetContent = 0;
7678 u16 usConfig = 0;
7679 u8 i;
7680 if (EntryNo >= TOTAL_CAM_ENTRY)
7681 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
7682
7683 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr"MAC_FMT"\n", dev,EntryNo, KeyIndex, KeyType, MAC_ARG(MacAddr));
7684
7685 if (DefaultKey)
7686 usConfig |= BIT15 | (KeyType<<2);
7687 else
7688 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
7689 // usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
7690
7691
7692 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
7693 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
7694 TargetCommand |= BIT31|BIT16;
7695
7696 if(i==0){//MAC|Config
7697 TargetContent = (u32)(*(MacAddr+0)) << 16|
7698 (u32)(*(MacAddr+1)) << 24|
7699 (u32)usConfig;
7700
7701 write_nic_dword(dev, WCAMI, TargetContent);
7702 write_nic_dword(dev, RWCAM, TargetCommand);
7703 // printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
7704 }
7705 else if(i==1){//MAC
7706 TargetContent = (u32)(*(MacAddr+2)) |
7707 (u32)(*(MacAddr+3)) << 8|
7708 (u32)(*(MacAddr+4)) << 16|
7709 (u32)(*(MacAddr+5)) << 24;
7710 write_nic_dword(dev, WCAMI, TargetContent);
7711 write_nic_dword(dev, RWCAM, TargetCommand);
7712 }
7713 else {
7714 //Key Material
7715 if(KeyContent !=NULL){
7716 write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
7717 write_nic_dword(dev, RWCAM, TargetCommand);
7718 }
7719 }
7720 }
7721
7722 }
7723
7724 /***************************************************************************
7725 ------------------- module init / exit stubs ----------------
7726 ****************************************************************************/
7727 module_init(rtl8192_usb_module_init);
7728 module_exit(rtl8192_usb_module_exit);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree