include/asm-generic/io.h

   1 /* Generic I/O port emulation, based on MN10300 code
   2  *
   3  * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
   4  * Written by David Howells (dhowells@redhat.com)
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public Licence
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the Licence, or (at your option) any later version.
  10  */
  11 #ifndef __ASM_GENERIC_IO_H
  12 #define __ASM_GENERIC_IO_H
  13
  14 #include <asm/page.h> /* I/O is all done through memory accesses */
  15 #include <linux/types.h>
  16
  17 #ifdef CONFIG_GENERIC_IOMAP
  18 #include <asm-generic/iomap.h>
  19 #endif
  20
  21 #include <asm-generic/pci_iomap.h>
  22
  23 #ifndef mmiowb
  24 #define mmiowb() do {} while (0)
  25 #endif
  26
  27 /*****************************************************************************/
  28 /*
  29  * readX/writeX() are used to access memory mapped devices. On some
  30  * architectures the memory mapped IO stuff needs to be accessed
  31  * differently. On the simple architectures, we just read/write the
  32  * memory location directly.
  33  */
  34 #ifndef __raw_readb
  35 static inline u8 __raw_readb(const volatile void __iomem *addr)
  36 {
  37         return *(const volatile u8 __force *) addr;
  38 }
  39 #endif
  40
  41 #ifndef __raw_readw
  42 static inline u16 __raw_readw(const volatile void __iomem *addr)
  43 {
  44         return *(const volatile u16 __force *) addr;
  45 }
  46 #endif
  47
  48 #ifndef __raw_readl
  49 static inline u32 __raw_readl(const volatile void __iomem *addr)
  50 {
  51         return *(const volatile u32 __force *) addr;
  52 }
  53 #endif
  54
  55 #define readb __raw_readb
  56
  57 #define readw readw
  58 static inline u16 readw(const volatile void __iomem *addr)
  59 {
  60         return __le16_to_cpu(__raw_readw(addr));
  61 }
  62
  63 #define readl readl
  64 static inline u32 readl(const volatile void __iomem *addr)
  65 {
  66         return __le32_to_cpu(__raw_readl(addr));
  67 }
  68
  69 #ifndef __raw_writeb
  70 static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
  71 {
  72         *(volatile u8 __force *) addr = b;
  73 }
  74 #endif
  75
  76 #ifndef __raw_writew
  77 static inline void __raw_writew(u16 b, volatile void __iomem *addr)
  78 {
  79         *(volatile u16 __force *) addr = b;
  80 }
  81 #endif
  82
  83 #ifndef __raw_writel
  84 static inline void __raw_writel(u32 b, volatile void __iomem *addr)
  85 {
  86         *(volatile u32 __force *) addr = b;
  87 }
  88 #endif
  89
  90 #define writeb __raw_writeb
  91 #define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
  92 #define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
  93
  94 #ifdef CONFIG_64BIT
  95 #ifndef __raw_readq
  96 static inline u64 __raw_readq(const volatile void __iomem *addr)
  97 {
  98         return *(const volatile u64 __force *) addr;
  99 }
 100 #endif
 101
 102 #define readq readq
 103 static inline u64 readq(const volatile void __iomem *addr)
 104 {
 105         return __le64_to_cpu(__raw_readq(addr));
 106 }
 107
 108 #ifndef __raw_writeq
 109 static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
 110 {
 111         *(volatile u64 __force *) addr = b;
 112 }
 113 #endif
 114
 115 #define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr)
 116 #endif /* CONFIG_64BIT */
 117
 118 #ifndef PCI_IOBASE
 119 #define PCI_IOBASE ((void __iomem *) 0)
 120 #endif
 121
 122 /*****************************************************************************/
 123 /*
 124  * traditional input/output functions
 125  */
 126
 127 static inline u8 inb(unsigned long addr)
 128 {
 129         return readb(addr + PCI_IOBASE);
 130 }
 131
 132 static inline u16 inw(unsigned long addr)
 133 {
 134         return readw(addr + PCI_IOBASE);
 135 }
 136
 137 static inline u32 inl(unsigned long addr)
 138 {
 139         return readl(addr + PCI_IOBASE);
 140 }
 141
 142 static inline void outb(u8 b, unsigned long addr)
 143 {
 144         writeb(b, addr + PCI_IOBASE);
 145 }
 146
 147 static inline void outw(u16 b, unsigned long addr)
 148 {
 149         writew(b, addr + PCI_IOBASE);
 150 }
 151
 152 static inline void outl(u32 b, unsigned long addr)
 153 {
 154         writel(b, addr + PCI_IOBASE);
 155 }
 156
 157 #define inb_p(addr)     inb(addr)
 158 #define inw_p(addr)     inw(addr)
 159 #define inl_p(addr)     inl(addr)
 160 #define outb_p(x, addr) outb((x), (addr))
 161 #define outw_p(x, addr) outw((x), (addr))
 162 #define outl_p(x, addr) outl((x), (addr))
 163
 164 #ifndef insb
 165 static inline void insb(unsigned long addr, void *buffer, int count)
 166 {
 167         if (count) {
 168                 u8 *buf = buffer;
 169                 do {
 170                         u8 x = __raw_readb(addr + PCI_IOBASE);
 171                         *buf++ = x;
 172                 } while (--count);
 173         }
 174 }
 175 #endif
 176
 177 #ifndef insw
 178 static inline void insw(unsigned long addr, void *buffer, int count)
 179 {
 180         if (count) {
 181                 u16 *buf = buffer;
 182                 do {
 183                         u16 x = __raw_readw(addr + PCI_IOBASE);
 184                         *buf++ = x;
 185                 } while (--count);
 186         }
 187 }
 188 #endif
 189
 190 #ifndef insl
 191 static inline void insl(unsigned long addr, void *buffer, int count)
 192 {
 193         if (count) {
 194                 u32 *buf = buffer;
 195                 do {
 196                         u32 x = __raw_readl(addr + PCI_IOBASE);
 197                         *buf++ = x;
 198                 } while (--count);
 199         }
 200 }
 201 #endif
 202
 203 #ifndef outsb
 204 static inline void outsb(unsigned long addr, const void *buffer, int count)
 205 {
 206         if (count) {
 207                 const u8 *buf = buffer;
 208                 do {
 209                         __raw_writeb(*buf++, addr + PCI_IOBASE);
 210                 } while (--count);
 211         }
 212 }
 213 #endif
 214
 215 #ifndef outsw
 216 static inline void outsw(unsigned long addr, const void *buffer, int count)
 217 {
 218         if (count) {
 219                 const u16 *buf = buffer;
 220                 do {
 221                         __raw_writew(*buf++, addr + PCI_IOBASE);
 222                 } while (--count);
 223         }
 224 }
 225 #endif
 226
 227 #ifndef outsl
 228 static inline void outsl(unsigned long addr, const void *buffer, int count)
 229 {
 230         if (count) {
 231                 const u32 *buf = buffer;
 232                 do {
 233                         __raw_writel(*buf++, addr + PCI_IOBASE);
 234                 } while (--count);
 235         }
 236 }
 237 #endif
 238
 239 #ifndef CONFIG_GENERIC_IOMAP
 240 #define ioread8(addr)           readb(addr)
 241 #define ioread16(addr)          readw(addr)
 242 #define ioread16be(addr)        __be16_to_cpu(__raw_readw(addr))
 243 #define ioread32(addr)          readl(addr)
 244 #define ioread32be(addr)        __be32_to_cpu(__raw_readl(addr))
 245
 246 #define iowrite8(v, addr)       writeb((v), (addr))
 247 #define iowrite16(v, addr)      writew((v), (addr))
 248 #define iowrite16be(v, addr)    __raw_writew(__cpu_to_be16(v), addr)
 249 #define iowrite32(v, addr)      writel((v), (addr))
 250 #define iowrite32be(v, addr)    __raw_writel(__cpu_to_be32(v), addr)
 251
 252 #define ioread8_rep(p, dst, count) \
 253         insb((unsigned long) (p), (dst), (count))
 254 #define ioread16_rep(p, dst, count) \
 255         insw((unsigned long) (p), (dst), (count))
 256 #define ioread32_rep(p, dst, count) \
 257         insl((unsigned long) (p), (dst), (count))
 258
 259 #define iowrite8_rep(p, src, count) \
 260         outsb((unsigned long) (p), (src), (count))
 261 #define iowrite16_rep(p, src, count) \
 262         outsw((unsigned long) (p), (src), (count))
 263 #define iowrite32_rep(p, src, count) \
 264         outsl((unsigned long) (p), (src), (count))
 265 #endif /* CONFIG_GENERIC_IOMAP */
 266
 267 #ifndef IO_SPACE_LIMIT
 268 #define IO_SPACE_LIMIT 0xffff
 269 #endif
 270
 271 #ifdef __KERNEL__
 272
 273 #include <linux/vmalloc.h>
 274 #define __io_virt(x) ((void __force *) (x))
 275
 276 #ifndef CONFIG_GENERIC_IOMAP
 277 struct pci_dev;
 278 extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
 279
 280 #ifndef pci_iounmap
 281 static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
 282 {
 283 }
 284 #endif
 285 #endif /* CONFIG_GENERIC_IOMAP */
 286
 287 /*
 288  * Change virtual addresses to physical addresses and vv.
 289  * These are pretty trivial
 290  */
 291 #ifndef virt_to_phys
 292 static inline unsigned long virt_to_phys(volatile void *address)
 293 {
 294         return __pa((unsigned long)address);
 295 }
 296
 297 static inline void *phys_to_virt(unsigned long address)
 298 {
 299         return __va(address);
 300 }
 301 #endif
 302
 303 /*
 304  * Change "struct page" to physical address.
 305  *
 306  * This implementation is for the no-MMU case only... if you have an MMU
 307  * you'll need to provide your own definitions.
 308  */
 309 #ifndef CONFIG_MMU
 310 static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size)
 311 {
 312         return (void __iomem*) (unsigned long)offset;
 313 }
 314
 315 #define __ioremap(offset, size, flags)  ioremap(offset, size)
 316
 317 #ifndef ioremap_nocache
 318 #define ioremap_nocache ioremap
 319 #endif
 320
 321 #ifndef ioremap_wc
 322 #define ioremap_wc ioremap_nocache
 323 #endif
 324
 325 static inline void iounmap(void __iomem *addr)
 326 {
 327 }
 328 #endif /* CONFIG_MMU */
 329
 330 #ifdef CONFIG_HAS_IOPORT
 331 #ifndef CONFIG_GENERIC_IOMAP
 332 static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
 333 {
 334         return (void __iomem *) port;
 335 }
 336
 337 static inline void ioport_unmap(void __iomem *p)
 338 {
 339 }
 340 #else /* CONFIG_GENERIC_IOMAP */
 341 extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
 342 extern void ioport_unmap(void __iomem *p);
 343 #endif /* CONFIG_GENERIC_IOMAP */
 344 #endif /* CONFIG_HAS_IOPORT */
 345
 346 #define xlate_dev_kmem_ptr(p)   p
 347 #define xlate_dev_mem_ptr(p)    __va(p)
 348
 349 #ifdef CONFIG_VIRT_TO_BUS
 350 #ifndef virt_to_bus
 351 static inline unsigned long virt_to_bus(volatile void *address)
 352 {
 353         return ((unsigned long) address);
 354 }
 355
 356 static inline void *bus_to_virt(unsigned long address)
 357 {
 358         return (void *) address;
 359 }
 360 #endif
 361 #endif
 362
 363 #ifndef memset_io
 364 #define memset_io(a, b, c)      memset(__io_virt(a), (b), (c))
 365 #endif
 366
 367 #ifndef memcpy_fromio
 368 #define memcpy_fromio(a, b, c)  memcpy((a), __io_virt(b), (c))
 369 #endif
 370 #ifndef memcpy_toio
 371 #define memcpy_toio(a, b, c)    memcpy(__io_virt(a), (b), (c))
 372 #endif
 373
 374 #endif /* __KERNEL__ */
 375
 376 #endif /* __ASM_GENERIC_IO_H */