arm: dts: socfpga: Change some clocks of gate-clk type to perip-clk
[linux-2.6.git] / drivers / rtc / rtc-max77686.c
blob9efe118a28bae7bf42a7c6564640fe8967ecf411
1 /*
2 * RTC driver for Maxim MAX77686
4 * Copyright (C) 2012 Samsung Electronics Co.Ltd
6 * based on rtc-max8997.c
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
15 #include <linux/slab.h>
16 #include <linux/rtc.h>
17 #include <linux/delay.h>
18 #include <linux/mutex.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/mfd/max77686-private.h>
22 #include <linux/irqdomain.h>
23 #include <linux/regmap.h>
25 /* RTC Control Register */
26 #define BCD_EN_SHIFT 0
27 #define BCD_EN_MASK (1 << BCD_EN_SHIFT)
28 #define MODEL24_SHIFT 1
29 #define MODEL24_MASK (1 << MODEL24_SHIFT)
30 /* RTC Update Register1 */
31 #define RTC_UDR_SHIFT 0
32 #define RTC_UDR_MASK (1 << RTC_UDR_SHIFT)
33 #define RTC_RBUDR_SHIFT 4
34 #define RTC_RBUDR_MASK (1 << RTC_RBUDR_SHIFT)
35 /* WTSR and SMPL Register */
36 #define WTSRT_SHIFT 0
37 #define SMPLT_SHIFT 2
38 #define WTSR_EN_SHIFT 6
39 #define SMPL_EN_SHIFT 7
40 #define WTSRT_MASK (3 << WTSRT_SHIFT)
41 #define SMPLT_MASK (3 << SMPLT_SHIFT)
42 #define WTSR_EN_MASK (1 << WTSR_EN_SHIFT)
43 #define SMPL_EN_MASK (1 << SMPL_EN_SHIFT)
44 /* RTC Hour register */
45 #define HOUR_PM_SHIFT 6
46 #define HOUR_PM_MASK (1 << HOUR_PM_SHIFT)
47 /* RTC Alarm Enable */
48 #define ALARM_ENABLE_SHIFT 7
49 #define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT)
51 #define MAX77686_RTC_UPDATE_DELAY 16
52 #undef MAX77686_RTC_WTSR_SMPL
54 enum {
55 RTC_SEC = 0,
56 RTC_MIN,
57 RTC_HOUR,
58 RTC_WEEKDAY,
59 RTC_MONTH,
60 RTC_YEAR,
61 RTC_DATE,
62 RTC_NR_TIME
65 struct max77686_rtc_info {
66 struct device *dev;
67 struct max77686_dev *max77686;
68 struct i2c_client *rtc;
69 struct rtc_device *rtc_dev;
70 struct mutex lock;
72 struct regmap *regmap;
74 int virq;
75 int rtc_24hr_mode;
78 enum MAX77686_RTC_OP {
79 MAX77686_RTC_WRITE,
80 MAX77686_RTC_READ,
83 static inline int max77686_rtc_calculate_wday(u8 shifted)
85 int counter = -1;
86 while (shifted) {
87 shifted >>= 1;
88 counter++;
90 return counter;
93 static void max77686_rtc_data_to_tm(u8 *data, struct rtc_time *tm,
94 int rtc_24hr_mode)
96 tm->tm_sec = data[RTC_SEC] & 0x7f;
97 tm->tm_min = data[RTC_MIN] & 0x7f;
98 if (rtc_24hr_mode)
99 tm->tm_hour = data[RTC_HOUR] & 0x1f;
100 else {
101 tm->tm_hour = data[RTC_HOUR] & 0x0f;
102 if (data[RTC_HOUR] & HOUR_PM_MASK)
103 tm->tm_hour += 12;
106 tm->tm_wday = max77686_rtc_calculate_wday(data[RTC_WEEKDAY] & 0x7f);
107 tm->tm_mday = data[RTC_DATE] & 0x1f;
108 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
109 tm->tm_year = (data[RTC_YEAR] & 0x7f) + 100;
110 tm->tm_yday = 0;
111 tm->tm_isdst = 0;
114 static int max77686_rtc_tm_to_data(struct rtc_time *tm, u8 *data)
116 data[RTC_SEC] = tm->tm_sec;
117 data[RTC_MIN] = tm->tm_min;
118 data[RTC_HOUR] = tm->tm_hour;
119 data[RTC_WEEKDAY] = 1 << tm->tm_wday;
120 data[RTC_DATE] = tm->tm_mday;
121 data[RTC_MONTH] = tm->tm_mon + 1;
122 data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
124 if (tm->tm_year < 100) {
125 pr_warn("%s: MAX77686 RTC cannot handle the year %d."
126 "Assume it's 2000.\n", __func__, 1900 + tm->tm_year);
127 return -EINVAL;
129 return 0;
132 static int max77686_rtc_update(struct max77686_rtc_info *info,
133 enum MAX77686_RTC_OP op)
135 int ret;
136 unsigned int data;
138 if (op == MAX77686_RTC_WRITE)
139 data = 1 << RTC_UDR_SHIFT;
140 else
141 data = 1 << RTC_RBUDR_SHIFT;
143 ret = regmap_update_bits(info->max77686->rtc_regmap,
144 MAX77686_RTC_UPDATE0, data, data);
145 if (ret < 0)
146 dev_err(info->dev, "%s: fail to write update reg(ret=%d, data=0x%x)\n",
147 __func__, ret, data);
148 else {
149 /* Minimum 16ms delay required before RTC update. */
150 msleep(MAX77686_RTC_UPDATE_DELAY);
153 return ret;
156 static int max77686_rtc_read_time(struct device *dev, struct rtc_time *tm)
158 struct max77686_rtc_info *info = dev_get_drvdata(dev);
159 u8 data[RTC_NR_TIME];
160 int ret;
162 mutex_lock(&info->lock);
164 ret = max77686_rtc_update(info, MAX77686_RTC_READ);
165 if (ret < 0)
166 goto out;
168 ret = regmap_bulk_read(info->max77686->rtc_regmap,
169 MAX77686_RTC_SEC, data, RTC_NR_TIME);
170 if (ret < 0) {
171 dev_err(info->dev, "%s: fail to read time reg(%d)\n", __func__, ret);
172 goto out;
175 max77686_rtc_data_to_tm(data, tm, info->rtc_24hr_mode);
177 ret = rtc_valid_tm(tm);
179 out:
180 mutex_unlock(&info->lock);
181 return ret;
184 static int max77686_rtc_set_time(struct device *dev, struct rtc_time *tm)
186 struct max77686_rtc_info *info = dev_get_drvdata(dev);
187 u8 data[RTC_NR_TIME];
188 int ret;
190 ret = max77686_rtc_tm_to_data(tm, data);
191 if (ret < 0)
192 return ret;
194 mutex_lock(&info->lock);
196 ret = regmap_bulk_write(info->max77686->rtc_regmap,
197 MAX77686_RTC_SEC, data, RTC_NR_TIME);
198 if (ret < 0) {
199 dev_err(info->dev, "%s: fail to write time reg(%d)\n", __func__,
200 ret);
201 goto out;
204 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
206 out:
207 mutex_unlock(&info->lock);
208 return ret;
211 static int max77686_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
213 struct max77686_rtc_info *info = dev_get_drvdata(dev);
214 u8 data[RTC_NR_TIME];
215 unsigned int val;
216 int i, ret;
218 mutex_lock(&info->lock);
220 ret = max77686_rtc_update(info, MAX77686_RTC_READ);
221 if (ret < 0)
222 goto out;
224 ret = regmap_bulk_read(info->max77686->rtc_regmap,
225 MAX77686_ALARM1_SEC, data, RTC_NR_TIME);
226 if (ret < 0) {
227 dev_err(info->dev, "%s:%d fail to read alarm reg(%d)\n",
228 __func__, __LINE__, ret);
229 goto out;
232 max77686_rtc_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
234 alrm->enabled = 0;
235 for (i = 0; i < RTC_NR_TIME; i++) {
236 if (data[i] & ALARM_ENABLE_MASK) {
237 alrm->enabled = 1;
238 break;
242 alrm->pending = 0;
243 ret = regmap_read(info->max77686->regmap, MAX77686_REG_STATUS2, &val);
244 if (ret < 0) {
245 dev_err(info->dev, "%s:%d fail to read status2 reg(%d)\n",
246 __func__, __LINE__, ret);
247 goto out;
250 if (val & (1 << 4)) /* RTCA1 */
251 alrm->pending = 1;
253 out:
254 mutex_unlock(&info->lock);
255 return 0;
258 static int max77686_rtc_stop_alarm(struct max77686_rtc_info *info)
260 u8 data[RTC_NR_TIME];
261 int ret, i;
262 struct rtc_time tm;
264 if (!mutex_is_locked(&info->lock))
265 dev_warn(info->dev, "%s: should have mutex locked\n", __func__);
267 ret = max77686_rtc_update(info, MAX77686_RTC_READ);
268 if (ret < 0)
269 goto out;
271 ret = regmap_bulk_read(info->max77686->rtc_regmap,
272 MAX77686_ALARM1_SEC, data, RTC_NR_TIME);
273 if (ret < 0) {
274 dev_err(info->dev, "%s: fail to read alarm reg(%d)\n",
275 __func__, ret);
276 goto out;
279 max77686_rtc_data_to_tm(data, &tm, info->rtc_24hr_mode);
281 for (i = 0; i < RTC_NR_TIME; i++)
282 data[i] &= ~ALARM_ENABLE_MASK;
284 ret = regmap_bulk_write(info->max77686->rtc_regmap,
285 MAX77686_ALARM1_SEC, data, RTC_NR_TIME);
286 if (ret < 0) {
287 dev_err(info->dev, "%s: fail to write alarm reg(%d)\n",
288 __func__, ret);
289 goto out;
292 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
293 out:
294 return ret;
297 static int max77686_rtc_start_alarm(struct max77686_rtc_info *info)
299 u8 data[RTC_NR_TIME];
300 int ret;
301 struct rtc_time tm;
303 if (!mutex_is_locked(&info->lock))
304 dev_warn(info->dev, "%s: should have mutex locked\n", __func__);
306 ret = max77686_rtc_update(info, MAX77686_RTC_READ);
307 if (ret < 0)
308 goto out;
310 ret = regmap_bulk_read(info->max77686->rtc_regmap,
311 MAX77686_ALARM1_SEC, data, RTC_NR_TIME);
312 if (ret < 0) {
313 dev_err(info->dev, "%s: fail to read alarm reg(%d)\n",
314 __func__, ret);
315 goto out;
318 max77686_rtc_data_to_tm(data, &tm, info->rtc_24hr_mode);
320 data[RTC_SEC] |= (1 << ALARM_ENABLE_SHIFT);
321 data[RTC_MIN] |= (1 << ALARM_ENABLE_SHIFT);
322 data[RTC_HOUR] |= (1 << ALARM_ENABLE_SHIFT);
323 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
324 if (data[RTC_MONTH] & 0xf)
325 data[RTC_MONTH] |= (1 << ALARM_ENABLE_SHIFT);
326 if (data[RTC_YEAR] & 0x7f)
327 data[RTC_YEAR] |= (1 << ALARM_ENABLE_SHIFT);
328 if (data[RTC_DATE] & 0x1f)
329 data[RTC_DATE] |= (1 << ALARM_ENABLE_SHIFT);
331 ret = regmap_bulk_write(info->max77686->rtc_regmap,
332 MAX77686_ALARM1_SEC, data, RTC_NR_TIME);
333 if (ret < 0) {
334 dev_err(info->dev, "%s: fail to write alarm reg(%d)\n",
335 __func__, ret);
336 goto out;
339 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
340 out:
341 return ret;
344 static int max77686_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
346 struct max77686_rtc_info *info = dev_get_drvdata(dev);
347 u8 data[RTC_NR_TIME];
348 int ret;
350 ret = max77686_rtc_tm_to_data(&alrm->time, data);
351 if (ret < 0)
352 return ret;
354 mutex_lock(&info->lock);
356 ret = max77686_rtc_stop_alarm(info);
357 if (ret < 0)
358 goto out;
360 ret = regmap_bulk_write(info->max77686->rtc_regmap,
361 MAX77686_ALARM1_SEC, data, RTC_NR_TIME);
363 if (ret < 0) {
364 dev_err(info->dev, "%s: fail to write alarm reg(%d)\n",
365 __func__, ret);
366 goto out;
369 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
370 if (ret < 0)
371 goto out;
373 if (alrm->enabled)
374 ret = max77686_rtc_start_alarm(info);
375 out:
376 mutex_unlock(&info->lock);
377 return ret;
380 static int max77686_rtc_alarm_irq_enable(struct device *dev,
381 unsigned int enabled)
383 struct max77686_rtc_info *info = dev_get_drvdata(dev);
384 int ret;
386 mutex_lock(&info->lock);
387 if (enabled)
388 ret = max77686_rtc_start_alarm(info);
389 else
390 ret = max77686_rtc_stop_alarm(info);
391 mutex_unlock(&info->lock);
393 return ret;
396 static irqreturn_t max77686_rtc_alarm_irq(int irq, void *data)
398 struct max77686_rtc_info *info = data;
400 dev_info(info->dev, "%s:irq(%d)\n", __func__, irq);
402 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
404 return IRQ_HANDLED;
407 static const struct rtc_class_ops max77686_rtc_ops = {
408 .read_time = max77686_rtc_read_time,
409 .set_time = max77686_rtc_set_time,
410 .read_alarm = max77686_rtc_read_alarm,
411 .set_alarm = max77686_rtc_set_alarm,
412 .alarm_irq_enable = max77686_rtc_alarm_irq_enable,
415 #ifdef MAX77686_RTC_WTSR_SMPL
416 static void max77686_rtc_enable_wtsr(struct max77686_rtc_info *info, bool enable)
418 int ret;
419 unsigned int val, mask;
421 if (enable)
422 val = (1 << WTSR_EN_SHIFT) | (3 << WTSRT_SHIFT);
423 else
424 val = 0;
426 mask = WTSR_EN_MASK | WTSRT_MASK;
428 dev_info(info->dev, "%s: %s WTSR\n", __func__,
429 enable ? "enable" : "disable");
431 ret = regmap_update_bits(info->max77686->rtc_regmap,
432 MAX77686_WTSR_SMPL_CNTL, mask, val);
433 if (ret < 0) {
434 dev_err(info->dev, "%s: fail to update WTSR reg(%d)\n",
435 __func__, ret);
436 return;
439 max77686_rtc_update(info, MAX77686_RTC_WRITE);
442 static void max77686_rtc_enable_smpl(struct max77686_rtc_info *info, bool enable)
444 int ret;
445 unsigned int val, mask;
447 if (enable)
448 val = (1 << SMPL_EN_SHIFT) | (0 << SMPLT_SHIFT);
449 else
450 val = 0;
452 mask = SMPL_EN_MASK | SMPLT_MASK;
454 dev_info(info->dev, "%s: %s SMPL\n", __func__,
455 enable ? "enable" : "disable");
457 ret = regmap_update_bits(info->max77686->rtc_regmap,
458 MAX77686_WTSR_SMPL_CNTL, mask, val);
459 if (ret < 0) {
460 dev_err(info->dev, "%s: fail to update SMPL reg(%d)\n",
461 __func__, ret);
462 return;
465 max77686_rtc_update(info, MAX77686_RTC_WRITE);
467 val = 0;
468 regmap_read(info->max77686->rtc_regmap, MAX77686_WTSR_SMPL_CNTL, &val);
469 dev_info(info->dev, "%s: WTSR_SMPL(0x%02x)\n", __func__, val);
471 #endif /* MAX77686_RTC_WTSR_SMPL */
473 static int max77686_rtc_init_reg(struct max77686_rtc_info *info)
475 u8 data[2];
476 int ret;
478 /* Set RTC control register : Binary mode, 24hour mdoe */
479 data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
480 data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
482 info->rtc_24hr_mode = 1;
484 ret = regmap_bulk_write(info->max77686->rtc_regmap, MAX77686_RTC_CONTROLM, data, 2);
485 if (ret < 0) {
486 dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
487 __func__, ret);
488 return ret;
491 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
492 return ret;
495 static struct regmap_config max77686_rtc_regmap_config = {
496 .reg_bits = 8,
497 .val_bits = 8,
500 static int max77686_rtc_probe(struct platform_device *pdev)
502 struct max77686_dev *max77686 = dev_get_drvdata(pdev->dev.parent);
503 struct max77686_rtc_info *info;
504 int ret, virq;
506 dev_info(&pdev->dev, "%s\n", __func__);
508 info = devm_kzalloc(&pdev->dev, sizeof(struct max77686_rtc_info),
509 GFP_KERNEL);
510 if (!info)
511 return -ENOMEM;
513 mutex_init(&info->lock);
514 info->dev = &pdev->dev;
515 info->max77686 = max77686;
516 info->rtc = max77686->rtc;
517 info->max77686->rtc_regmap = devm_regmap_init_i2c(info->max77686->rtc,
518 &max77686_rtc_regmap_config);
519 if (IS_ERR(info->max77686->rtc_regmap)) {
520 ret = PTR_ERR(info->max77686->rtc_regmap);
521 dev_err(info->max77686->dev, "Failed to allocate register map: %d\n",
522 ret);
523 return ret;
525 platform_set_drvdata(pdev, info);
527 ret = max77686_rtc_init_reg(info);
529 if (ret < 0) {
530 dev_err(&pdev->dev, "Failed to initialize RTC reg:%d\n", ret);
531 goto err_rtc;
534 #ifdef MAX77686_RTC_WTSR_SMPL
535 max77686_rtc_enable_wtsr(info, true);
536 max77686_rtc_enable_smpl(info, true);
537 #endif
539 device_init_wakeup(&pdev->dev, 1);
541 info->rtc_dev = devm_rtc_device_register(&pdev->dev, "max77686-rtc",
542 &max77686_rtc_ops, THIS_MODULE);
544 if (IS_ERR(info->rtc_dev)) {
545 dev_info(&pdev->dev, "%s: fail\n", __func__);
547 ret = PTR_ERR(info->rtc_dev);
548 dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret);
549 if (ret == 0)
550 ret = -EINVAL;
551 goto err_rtc;
553 virq = irq_create_mapping(max77686->irq_domain, MAX77686_RTCIRQ_RTCA1);
554 if (!virq) {
555 ret = -ENXIO;
556 goto err_rtc;
558 info->virq = virq;
560 ret = devm_request_threaded_irq(&pdev->dev, virq, NULL,
561 max77686_rtc_alarm_irq, 0, "rtc-alarm0", info);
562 if (ret < 0)
563 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
564 info->virq, ret);
566 err_rtc:
567 return ret;
570 static void max77686_rtc_shutdown(struct platform_device *pdev)
572 #ifdef MAX77686_RTC_WTSR_SMPL
573 struct max77686_rtc_info *info = platform_get_drvdata(pdev);
574 int i;
575 u8 val = 0;
577 for (i = 0; i < 3; i++) {
578 max77686_rtc_enable_wtsr(info, false);
579 regmap_read(info->max77686->rtc_regmap, MAX77686_WTSR_SMPL_CNTL, &val);
580 dev_info(info->dev, "%s: WTSR_SMPL reg(0x%02x)\n", __func__,
581 val);
582 if (val & WTSR_EN_MASK) {
583 dev_emerg(info->dev, "%s: fail to disable WTSR\n",
584 __func__);
585 } else {
586 dev_info(info->dev, "%s: success to disable WTSR\n",
587 __func__);
588 break;
592 /* Disable SMPL when power off */
593 max77686_rtc_enable_smpl(info, false);
594 #endif /* MAX77686_RTC_WTSR_SMPL */
597 static const struct platform_device_id rtc_id[] = {
598 { "max77686-rtc", 0 },
602 static struct platform_driver max77686_rtc_driver = {
603 .driver = {
604 .name = "max77686-rtc",
605 .owner = THIS_MODULE,
607 .probe = max77686_rtc_probe,
608 .shutdown = max77686_rtc_shutdown,
609 .id_table = rtc_id,
612 module_platform_driver(max77686_rtc_driver);
614 MODULE_DESCRIPTION("Maxim MAX77686 RTC driver");
615 MODULE_AUTHOR("Chiwoong Byun <woong.byun@samsung.com>");
616 MODULE_LICENSE("GPL");