drivers/block/mtip32xx/mtip32xx.h

   1 /*
   2  * mtip32xx.h - Header file for the P320 SSD Block Driver
   3  *   Copyright (C) 2011 Micron Technology, Inc.
   4  *
   5  * Portions of this code were derived from works subjected to the
   6  * following copyright:
   7  *    Copyright (C) 2009 Integrated Device Technology, Inc.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  */
  20
  21 #ifndef __MTIP32XX_H__
  22 #define __MTIP32XX_H__
  23
  24 #include <linux/spinlock.h>
  25 #include <linux/rwsem.h>
  26 #include <linux/ata.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/genhd.h>
  29
  30 /* Offset of Subsystem Device ID in pci confoguration space */
  31 #define PCI_SUBSYSTEM_DEVICEID  0x2E
  32
  33 /* offset of Device Control register in PCIe extended capabilites space */
  34 #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET   0x48
  35
  36 /* # of times to retry timed out/failed IOs */
  37 #define MTIP_MAX_RETRIES        2
  38
  39 /* Various timeout values in ms */
  40 #define MTIP_NCQ_COMMAND_TIMEOUT_MS       5000
  41 #define MTIP_IOCTL_COMMAND_TIMEOUT_MS     5000
  42 #define MTIP_INTERNAL_COMMAND_TIMEOUT_MS  5000
  43
  44 /* check for timeouts every 500ms */
  45 #define MTIP_TIMEOUT_CHECK_PERIOD       500
  46
  47 /* ftl rebuild */
  48 #define MTIP_FTL_REBUILD_OFFSET         142
  49 #define MTIP_FTL_REBUILD_MAGIC          0xED51
  50 #define MTIP_FTL_REBUILD_TIMEOUT_MS     2400000
  51
  52 /* Macro to extract the tag bit number from a tag value. */
  53 #define MTIP_TAG_BIT(tag)       (tag & 0x1F)
  54
  55 /*
  56  * Macro to extract the tag index from a tag value. The index
  57  * is used to access the correct s_active/Command Issue register based
  58  * on the tag value.
  59  */
  60 #define MTIP_TAG_INDEX(tag)     (tag >> 5)
  61
  62 /*
  63  * Maximum number of scatter gather entries
  64  * a single command may have.
  65  */
  66 #define MTIP_MAX_SG             128
  67
  68 /*
  69  * Maximum number of slot groups (Command Issue & s_active registers)
  70  * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
  71  */
  72 #define MTIP_MAX_SLOT_GROUPS    8
  73
  74 /* Internal command tag. */
  75 #define MTIP_TAG_INTERNAL       0
  76
  77 /* Micron Vendor ID & P320x SSD Device ID */
  78 #define PCI_VENDOR_ID_MICRON    0x1344
  79 #define P320_DEVICE_ID          0x5150
  80
  81 /* Driver name and version strings */
  82 #define MTIP_DRV_NAME           "mtip32xx"
  83 #define MTIP_DRV_VERSION        "1.2.6os3"
  84
  85 /* Maximum number of minor device numbers per device. */
  86 #define MTIP_MAX_MINORS         16
  87
  88 /* Maximum number of supported command slots. */
  89 #define MTIP_MAX_COMMAND_SLOTS  (MTIP_MAX_SLOT_GROUPS * 32)
  90
  91 /*
  92  * Per-tag bitfield size in longs.
  93  * Linux bit manipulation functions
  94  * (i.e. test_and_set_bit, find_next_zero_bit)
  95  * manipulate memory in longs, so we try to make the math work.
  96  * take the slot groups and find the number of longs, rounding up.
  97  * Careful! i386 and x86_64 use different size longs!
  98  */
  99 #define U32_PER_LONG    (sizeof(long) / sizeof(u32))
 100 #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
 101                                         (U32_PER_LONG-1))/U32_PER_LONG)
 102
 103 /* BAR number used to access the HBA registers. */
 104 #define MTIP_ABAR               5
 105
 106 #ifdef DEBUG
 107  #define dbg_printk(format, arg...)     \
 108         printk(pr_fmt(format), ##arg);
 109 #else
 110  #define dbg_printk(format, arg...)
 111 #endif
 112
 113 #define __force_bit2int (unsigned int __force)
 114
 115 enum {
 116         /* below are bit numbers in 'flags' defined in mtip_port */
 117         MTIP_PF_IC_ACTIVE_BIT       = 0, /* pio/ioctl */
 118         MTIP_PF_EH_ACTIVE_BIT       = 1, /* error handling */
 119         MTIP_PF_SE_ACTIVE_BIT       = 2, /* secure erase */
 120         MTIP_PF_DM_ACTIVE_BIT       = 3, /* download microcde */
 121         MTIP_PF_PAUSE_IO      = ((1 << MTIP_PF_IC_ACTIVE_BIT) | \
 122                                 (1 << MTIP_PF_EH_ACTIVE_BIT) | \
 123                                 (1 << MTIP_PF_SE_ACTIVE_BIT) | \
 124                                 (1 << MTIP_PF_DM_ACTIVE_BIT)),
 125
 126         MTIP_PF_SVC_THD_ACTIVE_BIT  = 4,
 127         MTIP_PF_ISSUE_CMDS_BIT      = 5,
 128         MTIP_PF_REBUILD_BIT         = 6,
 129         MTIP_PF_SVC_THD_STOP_BIT    = 8,
 130
 131         /* below are bit numbers in 'dd_flag' defined in driver_data */
 132         MTIP_DDF_REMOVE_PENDING_BIT = 1,
 133         MTIP_DDF_OVER_TEMP_BIT      = 2,
 134         MTIP_DDF_WRITE_PROTECT_BIT  = 3,
 135         MTIP_DDF_STOP_IO      = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) | \
 136                                 (1 << MTIP_DDF_OVER_TEMP_BIT) | \
 137                                 (1 << MTIP_DDF_WRITE_PROTECT_BIT)),
 138
 139         MTIP_DDF_CLEANUP_BIT        = 5,
 140         MTIP_DDF_RESUME_BIT         = 6,
 141         MTIP_DDF_INIT_DONE_BIT      = 7,
 142         MTIP_DDF_REBUILD_FAILED_BIT = 8,
 143 };
 144
 145 __packed struct smart_attr{
 146         u8 attr_id;
 147         u16 flags;
 148         u8 cur;
 149         u8 worst;
 150         u32 data;
 151         u8 res[3];
 152 };
 153
 154 /* Register Frame Information Structure (FIS), host to device. */
 155 struct host_to_dev_fis {
 156         /*
 157          * FIS type.
 158          * - 27h Register FIS, host to device.
 159          * - 34h Register FIS, device to host.
 160          * - 39h DMA Activate FIS, device to host.
 161          * - 41h DMA Setup FIS, bi-directional.
 162          * - 46h Data FIS, bi-directional.
 163          * - 58h BIST Activate FIS, bi-directional.
 164          * - 5Fh PIO Setup FIS, device to host.
 165          * - A1h Set Device Bits FIS, device to host.
 166          */
 167         unsigned char type;
 168         unsigned char opts;
 169         unsigned char command;
 170         unsigned char features;
 171
 172         union {
 173                 unsigned char lba_low;
 174                 unsigned char sector;
 175         };
 176         union {
 177                 unsigned char lba_mid;
 178                 unsigned char cyl_low;
 179         };
 180         union {
 181                 unsigned char lba_hi;
 182                 unsigned char cyl_hi;
 183         };
 184         union {
 185                 unsigned char device;
 186                 unsigned char head;
 187         };
 188
 189         union {
 190                 unsigned char lba_low_ex;
 191                 unsigned char sector_ex;
 192         };
 193         union {
 194                 unsigned char lba_mid_ex;
 195                 unsigned char cyl_low_ex;
 196         };
 197         union {
 198                 unsigned char lba_hi_ex;
 199                 unsigned char cyl_hi_ex;
 200         };
 201         unsigned char features_ex;
 202
 203         unsigned char sect_count;
 204         unsigned char sect_cnt_ex;
 205         unsigned char res2;
 206         unsigned char control;
 207
 208         unsigned int res3;
 209 };
 210
 211 /* Command header structure. */
 212 struct mtip_cmd_hdr {
 213         /*
 214          * Command options.
 215          * - Bits 31:16 Number of PRD entries.
 216          * - Bits 15:8 Unused in this implementation.
 217          * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
 218          * - Bit 6 Write bit, should be set when writing data to the device.
 219          * - Bit 5 Unused in this implementation.
 220          * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
 221          */
 222         unsigned int opts;
 223         /* This field is unsed when using NCQ. */
 224         union {
 225                 unsigned int byte_count;
 226                 unsigned int status;
 227         };
 228         /*
 229          * Lower 32 bits of the command table address associated with this
 230          * header. The command table addresses must be 128 byte aligned.
 231          */
 232         unsigned int ctba;
 233         /*
 234          * If 64 bit addressing is used this field is the upper 32 bits
 235          * of the command table address associated with this command.
 236          */
 237         unsigned int ctbau;
 238         /* Reserved and unused. */
 239         unsigned int res[4];
 240 };
 241
 242 /* Command scatter gather structure (PRD). */
 243 struct mtip_cmd_sg {
 244         /*
 245          * Low 32 bits of the data buffer address. For P320 this
 246          * address must be 8 byte aligned signified by bits 2:0 being
 247          * set to 0.
 248          */
 249         unsigned int dba;
 250         /*
 251          * When 64 bit addressing is used this field is the upper
 252          * 32 bits of the data buffer address.
 253          */
 254         unsigned int dba_upper;
 255         /* Unused. */
 256         unsigned int reserved;
 257         /*
 258          * Bit 31: interrupt when this data block has been transferred.
 259          * Bits 30..22: reserved
 260          * Bits 21..0: byte count (minus 1).  For P320 the byte count must be
 261          * 8 byte aligned signified by bits 2:0 being set to 1.
 262          */
 263         unsigned int info;
 264 };
 265 struct mtip_port;
 266
 267 /* Structure used to describe a command. */
 268 struct mtip_cmd {
 269
 270         struct mtip_cmd_hdr *command_header; /* ptr to command header entry */
 271
 272         dma_addr_t command_header_dma; /* corresponding physical address */
 273
 274         void *command; /* ptr to command table entry */
 275
 276         dma_addr_t command_dma; /* corresponding physical address */
 277
 278         void *comp_data; /* data passed to completion function comp_func() */
 279         /*
 280          * Completion function called by the ISR upon completion of
 281          * a command.
 282          */
 283         void (*comp_func)(struct mtip_port *port,
 284                                 int tag,
 285                                 void *data,
 286                                 int status);
 287         /* Additional callback function that may be called by comp_func() */
 288         void (*async_callback)(void *data, int status);
 289
 290         void *async_data; /* Addl. data passed to async_callback() */
 291
 292         int scatter_ents; /* Number of scatter list entries used */
 293
 294         struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */
 295
 296         int retries; /* The number of retries left for this command. */
 297
 298         int direction; /* Data transfer direction */
 299
 300         unsigned long comp_time; /* command completion time, in jiffies */
 301
 302         atomic_t active; /* declares if this command sent to the drive. */
 303 };
 304
 305 /* Structure used to describe a port. */
 306 struct mtip_port {
 307         /* Pointer back to the driver data for this port. */
 308         struct driver_data *dd;
 309         /*
 310          * Used to determine if the data pointed to by the
 311          * identify field is valid.
 312          */
 313         unsigned long identify_valid;
 314         /* Base address of the memory mapped IO for the port. */
 315         void __iomem *mmio;
 316         /* Array of pointers to the memory mapped s_active registers. */
 317         void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
 318         /* Array of pointers to the memory mapped completed registers. */
 319         void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
 320         /* Array of pointers to the memory mapped Command Issue registers. */
 321         void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
 322         /*
 323          * Pointer to the beginning of the command header memory as used
 324          * by the driver.
 325          */
 326         void *command_list;
 327         /*
 328          * Pointer to the beginning of the command header memory as used
 329          * by the DMA.
 330          */
 331         dma_addr_t command_list_dma;
 332         /*
 333          * Pointer to the beginning of the RX FIS memory as used
 334          * by the driver.
 335          */
 336         void *rxfis;
 337         /*
 338          * Pointer to the beginning of the RX FIS memory as used
 339          * by the DMA.
 340          */
 341         dma_addr_t rxfis_dma;
 342         /*
 343          * Pointer to the beginning of the command table memory as used
 344          * by the driver.
 345          */
 346         void *command_table;
 347         /*
 348          * Pointer to the beginning of the command table memory as used
 349          * by the DMA.
 350          */
 351         dma_addr_t command_tbl_dma;
 352         /*
 353          * Pointer to the beginning of the identify data memory as used
 354          * by the driver.
 355          */
 356         u16 *identify;
 357         /*
 358          * Pointer to the beginning of the identify data memory as used
 359          * by the DMA.
 360          */
 361         dma_addr_t identify_dma;
 362         /*
 363          * Pointer to the beginning of a sector buffer that is used
 364          * by the driver when issuing internal commands.
 365          */
 366         u16 *sector_buffer;
 367         /*
 368          * Pointer to the beginning of a sector buffer that is used
 369          * by the DMA when the driver issues internal commands.
 370          */
 371         dma_addr_t sector_buffer_dma;
 372         /*
 373          * Bit significant, used to determine if a command slot has
 374          * been allocated. i.e. the slot is in use.  Bits are cleared
 375          * when the command slot and all associated data structures
 376          * are no longer needed.
 377          */
 378         u16 *log_buf;
 379         dma_addr_t log_buf_dma;
 380
 381         u8 *smart_buf;
 382         dma_addr_t smart_buf_dma;
 383
 384         unsigned long allocated[SLOTBITS_IN_LONGS];
 385         /*
 386          * used to queue commands when an internal command is in progress
 387          * or error handling is active
 388          */
 389         unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
 390         /*
 391          * Array of command slots. Structure includes pointers to the
 392          * command header and command table, and completion function and data
 393          * pointers.
 394          */
 395         struct mtip_cmd commands[MTIP_MAX_COMMAND_SLOTS];
 396         /* Used by mtip_service_thread to wait for an event */
 397         wait_queue_head_t svc_wait;
 398         /*
 399          * indicates the state of the port. Also, helps the service thread
 400          * to determine its action on wake up.
 401          */
 402         unsigned long flags;
 403         /*
 404          * Timer used to complete commands that have been active for too long.
 405          */
 406         struct timer_list cmd_timer;
 407         unsigned long ic_pause_timer;
 408         /*
 409          * Semaphore used to block threads if there are no
 410          * command slots available.
 411          */
 412         struct semaphore cmd_slot;
 413         /* Spinlock for working around command-issue bug. */
 414         spinlock_t cmd_issue_lock;
 415 };
 416
 417 /*
 418  * Driver private data structure.
 419  *
 420  * One structure is allocated per probed device.
 421  */
 422 struct driver_data {
 423         void __iomem *mmio; /* Base address of the HBA registers. */
 424
 425         int major; /* Major device number. */
 426
 427         int instance; /* Instance number. First device probed is 0, ... */
 428
 429         struct gendisk *disk; /* Pointer to our gendisk structure. */
 430
 431         struct pci_dev *pdev; /* Pointer to the PCI device structure. */
 432
 433         struct request_queue *queue; /* Our request queue. */
 434
 435         struct mtip_port *port; /* Pointer to the port data structure. */
 436
 437         /* Tasklet used to process the bottom half of the ISR. */
 438         struct tasklet_struct tasklet;
 439
 440         unsigned product_type; /* magic value declaring the product type */
 441
 442         unsigned slot_groups; /* number of slot groups the product supports */
 443
 444         unsigned long index; /* Index to determine the disk name */
 445
 446         unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
 447
 448         struct task_struct *mtip_svc_handler; /* task_struct of svc thd */
 449 };
 450
 451 #endif