2 * linux/drivers/char/amba.c
4 * Driver for AMBA serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright 1999 ARM Limited
9 * Copyright (C) 2000 Deep Blue Solutions Ltd.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $
27 * This is a generic driver for ARM AMBA-type serial ports. They
28 * have a lot of 16550-like features, but are not register compatible.
29 * Note that although they do have CTS, DCD and DSR inputs, they do
30 * not have an RI input, nor do they have DTR or RTS outputs. If
31 * required, these have to be supplied via some other means (eg, GPIO)
32 * and hooked into this driver.
34 #include <linux/config.h>
35 #include <linux/module.h>
36 #include <linux/tty.h>
37 #include <linux/ioport.h>
38 #include <linux/init.h>
39 #include <linux/serial.h>
40 #include <linux/console.h>
41 #include <linux/sysrq.h>
42 #include <linux/device.h>
46 #include <asm/hardware/amba.h>
48 #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
52 #include <linux/serial_core.h>
54 #include <asm/hardware/amba_serial.h>
58 #define SERIAL_AMBA_MAJOR 204
59 #define SERIAL_AMBA_MINOR 16
60 #define SERIAL_AMBA_NR UART_NR
62 #define AMBA_ISR_PASS_LIMIT 256
65 * Access macros for the AMBA UARTs
67 #define UART_GET_INT_STATUS(p) readb((p)->membase + UART010_IIR)
68 #define UART_PUT_ICR(p, c) writel((c), (p)->membase + UART010_ICR)
69 #define UART_GET_FR(p) readb((p)->membase + UART01x_FR)
70 #define UART_GET_CHAR(p) readb((p)->membase + UART01x_DR)
71 #define UART_PUT_CHAR(p, c) writel((c), (p)->membase + UART01x_DR)
72 #define UART_GET_RSR(p) readb((p)->membase + UART01x_RSR)
73 #define UART_GET_CR(p) readb((p)->membase + UART010_CR)
74 #define UART_PUT_CR(p,c) writel((c), (p)->membase + UART010_CR)
75 #define UART_GET_LCRL(p) readb((p)->membase + UART010_LCRL)
76 #define UART_PUT_LCRL(p,c) writel((c), (p)->membase + UART010_LCRL)
77 #define UART_GET_LCRM(p) readb((p)->membase + UART010_LCRM)
78 #define UART_PUT_LCRM(p,c) writel((c), (p)->membase + UART010_LCRM)
79 #define UART_GET_LCRH(p) readb((p)->membase + UART010_LCRH)
80 #define UART_PUT_LCRH(p,c) writel((c), (p)->membase + UART010_LCRH)
81 #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
82 #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
83 #define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART01x_FR_TMSK) == 0)
85 #define UART_DUMMY_RSR_RX /*256*/0
86 #define UART_PORT_SIZE 64
89 * On the Integrator platform, the port RTS and DTR are provided by
90 * bits in the following SC_CTRLS register bits:
95 #define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
96 #define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
99 * We wrap our port structure around the generic uart_port.
101 struct uart_amba_port
{
102 struct uart_port port
;
103 unsigned int dtr_mask
;
104 unsigned int rts_mask
;
105 unsigned int old_status
;
108 static void pl010_stop_tx(struct uart_port
*port
, unsigned int tty_stop
)
112 cr
= UART_GET_CR(port
);
113 cr
&= ~UART010_CR_TIE
;
114 UART_PUT_CR(port
, cr
);
117 static void pl010_start_tx(struct uart_port
*port
, unsigned int tty_start
)
121 cr
= UART_GET_CR(port
);
122 cr
|= UART010_CR_TIE
;
123 UART_PUT_CR(port
, cr
);
126 static void pl010_stop_rx(struct uart_port
*port
)
130 cr
= UART_GET_CR(port
);
131 cr
&= ~(UART010_CR_RIE
| UART010_CR_RTIE
);
132 UART_PUT_CR(port
, cr
);
135 static void pl010_enable_ms(struct uart_port
*port
)
139 cr
= UART_GET_CR(port
);
140 cr
|= UART010_CR_MSIE
;
141 UART_PUT_CR(port
, cr
);
146 pl010_rx_chars(struct uart_port
*port
, struct pt_regs
*regs
)
148 pl010_rx_chars(struct uart_port
*port
)
151 struct tty_struct
*tty
= port
->info
->tty
;
152 unsigned int status
, ch
, rsr
, max_count
= 256;
154 status
= UART_GET_FR(port
);
155 while (UART_RX_DATA(status
) && max_count
--) {
156 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
) {
157 tty
->flip
.work
.func((void *)tty
);
158 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
) {
159 printk(KERN_WARNING
"TTY_DONT_FLIP set\n");
164 ch
= UART_GET_CHAR(port
);
166 *tty
->flip
.char_buf_ptr
= ch
;
167 *tty
->flip
.flag_buf_ptr
= TTY_NORMAL
;
171 * Note that the error handling code is
172 * out of the main execution path
174 rsr
= UART_GET_RSR(port
) | UART_DUMMY_RSR_RX
;
175 if (rsr
& UART01x_RSR_ANY
) {
176 if (rsr
& UART01x_RSR_BE
) {
177 rsr
&= ~(UART01x_RSR_FE
| UART01x_RSR_PE
);
179 if (uart_handle_break(port
))
181 } else if (rsr
& UART01x_RSR_PE
)
182 port
->icount
.parity
++;
183 else if (rsr
& UART01x_RSR_FE
)
184 port
->icount
.frame
++;
185 if (rsr
& UART01x_RSR_OE
)
186 port
->icount
.overrun
++;
188 rsr
&= port
->read_status_mask
;
190 if (rsr
& UART01x_RSR_BE
)
191 *tty
->flip
.flag_buf_ptr
= TTY_BREAK
;
192 else if (rsr
& UART01x_RSR_PE
)
193 *tty
->flip
.flag_buf_ptr
= TTY_PARITY
;
194 else if (rsr
& UART01x_RSR_FE
)
195 *tty
->flip
.flag_buf_ptr
= TTY_FRAME
;
198 if (uart_handle_sysrq_char(port
, ch
, regs
))
201 if ((rsr
& port
->ignore_status_mask
) == 0) {
202 tty
->flip
.flag_buf_ptr
++;
203 tty
->flip
.char_buf_ptr
++;
206 if ((rsr
& UART01x_RSR_OE
) &&
207 tty
->flip
.count
< TTY_FLIPBUF_SIZE
) {
209 * Overrun is special, since it's reported
210 * immediately, and doesn't affect the current
213 *tty
->flip
.char_buf_ptr
++ = 0;
214 *tty
->flip
.flag_buf_ptr
++ = TTY_OVERRUN
;
218 status
= UART_GET_FR(port
);
220 tty_flip_buffer_push(tty
);
224 static void pl010_tx_chars(struct uart_port
*port
)
226 struct circ_buf
*xmit
= &port
->info
->xmit
;
230 UART_PUT_CHAR(port
, port
->x_char
);
235 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
)) {
236 pl010_stop_tx(port
, 0);
240 count
= port
->fifosize
>> 1;
242 UART_PUT_CHAR(port
, xmit
->buf
[xmit
->tail
]);
243 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
245 if (uart_circ_empty(xmit
))
247 } while (--count
> 0);
249 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
250 uart_write_wakeup(port
);
252 if (uart_circ_empty(xmit
))
253 pl010_stop_tx(port
, 0);
256 static void pl010_modem_status(struct uart_port
*port
)
258 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
259 unsigned int status
, delta
;
261 UART_PUT_ICR(&uap
->port
, 0);
263 status
= UART_GET_FR(&uap
->port
) & UART01x_FR_MODEM_ANY
;
265 delta
= status
^ uap
->old_status
;
266 uap
->old_status
= status
;
271 if (delta
& UART01x_FR_DCD
)
272 uart_handle_dcd_change(&uap
->port
, status
& UART01x_FR_DCD
);
274 if (delta
& UART01x_FR_DSR
)
275 uap
->port
.icount
.dsr
++;
277 if (delta
& UART01x_FR_CTS
)
278 uart_handle_cts_change(&uap
->port
, status
& UART01x_FR_CTS
);
280 wake_up_interruptible(&uap
->port
.info
->delta_msr_wait
);
283 static irqreturn_t
pl010_int(int irq
, void *dev_id
, struct pt_regs
*regs
)
285 struct uart_port
*port
= dev_id
;
286 unsigned int status
, pass_counter
= AMBA_ISR_PASS_LIMIT
;
289 spin_lock(&port
->lock
);
291 status
= UART_GET_INT_STATUS(port
);
294 if (status
& (UART010_IIR_RTIS
| UART010_IIR_RIS
))
296 pl010_rx_chars(port
, regs
);
298 pl010_rx_chars(port
);
300 if (status
& UART010_IIR_MIS
)
301 pl010_modem_status(port
);
302 if (status
& UART010_IIR_TIS
)
303 pl010_tx_chars(port
);
305 if (pass_counter
-- == 0)
308 status
= UART_GET_INT_STATUS(port
);
309 } while (status
& (UART010_IIR_RTIS
| UART010_IIR_RIS
|
314 spin_unlock(&port
->lock
);
316 return IRQ_RETVAL(handled
);
319 static unsigned int pl010_tx_empty(struct uart_port
*port
)
321 return UART_GET_FR(port
) & UART01x_FR_BUSY
? 0 : TIOCSER_TEMT
;
324 static unsigned int pl010_get_mctrl(struct uart_port
*port
)
326 unsigned int result
= 0;
329 status
= UART_GET_FR(port
);
330 if (status
& UART01x_FR_DCD
)
332 if (status
& UART01x_FR_DSR
)
334 if (status
& UART01x_FR_CTS
)
340 static void pl010_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
342 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
343 unsigned int ctrls
= 0, ctrlc
= 0;
345 if (mctrl
& TIOCM_RTS
)
346 ctrlc
|= uap
->rts_mask
;
348 ctrls
|= uap
->rts_mask
;
350 if (mctrl
& TIOCM_DTR
)
351 ctrlc
|= uap
->dtr_mask
;
353 ctrls
|= uap
->dtr_mask
;
355 __raw_writel(ctrls
, SC_CTRLS
);
356 __raw_writel(ctrlc
, SC_CTRLC
);
359 static void pl010_break_ctl(struct uart_port
*port
, int break_state
)
364 spin_lock_irqsave(&port
->lock
, flags
);
365 lcr_h
= UART_GET_LCRH(port
);
366 if (break_state
== -1)
367 lcr_h
|= UART01x_LCRH_BRK
;
369 lcr_h
&= ~UART01x_LCRH_BRK
;
370 UART_PUT_LCRH(port
, lcr_h
);
371 spin_unlock_irqrestore(&port
->lock
, flags
);
374 static int pl010_startup(struct uart_port
*port
)
376 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
382 retval
= request_irq(port
->irq
, pl010_int
, 0, "uart-pl010", port
);
387 * initialise the old status of the modem signals
389 uap
->old_status
= UART_GET_FR(port
) & UART01x_FR_MODEM_ANY
;
392 * Finally, enable interrupts
394 UART_PUT_CR(port
, UART01x_CR_UARTEN
| UART010_CR_RIE
|
400 static void pl010_shutdown(struct uart_port
*port
)
405 free_irq(port
->irq
, port
);
408 * disable all interrupts, disable the port
410 UART_PUT_CR(port
, 0);
412 /* disable break condition and fifos */
413 UART_PUT_LCRH(port
, UART_GET_LCRH(port
) &
414 ~(UART01x_LCRH_BRK
| UART01x_LCRH_FEN
));
418 pl010_set_termios(struct uart_port
*port
, struct termios
*termios
,
421 unsigned int lcr_h
, old_cr
;
423 unsigned int baud
, quot
;
426 * Ask the core to calculate the divisor for us.
428 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
429 quot
= uart_get_divisor(port
, baud
);
431 switch (termios
->c_cflag
& CSIZE
) {
433 lcr_h
= UART01x_LCRH_WLEN_5
;
436 lcr_h
= UART01x_LCRH_WLEN_6
;
439 lcr_h
= UART01x_LCRH_WLEN_7
;
442 lcr_h
= UART01x_LCRH_WLEN_8
;
445 if (termios
->c_cflag
& CSTOPB
)
446 lcr_h
|= UART01x_LCRH_STP2
;
447 if (termios
->c_cflag
& PARENB
) {
448 lcr_h
|= UART01x_LCRH_PEN
;
449 if (!(termios
->c_cflag
& PARODD
))
450 lcr_h
|= UART01x_LCRH_EPS
;
452 if (port
->fifosize
> 1)
453 lcr_h
|= UART01x_LCRH_FEN
;
455 spin_lock_irqsave(&port
->lock
, flags
);
458 * Update the per-port timeout.
460 uart_update_timeout(port
, termios
->c_cflag
, baud
);
462 port
->read_status_mask
= UART01x_RSR_OE
;
463 if (termios
->c_iflag
& INPCK
)
464 port
->read_status_mask
|= UART01x_RSR_FE
| UART01x_RSR_PE
;
465 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
466 port
->read_status_mask
|= UART01x_RSR_BE
;
469 * Characters to ignore
471 port
->ignore_status_mask
= 0;
472 if (termios
->c_iflag
& IGNPAR
)
473 port
->ignore_status_mask
|= UART01x_RSR_FE
| UART01x_RSR_PE
;
474 if (termios
->c_iflag
& IGNBRK
) {
475 port
->ignore_status_mask
|= UART01x_RSR_BE
;
477 * If we're ignoring parity and break indicators,
478 * ignore overruns too (for real raw support).
480 if (termios
->c_iflag
& IGNPAR
)
481 port
->ignore_status_mask
|= UART01x_RSR_OE
;
485 * Ignore all characters if CREAD is not set.
487 if ((termios
->c_cflag
& CREAD
) == 0)
488 port
->ignore_status_mask
|= UART_DUMMY_RSR_RX
;
490 /* first, disable everything */
491 old_cr
= UART_GET_CR(port
) & ~UART010_CR_MSIE
;
493 if (UART_ENABLE_MS(port
, termios
->c_cflag
))
494 old_cr
|= UART010_CR_MSIE
;
496 UART_PUT_CR(port
, 0);
500 UART_PUT_LCRM(port
, ((quot
& 0xf00) >> 8));
501 UART_PUT_LCRL(port
, (quot
& 0xff));
504 * ----------v----------v----------v----------v-----
505 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
506 * ----------^----------^----------^----------^-----
508 UART_PUT_LCRH(port
, lcr_h
);
509 UART_PUT_CR(port
, old_cr
);
511 spin_unlock_irqrestore(&port
->lock
, flags
);
514 static const char *pl010_type(struct uart_port
*port
)
516 return port
->type
== PORT_AMBA
? "AMBA" : NULL
;
520 * Release the memory region(s) being used by 'port'
522 static void pl010_release_port(struct uart_port
*port
)
524 release_mem_region(port
->mapbase
, UART_PORT_SIZE
);
528 * Request the memory region(s) being used by 'port'
530 static int pl010_request_port(struct uart_port
*port
)
532 return request_mem_region(port
->mapbase
, UART_PORT_SIZE
, "uart-pl010")
533 != NULL
? 0 : -EBUSY
;
537 * Configure/autoconfigure the port.
539 static void pl010_config_port(struct uart_port
*port
, int flags
)
541 if (flags
& UART_CONFIG_TYPE
) {
542 port
->type
= PORT_AMBA
;
543 pl010_request_port(port
);
548 * verify the new serial_struct (for TIOCSSERIAL).
550 static int pl010_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
553 if (ser
->type
!= PORT_UNKNOWN
&& ser
->type
!= PORT_AMBA
)
555 if (ser
->irq
< 0 || ser
->irq
>= NR_IRQS
)
557 if (ser
->baud_base
< 9600)
562 static struct uart_ops amba_pl010_pops
= {
563 .tx_empty
= pl010_tx_empty
,
564 .set_mctrl
= pl010_set_mctrl
,
565 .get_mctrl
= pl010_get_mctrl
,
566 .stop_tx
= pl010_stop_tx
,
567 .start_tx
= pl010_start_tx
,
568 .stop_rx
= pl010_stop_rx
,
569 .enable_ms
= pl010_enable_ms
,
570 .break_ctl
= pl010_break_ctl
,
571 .startup
= pl010_startup
,
572 .shutdown
= pl010_shutdown
,
573 .set_termios
= pl010_set_termios
,
575 .release_port
= pl010_release_port
,
576 .request_port
= pl010_request_port
,
577 .config_port
= pl010_config_port
,
578 .verify_port
= pl010_verify_port
,
581 static struct uart_amba_port amba_ports
[UART_NR
] = {
584 .membase
= (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE
),
585 .mapbase
= INTEGRATOR_UART0_BASE
,
586 .iotype
= SERIAL_IO_MEM
,
590 .ops
= &amba_pl010_pops
,
591 .flags
= ASYNC_BOOT_AUTOCONF
,
599 .membase
= (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE
),
600 .mapbase
= INTEGRATOR_UART1_BASE
,
601 .iotype
= SERIAL_IO_MEM
,
605 .ops
= &amba_pl010_pops
,
606 .flags
= ASYNC_BOOT_AUTOCONF
,
614 #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
617 pl010_console_write(struct console
*co
, const char *s
, unsigned int count
)
619 struct uart_port
*port
= &amba_ports
[co
->index
].port
;
620 unsigned int status
, old_cr
;
624 * First save the CR then disable the interrupts
626 old_cr
= UART_GET_CR(port
);
627 UART_PUT_CR(port
, UART01x_CR_UARTEN
);
630 * Now, do each character
632 for (i
= 0; i
< count
; i
++) {
634 status
= UART_GET_FR(port
);
635 } while (!UART_TX_READY(status
));
636 UART_PUT_CHAR(port
, s
[i
]);
639 status
= UART_GET_FR(port
);
640 } while (!UART_TX_READY(status
));
641 UART_PUT_CHAR(port
, '\r');
646 * Finally, wait for transmitter to become empty
647 * and restore the TCR
650 status
= UART_GET_FR(port
);
651 } while (status
& UART01x_FR_BUSY
);
652 UART_PUT_CR(port
, old_cr
);
656 pl010_console_get_options(struct uart_port
*port
, int *baud
,
657 int *parity
, int *bits
)
659 if (UART_GET_CR(port
) & UART01x_CR_UARTEN
) {
660 unsigned int lcr_h
, quot
;
661 lcr_h
= UART_GET_LCRH(port
);
664 if (lcr_h
& UART01x_LCRH_PEN
) {
665 if (lcr_h
& UART01x_LCRH_EPS
)
671 if ((lcr_h
& 0x60) == UART01x_LCRH_WLEN_7
)
676 quot
= UART_GET_LCRL(port
) | UART_GET_LCRM(port
) << 8;
677 *baud
= port
->uartclk
/ (16 * (quot
+ 1));
681 static int __init
pl010_console_setup(struct console
*co
, char *options
)
683 struct uart_port
*port
;
690 * Check whether an invalid uart number has been specified, and
691 * if so, search for the first available port that does have
694 if (co
->index
>= UART_NR
)
696 port
= &amba_ports
[co
->index
].port
;
699 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
701 pl010_console_get_options(port
, &baud
, &parity
, &bits
);
703 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
706 extern struct uart_driver amba_reg
;
707 static struct console amba_console
= {
709 .write
= pl010_console_write
,
710 .device
= uart_console_device
,
711 .setup
= pl010_console_setup
,
712 .flags
= CON_PRINTBUFFER
,
717 #define AMBA_CONSOLE &amba_console
719 #define AMBA_CONSOLE NULL
722 static struct uart_driver amba_reg
= {
723 .owner
= THIS_MODULE
,
724 .driver_name
= "ttyAM",
726 .major
= SERIAL_AMBA_MAJOR
,
727 .minor
= SERIAL_AMBA_MINOR
,
729 .cons
= AMBA_CONSOLE
,
732 static int pl010_probe(struct amba_device
*dev
, void *id
)
736 for (i
= 0; i
< UART_NR
; i
++) {
737 if (amba_ports
[i
].port
.mapbase
!= dev
->res
.start
)
740 amba_ports
[i
].port
.dev
= &dev
->dev
;
741 uart_add_one_port(&amba_reg
, &amba_ports
[i
].port
);
742 amba_set_drvdata(dev
, &amba_ports
[i
]);
749 static int pl010_remove(struct amba_device
*dev
)
751 struct uart_amba_port
*uap
= amba_get_drvdata(dev
);
754 uart_remove_one_port(&amba_reg
, &uap
->port
);
756 amba_set_drvdata(dev
, NULL
);
761 static int pl010_suspend(struct amba_device
*dev
, u32 state
)
763 struct uart_amba_port
*uap
= amba_get_drvdata(dev
);
766 uart_suspend_port(&amba_reg
, &uap
->port
);
771 static int pl010_resume(struct amba_device
*dev
)
773 struct uart_amba_port
*uap
= amba_get_drvdata(dev
);
776 uart_resume_port(&amba_reg
, &uap
->port
);
781 static struct amba_id pl010_ids
[] __initdata
= {
789 static struct amba_driver pl010_driver
= {
791 .name
= "uart-pl010",
793 .id_table
= pl010_ids
,
794 .probe
= pl010_probe
,
795 .remove
= pl010_remove
,
796 .suspend
= pl010_suspend
,
797 .resume
= pl010_resume
,
800 static int __init
pl010_init(void)
804 printk(KERN_INFO
"Serial: AMBA driver $Revision: 1.41 $\n");
806 ret
= uart_register_driver(&amba_reg
);
808 ret
= amba_driver_register(&pl010_driver
);
810 uart_unregister_driver(&amba_reg
);
815 static void __exit
pl010_exit(void)
817 amba_driver_unregister(&pl010_driver
);
818 uart_unregister_driver(&amba_reg
);
821 module_init(pl010_init
);
822 module_exit(pl010_exit
);
824 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
825 MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $");
826 MODULE_LICENSE("GPL");