drivers/char/rocket.c

   1 /*
   2  * RocketPort device driver for Linux
   3  *
   4  * Written by Theodore Ts'o, 1995, 1996, 1997, 1998, 1999, 2000.
   5  *
   6  * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2003 by Comtrol, Inc.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of the
  11  * License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 /*
  24  * Kernel Synchronization:
  25  *
  26  * This driver has 2 kernel control paths - exception handlers (calls into the driver
  27  * from user mode) and the timer bottom half (tasklet).  This is a polled driver, interrupts
  28  * are not used.
  29  *
  30  * Critical data:
  31  * -  rp_table[], accessed through passed "info" pointers, is a global (static) array of
  32  *    serial port state information and the xmit_buf circular buffer.  Protected by
  33  *    a per port spinlock.
  34  * -  xmit_flags[], an array of ints indexed by line (port) number, indicating that there
  35  *    is data to be transmitted.  Protected by atomic bit operations.
  36  * -  rp_num_ports, int indicating number of open ports, protected by atomic operations.
  37  *
  38  * rp_write() and rp_write_char() functions use a per port semaphore to protect against
  39  * simultaneous access to the same port by more than one process.
  40  */
  41
  42 /****** Defines ******/
  43 #ifdef PCI_NUM_RESOURCES
  44 #define PCI_BASE_ADDRESS(dev, r) ((dev)->resource[r].start)
  45 #else
  46 #define PCI_BASE_ADDRESS(dev, r) ((dev)->base_address[r])
  47 #endif
  48
  49 #define ROCKET_PARANOIA_CHECK
  50 #define ROCKET_DISABLE_SIMUSAGE
  51
  52 #undef ROCKET_SOFT_FLOW
  53 #undef ROCKET_DEBUG_OPEN
  54 #undef ROCKET_DEBUG_INTR
  55 #undef ROCKET_DEBUG_WRITE
  56 #undef ROCKET_DEBUG_FLOW
  57 #undef ROCKET_DEBUG_THROTTLE
  58 #undef ROCKET_DEBUG_WAIT_UNTIL_SENT
  59 #undef ROCKET_DEBUG_RECEIVE
  60 #undef ROCKET_DEBUG_HANGUP
  61 #undef REV_PCI_ORDER
  62 #undef ROCKET_DEBUG_IO
  63
  64 #define POLL_PERIOD HZ/100      /*  Polling period .01 seconds (10ms) */
  65
  66 /****** Kernel includes ******/
  67
  68 #ifdef MODVERSIONS
  69 #include <config/modversions.h>
  70 #endif
  71
  72 #include <linux/module.h>
  73 #include <linux/errno.h>
  74 #include <linux/major.h>
  75 #include <linux/kernel.h>
  76 #include <linux/signal.h>
  77 #include <linux/slab.h>
  78 #include <linux/mm.h>
  79 #include <linux/sched.h>
  80 #include <linux/timer.h>
  81 #include <linux/interrupt.h>
  82 #include <linux/tty.h>
  83 #include <linux/tty_driver.h>
  84 #include <linux/tty_flip.h>
  85 #include <linux/string.h>
  86 #include <linux/fcntl.h>
  87 #include <linux/ptrace.h>
  88 #include <linux/ioport.h>
  89 #include <linux/delay.h>
  90 #include <linux/wait.h>
  91 #include <linux/pci.h>
  92 #include <asm/uaccess.h>
  93 #include <asm/atomic.h>
  94 #include <asm/bitops.h>
  95 #include <linux/spinlock.h>
  96 #include <asm/semaphore.h>
  97 #include <linux/init.h>
  98
  99 /****** RocketPort includes ******/
 100
 101 #include "rocket_int.h"
 102 #include "rocket.h"
 103
 104 #define ROCKET_VERSION "2.09"
 105 #define ROCKET_DATE "12-June-2003"
 106
 107 /****** RocketPort Local Variables ******/
 108
 109 static struct tty_driver *rocket_driver;
 110
 111 static struct rocket_version driver_version = {
 112         ROCKET_VERSION, ROCKET_DATE
 113 };
 114
 115 static struct r_port *rp_table[MAX_RP_PORTS];          /*  The main repository of serial port state information. */
 116 static unsigned int xmit_flags[NUM_BOARDS];            /*  Bit significant, indicates port had data to transmit. */
 117                                                        /*  eg.  Bit 0 indicates port 0 has xmit data, ...        */
 118 static atomic_t rp_num_ports_open;                     /*  Number of serial ports open                           */
 119 static struct timer_list rocket_timer;
 120
 121 static unsigned long board1;                           /* ISA addresses, retrieved from rocketport.conf          */
 122 static unsigned long board2;
 123 static unsigned long board3;
 124 static unsigned long board4;
 125 static unsigned long controller;
 126 static unsigned long support_low_speed;
 127 static unsigned long modem1;
 128 static unsigned long modem2;
 129 static unsigned long modem3;
 130 static unsigned long modem4;
 131 static unsigned long pc104_1[8];
 132 static unsigned long pc104_2[8];
 133 static unsigned long pc104_3[8];
 134 static unsigned long pc104_4[8];
 135 static unsigned long *pc104[4] = { pc104_1, pc104_2, pc104_3, pc104_4 };
 136
 137 static int rp_baud_base[NUM_BOARDS];                   /*  Board config info (Someday make a per-board structure)  */
 138 static unsigned long rcktpt_io_addr[NUM_BOARDS];
 139 static int rcktpt_type[NUM_BOARDS];
 140 static int is_PCI[NUM_BOARDS];
 141 static rocketModel_t rocketModel[NUM_BOARDS];
 142 static int max_board;
 143
 144 /*
 145  * The following arrays define the interrupt bits corresponding to each AIOP.
 146  * These bits are different between the ISA and regular PCI boards and the
 147  * Universal PCI boards.
 148  */
 149
 150 static Word_t aiop_intr_bits[AIOP_CTL_SIZE] = {
 151         AIOP_INTR_BIT_0,
 152         AIOP_INTR_BIT_1,
 153         AIOP_INTR_BIT_2,
 154         AIOP_INTR_BIT_3
 155 };
 156
 157 static Word_t upci_aiop_intr_bits[AIOP_CTL_SIZE] = {
 158         UPCI_AIOP_INTR_BIT_0,
 159         UPCI_AIOP_INTR_BIT_1,
 160         UPCI_AIOP_INTR_BIT_2,
 161         UPCI_AIOP_INTR_BIT_3
 162 };
 163
 164 /*
 165  *  Line number is the ttySIx number (x), the Minor number.  We
 166  *  assign them sequentially, starting at zero.  The following
 167  *  array keeps track of the line number assigned to a given board/aiop/channel.
 168  */
 169 static unsigned char lineNumbers[MAX_RP_PORTS];
 170 static unsigned long nextLineNumber;
 171
 172 /*****  RocketPort Static Prototypes   *********/
 173 static int __init init_ISA(int i);
 174 static void rp_wait_until_sent(struct tty_struct *tty, int timeout);
 175 static void rp_flush_buffer(struct tty_struct *tty);
 176 static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model);
 177 static unsigned char GetLineNumber(int ctrl, int aiop, int ch);
 178 static unsigned char SetLineNumber(int ctrl, int aiop, int ch);
 179 static void rp_start(struct tty_struct *tty);
 180
 181 #ifdef MODULE
 182 MODULE_AUTHOR("Theodore Ts'o");
 183 MODULE_DESCRIPTION("Comtrol RocketPort driver");
 184 MODULE_PARM(board1, "i");
 185 MODULE_PARM_DESC(board1, "I/O port for (ISA) board #1");
 186 MODULE_PARM(board2, "i");
 187 MODULE_PARM_DESC(board2, "I/O port for (ISA) board #2");
 188 MODULE_PARM(board3, "i");
 189 MODULE_PARM_DESC(board3, "I/O port for (ISA) board #3");
 190 MODULE_PARM(board4, "i");
 191 MODULE_PARM_DESC(board4, "I/O port for (ISA) board #4");
 192 MODULE_PARM(controller, "i");
 193 MODULE_PARM_DESC(controller, "I/O port for (ISA) rocketport controller");
 194 MODULE_PARM(support_low_speed, "i");
 195 MODULE_PARM_DESC(support_low_speed, "1 means support 50 baud, 0 means support 460400 baud");
 196 MODULE_PARM(modem1, "i");
 197 MODULE_PARM_DESC(modem1, "1 means (ISA) board #1 is a RocketModem");
 198 MODULE_PARM(modem2, "i");
 199 MODULE_PARM_DESC(modem2, "1 means (ISA) board #2 is a RocketModem");
 200 MODULE_PARM(modem3, "i");
 201 MODULE_PARM_DESC(modem3, "1 means (ISA) board #3 is a RocketModem");
 202 MODULE_PARM(modem4, "i");
 203 MODULE_PARM_DESC(modem4, "1 means (ISA) board #4 is a RocketModem");
 204 MODULE_PARM(pc104_1, "1-8i");
 205 MODULE_PARM_DESC(pc104_1, "set interface types for ISA(PC104) board #1 (e.g. pc104_1=232,232,485,485,...");
 206 MODULE_PARM(pc104_2, "1-8i");
 207 MODULE_PARM_DESC(pc104_2, "set interface types for ISA(PC104) board #2 (e.g. pc104_2=232,232,485,485,...");
 208 MODULE_PARM(pc104_3, "1-8i");
 209 MODULE_PARM_DESC(pc104_3, "set interface types for ISA(PC104) board #3 (e.g. pc104_3=232,232,485,485,...");
 210 MODULE_PARM(pc104_4, "1-8i");
 211 MODULE_PARM_DESC(pc104_4, "set interface types for ISA(PC104) board #4 (e.g. pc104_4=232,232,485,485,...");
 212
 213 int rp_init(void);
 214 static void rp_cleanup_module(void);
 215
 216 module_init(rp_init);
 217 module_exit(rp_cleanup_module);
 218
 219 #endif
 220
 221 #ifdef MODULE_LICENSE
 222 MODULE_LICENSE("Dual BSD/GPL");
 223 #endif
 224
 225 /*************************************************************************/
 226 /*                     Module code starts here                           */
 227
 228 static inline int rocket_paranoia_check(struct r_port *info,
 229                                         const char *routine)
 230 {
 231 #ifdef ROCKET_PARANOIA_CHECK
 232         if (!info)
 233                 return 1;
 234         if (info->magic != RPORT_MAGIC) {
 235                 printk(KERN_INFO "Warning: bad magic number for rocketport struct in %s\n",
 236                      routine);
 237                 return 1;
 238         }
 239 #endif
 240         return 0;
 241 }
 242
 243
 244 /*  Serial port receive data function.  Called (from timer poll) when an AIOPIC signals
 245  *  that receive data is present on a serial port.  Pulls data from FIFO, moves it into the
 246  *  tty layer.
 247  */
 248 static void rp_do_receive(struct r_port *info,
 249                           struct tty_struct *tty,
 250                           CHANNEL_t * cp, unsigned int ChanStatus)
 251 {
 252         unsigned int CharNStat;
 253         int ToRecv, wRecv, space = 0, count;
 254         unsigned char *cbuf;
 255         char *fbuf;
 256         struct tty_ldisc *ld;
 257
 258         ld = tty_ldisc_ref(tty);
 259
 260         ToRecv = sGetRxCnt(cp);
 261         if (ld)
 262                 space = ld->receive_room(tty);
 263         if (space > 2 * TTY_FLIPBUF_SIZE)
 264                 space = 2 * TTY_FLIPBUF_SIZE;
 265         cbuf = tty->flip.char_buf;
 266         fbuf = tty->flip.flag_buf;
 267         count = 0;
 268 #ifdef ROCKET_DEBUG_INTR
 269         printk(KERN_INFO "rp_do_receive(%d, %d)...", ToRecv, space);
 270 #endif
 271
 272         /*
 273          * determine how many we can actually read in.  If we can't
 274          * read any in then we have a software overrun condition.
 275          */
 276         if (ToRecv > space)
 277                 ToRecv = space;
 278
 279         if (ToRecv <= 0)
 280                 return;
 281
 282         /*
 283          * if status indicates there are errored characters in the
 284          * FIFO, then enter status mode (a word in FIFO holds
 285          * character and status).
 286          */
 287         if (ChanStatus & (RXFOVERFL | RXBREAK | RXFRAME | RXPARITY)) {
 288                 if (!(ChanStatus & STATMODE)) {
 289 #ifdef ROCKET_DEBUG_RECEIVE
 290                         printk(KERN_INFO "Entering STATMODE...");
 291 #endif
 292                         ChanStatus |= STATMODE;
 293                         sEnRxStatusMode(cp);
 294                 }
 295         }
 296
 297         /*
 298          * if we previously entered status mode, then read down the
 299          * FIFO one word at a time, pulling apart the character and
 300          * the status.  Update error counters depending on status
 301          */
 302         if (ChanStatus & STATMODE) {
 303 #ifdef ROCKET_DEBUG_RECEIVE
 304                 printk(KERN_INFO "Ignore %x, read %x...", info->ignore_status_mask,
 305                        info->read_status_mask);
 306 #endif
 307                 while (ToRecv) {
 308                         CharNStat = sInW(sGetTxRxDataIO(cp));
 309 #ifdef ROCKET_DEBUG_RECEIVE
 310                         printk(KERN_INFO "%x...", CharNStat);
 311 #endif
 312                         if (CharNStat & STMBREAKH)
 313                                 CharNStat &= ~(STMFRAMEH | STMPARITYH);
 314                         if (CharNStat & info->ignore_status_mask) {
 315                                 ToRecv--;
 316                                 continue;
 317                         }
 318                         CharNStat &= info->read_status_mask;
 319                         if (CharNStat & STMBREAKH)
 320                                 *fbuf++ = TTY_BREAK;
 321                         else if (CharNStat & STMPARITYH)
 322                                 *fbuf++ = TTY_PARITY;
 323                         else if (CharNStat & STMFRAMEH)
 324                                 *fbuf++ = TTY_FRAME;
 325                         else if (CharNStat & STMRCVROVRH)
 326                                 *fbuf++ = TTY_OVERRUN;
 327                         else
 328                                 *fbuf++ = 0;
 329                         *cbuf++ = CharNStat & 0xff;
 330                         count++;
 331                         ToRecv--;
 332                 }
 333
 334                 /*
 335                  * after we've emptied the FIFO in status mode, turn
 336                  * status mode back off
 337                  */
 338                 if (sGetRxCnt(cp) == 0) {
 339 #ifdef ROCKET_DEBUG_RECEIVE
 340                         printk(KERN_INFO "Status mode off.\n");
 341 #endif
 342                         sDisRxStatusMode(cp);
 343                 }
 344         } else {
 345                 /*
 346                  * we aren't in status mode, so read down the FIFO two
 347                  * characters at time by doing repeated word IO
 348                  * transfer.
 349                  */
 350                 wRecv = ToRecv >> 1;
 351                 if (wRecv)
 352                         sInStrW(sGetTxRxDataIO(cp), (unsigned short *) cbuf, wRecv);
 353                 if (ToRecv & 1)
 354                         cbuf[ToRecv - 1] = sInB(sGetTxRxDataIO(cp));
 355                 memset(fbuf, 0, ToRecv);
 356                 cbuf += ToRecv;
 357                 fbuf += ToRecv;
 358                 count += ToRecv;
 359         }
 360         /*  Push the data up to the tty layer */
 361         ld->receive_buf(tty, tty->flip.char_buf, tty->flip.flag_buf, count);
 362         tty_ldisc_deref(ld);
 363 }
 364
 365 /*
 366  *  Serial port transmit data function.  Called from the timer polling loop as a
 367  *  result of a bit set in xmit_flags[], indicating data (from the tty layer) is ready
 368  *  to be sent out the serial port.  Data is buffered in rp_table[line].xmit_buf, it is
 369  *  moved to the port's xmit FIFO.  *info is critical data, protected by spinlocks.
 370  */
 371 static void rp_do_transmit(struct r_port *info)
 372 {
 373         int c;
 374         CHANNEL_t *cp = &info->channel;
 375         struct tty_struct *tty;
 376         unsigned long flags;
 377
 378 #ifdef ROCKET_DEBUG_INTR
 379         printk(KERN_INFO "rp_do_transmit ");
 380 #endif
 381         if (!info)
 382                 return;
 383         if (!info->tty) {
 384                 printk(KERN_INFO  "rp: WARNING rp_do_transmit called with info->tty==NULL\n");
 385                 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 386                 return;
 387         }
 388
 389         spin_lock_irqsave(&info->slock, flags);
 390         tty = info->tty;
 391         info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
 392
 393         /*  Loop sending data to FIFO until done or FIFO full */
 394         while (1) {
 395                 if (tty->stopped || tty->hw_stopped)
 396                         break;
 397                 c = min(info->xmit_fifo_room, min(info->xmit_cnt, XMIT_BUF_SIZE - info->xmit_tail));
 398                 if (c <= 0 || info->xmit_fifo_room <= 0)
 399                         break;
 400                 sOutStrW(sGetTxRxDataIO(cp), (unsigned short *) (info->xmit_buf + info->xmit_tail), c / 2);
 401                 if (c & 1)
 402                         sOutB(sGetTxRxDataIO(cp), info->xmit_buf[info->xmit_tail + c - 1]);
 403                 info->xmit_tail += c;
 404                 info->xmit_tail &= XMIT_BUF_SIZE - 1;
 405                 info->xmit_cnt -= c;
 406                 info->xmit_fifo_room -= c;
 407 #ifdef ROCKET_DEBUG_INTR
 408                 printk(KERN_INFO "tx %d chars...", c);
 409 #endif
 410         }
 411
 412         if (info->xmit_cnt == 0)
 413                 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 414
 415         if (info->xmit_cnt < WAKEUP_CHARS) {
 416                 tty_wakeup(tty);
 417                 wake_up_interruptible(&tty->write_wait);
 418 #ifdef ROCKETPORT_HAVE_POLL_WAIT
 419                 wake_up_interruptible(&tty->poll_wait);
 420 #endif
 421         }
 422
 423         spin_unlock_irqrestore(&info->slock, flags);
 424
 425 #ifdef ROCKET_DEBUG_INTR
 426         printk(KERN_INFO "(%d,%d,%d,%d)...", info->xmit_cnt, info->xmit_head,
 427                info->xmit_tail, info->xmit_fifo_room);
 428 #endif
 429 }
 430
 431 /*
 432  *  Called when a serial port signals it has read data in it's RX FIFO.
 433  *  It checks what interrupts are pending and services them, including
 434  *  receiving serial data.
 435  */
 436 static void rp_handle_port(struct r_port *info)
 437 {
 438         CHANNEL_t *cp;
 439         struct tty_struct *tty;
 440         unsigned int IntMask, ChanStatus;
 441
 442         if (!info)
 443                 return;
 444
 445         if ((info->flags & ROCKET_INITIALIZED) == 0) {
 446                 printk(KERN_INFO "rp: WARNING: rp_handle_port called with info->flags & NOT_INIT\n");
 447                 return;
 448         }
 449         if (!info->tty) {
 450                 printk(KERN_INFO "rp: WARNING: rp_handle_port called with info->tty==NULL\n");
 451                 return;
 452         }
 453         cp = &info->channel;
 454         tty = info->tty;
 455
 456         IntMask = sGetChanIntID(cp) & info->intmask;
 457 #ifdef ROCKET_DEBUG_INTR
 458         printk(KERN_INFO "rp_interrupt %02x...", IntMask);
 459 #endif
 460         ChanStatus = sGetChanStatus(cp);
 461         if (IntMask & RXF_TRIG) {       /* Rx FIFO trigger level */
 462                 rp_do_receive(info, tty, cp, ChanStatus);
 463         }
 464         if (IntMask & DELTA_CD) {       /* CD change  */
 465 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_INTR) || defined(ROCKET_DEBUG_HANGUP))
 466                 printk(KERN_INFO "ttyR%d CD now %s...", info->line,
 467                        (ChanStatus & CD_ACT) ? "on" : "off");
 468 #endif
 469                 if (!(ChanStatus & CD_ACT) && info->cd_status) {
 470 #ifdef ROCKET_DEBUG_HANGUP
 471                         printk(KERN_INFO "CD drop, calling hangup.\n");
 472 #endif
 473                         tty_hangup(tty);
 474                 }
 475                 info->cd_status = (ChanStatus & CD_ACT) ? 1 : 0;
 476                 wake_up_interruptible(&info->open_wait);
 477         }
 478 #ifdef ROCKET_DEBUG_INTR
 479         if (IntMask & DELTA_CTS) {      /* CTS change */
 480                 printk(KERN_INFO "CTS change...\n");
 481         }
 482         if (IntMask & DELTA_DSR) {      /* DSR change */
 483                 printk(KERN_INFO "DSR change...\n");
 484         }
 485 #endif
 486 }
 487
 488 /*
 489  *  The top level polling routine.  Repeats every 1/100 HZ (10ms).
 490  */
 491 static void rp_do_poll(unsigned long dummy)
 492 {
 493         CONTROLLER_t *ctlp;
 494         int ctrl, aiop, ch, line, i;
 495         unsigned int xmitmask;
 496         unsigned int CtlMask;
 497         unsigned char AiopMask;
 498         Word_t bit;
 499
 500         /*  Walk through all the boards (ctrl's) */
 501         for (ctrl = 0; ctrl < max_board; ctrl++) {
 502                 if (rcktpt_io_addr[ctrl] <= 0)
 503                         continue;
 504
 505                 /*  Get a ptr to the board's control struct */
 506                 ctlp = sCtlNumToCtlPtr(ctrl);
 507
 508                 /*  Get the interupt status from the board */
 509 #ifdef CONFIG_PCI
 510                 if (ctlp->BusType == isPCI)
 511                         CtlMask = sPCIGetControllerIntStatus(ctlp);
 512                 else
 513 #endif
 514                         CtlMask = sGetControllerIntStatus(ctlp);
 515
 516                 /*  Check if any AIOP read bits are set */
 517                 for (aiop = 0; CtlMask; aiop++) {
 518                         bit = ctlp->AiopIntrBits[aiop];
 519                         if (CtlMask & bit) {
 520                                 CtlMask &= ~bit;
 521                                 AiopMask = sGetAiopIntStatus(ctlp, aiop);
 522
 523                                 /*  Check if any port read bits are set */
 524                                 for (ch = 0; AiopMask;  AiopMask >>= 1, ch++) {
 525                                         if (AiopMask & 1) {
 526
 527                                                 /*  Get the line number (/dev/ttyRx number). */
 528                                                 /*  Read the data from the port. */
 529                                                 line = GetLineNumber(ctrl, aiop, ch);
 530                                                 rp_handle_port(rp_table[line]);
 531                                         }
 532                                 }
 533                         }
 534                 }
 535
 536                 xmitmask = xmit_flags[ctrl];
 537
 538                 /*
 539                  *  xmit_flags contains bit-significant flags, indicating there is data
 540                  *  to xmit on the port. Bit 0 is port 0 on this board, bit 1 is port
 541                  *  1, ... (32 total possible).  The variable i has the aiop and ch
 542                  *  numbers encoded in it (port 0-7 are aiop0, 8-15 are aiop1, etc).
 543                  */
 544                 if (xmitmask) {
 545                         for (i = 0; i < rocketModel[ctrl].numPorts; i++) {
 546                                 if (xmitmask & (1 << i)) {
 547                                         aiop = (i & 0x18) >> 3;
 548                                         ch = i & 0x07;
 549                                         line = GetLineNumber(ctrl, aiop, ch);
 550                                         rp_do_transmit(rp_table[line]);
 551                                 }
 552                         }
 553                 }
 554         }
 555
 556         /*
 557          * Reset the timer so we get called at the next clock tick (10ms).
 558          */
 559         if (atomic_read(&rp_num_ports_open))
 560                 mod_timer(&rocket_timer, jiffies + POLL_PERIOD);
 561 }
 562
 563 /*
 564  *  Initializes the r_port structure for a port, as well as enabling the port on
 565  *  the board.
 566  *  Inputs:  board, aiop, chan numbers
 567  */
 568 static void init_r_port(int board, int aiop, int chan, struct pci_dev *pci_dev)
 569 {
 570         unsigned rocketMode;
 571         struct r_port *info;
 572         int line;
 573         CONTROLLER_T *ctlp;
 574
 575         /*  Get the next available line number */
 576         line = SetLineNumber(board, aiop, chan);
 577
 578         ctlp = sCtlNumToCtlPtr(board);
 579
 580         /*  Get a r_port struct for the port, fill it in and save it globally, indexed by line number */
 581         info = kmalloc(sizeof (struct r_port), GFP_KERNEL);
 582         if (!info) {
 583                 printk(KERN_INFO "Couldn't allocate info struct for line #%d\n", line);
 584                 return;
 585         }
 586         memset(info, 0, sizeof (struct r_port));
 587
 588         info->magic = RPORT_MAGIC;
 589         info->line = line;
 590         info->ctlp = ctlp;
 591         info->board = board;
 592         info->aiop = aiop;
 593         info->chan = chan;
 594         info->closing_wait = 3000;
 595         info->close_delay = 50;
 596         init_waitqueue_head(&info->open_wait);
 597         init_waitqueue_head(&info->close_wait);
 598         info->flags &= ~ROCKET_MODE_MASK;
 599         switch (pc104[board][line]) {
 600         case 422:
 601                 info->flags |= ROCKET_MODE_RS422;
 602                 break;
 603         case 485:
 604                 info->flags |= ROCKET_MODE_RS485;
 605                 break;
 606         case 232:
 607         default:
 608                 info->flags |= ROCKET_MODE_RS232;
 609                 break;
 610         }
 611
 612         info->intmask = RXF_TRIG | TXFIFO_MT | SRC_INT | DELTA_CD | DELTA_CTS | DELTA_DSR;
 613         if (sInitChan(ctlp, &info->channel, aiop, chan) == 0) {
 614                 printk(KERN_INFO "RocketPort sInitChan(%d, %d, %d) failed!\n", board, aiop, chan);
 615                 kfree(info);
 616                 return;
 617         }
 618
 619         rocketMode = info->flags & ROCKET_MODE_MASK;
 620
 621         if ((info->flags & ROCKET_RTS_TOGGLE) || (rocketMode == ROCKET_MODE_RS485))
 622                 sEnRTSToggle(&info->channel);
 623         else
 624                 sDisRTSToggle(&info->channel);
 625
 626         if (ctlp->boardType == ROCKET_TYPE_PC104) {
 627                 switch (rocketMode) {
 628                 case ROCKET_MODE_RS485:
 629                         sSetInterfaceMode(&info->channel, InterfaceModeRS485);
 630                         break;
 631                 case ROCKET_MODE_RS422:
 632                         sSetInterfaceMode(&info->channel, InterfaceModeRS422);
 633                         break;
 634                 case ROCKET_MODE_RS232:
 635                 default:
 636                         if (info->flags & ROCKET_RTS_TOGGLE)
 637                                 sSetInterfaceMode(&info->channel, InterfaceModeRS232T);
 638                         else
 639                                 sSetInterfaceMode(&info->channel, InterfaceModeRS232);
 640                         break;
 641                 }
 642         }
 643         spin_lock_init(&info->slock);
 644         sema_init(&info->write_sem, 1);
 645         rp_table[line] = info;
 646         if (pci_dev)
 647                 tty_register_device(rocket_driver, line, &pci_dev->dev);
 648 }
 649
 650 /*
 651  *  Configures a rocketport port according to its termio settings.  Called from
 652  *  user mode into the driver (exception handler).  *info CD manipulation is spinlock protected.
 653  */
 654 static void configure_r_port(struct r_port *info,
 655                              struct termios *old_termios)
 656 {
 657         unsigned cflag;
 658         unsigned long flags;
 659         unsigned rocketMode;
 660         int bits, baud, divisor;
 661         CHANNEL_t *cp;
 662
 663         if (!info->tty || !info->tty->termios)
 664                 return;
 665         cp = &info->channel;
 666         cflag = info->tty->termios->c_cflag;
 667
 668         /* Byte size and parity */
 669         if ((cflag & CSIZE) == CS8) {
 670                 sSetData8(cp);
 671                 bits = 10;
 672         } else {
 673                 sSetData7(cp);
 674                 bits = 9;
 675         }
 676         if (cflag & CSTOPB) {
 677                 sSetStop2(cp);
 678                 bits++;
 679         } else {
 680                 sSetStop1(cp);
 681         }
 682
 683         if (cflag & PARENB) {
 684                 sEnParity(cp);
 685                 bits++;
 686                 if (cflag & PARODD) {
 687                         sSetOddParity(cp);
 688                 } else {
 689                         sSetEvenParity(cp);
 690                 }
 691         } else {
 692                 sDisParity(cp);
 693         }
 694
 695         /* baud rate */
 696         baud = tty_get_baud_rate(info->tty);
 697         if (!baud)
 698                 baud = 9600;
 699         divisor = ((rp_baud_base[info->board] + (baud >> 1)) / baud) - 1;
 700         if ((divisor >= 8192 || divisor < 0) && old_termios) {
 701                 info->tty->termios->c_cflag &= ~CBAUD;
 702                 info->tty->termios->c_cflag |=
 703                     (old_termios->c_cflag & CBAUD);
 704                 baud = tty_get_baud_rate(info->tty);
 705                 if (!baud)
 706                         baud = 9600;
 707                 divisor = (rp_baud_base[info->board] / baud) - 1;
 708         }
 709         if (divisor >= 8192 || divisor < 0) {
 710                 baud = 9600;
 711                 divisor = (rp_baud_base[info->board] / baud) - 1;
 712         }
 713         info->cps = baud / bits;
 714         sSetBaud(cp, divisor);
 715
 716         if (cflag & CRTSCTS) {
 717                 info->intmask |= DELTA_CTS;
 718                 sEnCTSFlowCtl(cp);
 719         } else {
 720                 info->intmask &= ~DELTA_CTS;
 721                 sDisCTSFlowCtl(cp);
 722         }
 723         if (cflag & CLOCAL) {
 724                 info->intmask &= ~DELTA_CD;
 725         } else {
 726                 spin_lock_irqsave(&info->slock, flags);
 727                 if (sGetChanStatus(cp) & CD_ACT)
 728                         info->cd_status = 1;
 729                 else
 730                         info->cd_status = 0;
 731                 info->intmask |= DELTA_CD;
 732                 spin_unlock_irqrestore(&info->slock, flags);
 733         }
 734
 735         /*
 736          * Handle software flow control in the board
 737          */
 738 #ifdef ROCKET_SOFT_FLOW
 739         if (I_IXON(info->tty)) {
 740                 sEnTxSoftFlowCtl(cp);
 741                 if (I_IXANY(info->tty)) {
 742                         sEnIXANY(cp);
 743                 } else {
 744                         sDisIXANY(cp);
 745                 }
 746                 sSetTxXONChar(cp, START_CHAR(info->tty));
 747                 sSetTxXOFFChar(cp, STOP_CHAR(info->tty));
 748         } else {
 749                 sDisTxSoftFlowCtl(cp);
 750                 sDisIXANY(cp);
 751                 sClrTxXOFF(cp);
 752         }
 753 #endif
 754
 755         /*
 756          * Set up ignore/read mask words
 757          */
 758         info->read_status_mask = STMRCVROVRH | 0xFF;
 759         if (I_INPCK(info->tty))
 760                 info->read_status_mask |= STMFRAMEH | STMPARITYH;
 761         if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
 762                 info->read_status_mask |= STMBREAKH;
 763
 764         /*
 765          * Characters to ignore
 766          */
 767         info->ignore_status_mask = 0;
 768         if (I_IGNPAR(info->tty))
 769                 info->ignore_status_mask |= STMFRAMEH | STMPARITYH;
 770         if (I_IGNBRK(info->tty)) {
 771                 info->ignore_status_mask |= STMBREAKH;
 772                 /*
 773                  * If we're ignoring parity and break indicators,
 774                  * ignore overruns too.  (For real raw support).
 775                  */
 776                 if (I_IGNPAR(info->tty))
 777                         info->ignore_status_mask |= STMRCVROVRH;
 778         }
 779
 780         rocketMode = info->flags & ROCKET_MODE_MASK;
 781
 782         if ((info->flags & ROCKET_RTS_TOGGLE)
 783             || (rocketMode == ROCKET_MODE_RS485))
 784                 sEnRTSToggle(cp);
 785         else
 786                 sDisRTSToggle(cp);
 787
 788         sSetRTS(&info->channel);
 789
 790         if (cp->CtlP->boardType == ROCKET_TYPE_PC104) {
 791                 switch (rocketMode) {
 792                 case ROCKET_MODE_RS485:
 793                         sSetInterfaceMode(cp, InterfaceModeRS485);
 794                         break;
 795                 case ROCKET_MODE_RS422:
 796                         sSetInterfaceMode(cp, InterfaceModeRS422);
 797                         break;
 798                 case ROCKET_MODE_RS232:
 799                 default:
 800                         if (info->flags & ROCKET_RTS_TOGGLE)
 801                                 sSetInterfaceMode(cp, InterfaceModeRS232T);
 802                         else
 803                                 sSetInterfaceMode(cp, InterfaceModeRS232);
 804                         break;
 805                 }
 806         }
 807 }
 808
 809 /*  info->count is considered critical, protected by spinlocks.  */
 810 static int block_til_ready(struct tty_struct *tty, struct file *filp,
 811                            struct r_port *info)
 812 {
 813         DECLARE_WAITQUEUE(wait, current);
 814         int retval;
 815         int do_clocal = 0, extra_count = 0;
 816         unsigned long flags;
 817
 818         /*
 819          * If the device is in the middle of being closed, then block
 820          * until it's done, and then try again.
 821          */
 822         if (tty_hung_up_p(filp))
 823                 return ((info->flags & ROCKET_HUP_NOTIFY) ? -EAGAIN : -ERESTARTSYS);
 824         if (info->flags & ROCKET_CLOSING) {
 825                 interruptible_sleep_on(&info->close_wait);
 826                 return ((info->flags & ROCKET_HUP_NOTIFY) ? -EAGAIN : -ERESTARTSYS);
 827         }
 828
 829         /*
 830          * If non-blocking mode is set, or the port is not enabled,
 831          * then make the check up front and then exit.
 832          */
 833         if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
 834                 info->flags |= ROCKET_NORMAL_ACTIVE;
 835                 return 0;
 836         }
 837         if (tty->termios->c_cflag & CLOCAL)
 838                 do_clocal = 1;
 839
 840         /*
 841          * Block waiting for the carrier detect and the line to become free.  While we are in
 842          * this loop, info->count is dropped by one, so that rp_close() knows when to free things.
 843          * We restore it upon exit, either normal or abnormal.
 844          */
 845         retval = 0;
 846         add_wait_queue(&info->open_wait, &wait);
 847 #ifdef ROCKET_DEBUG_OPEN
 848         printk(KERN_INFO "block_til_ready before block: ttyR%d, count = %d\n", info->line, info->count);
 849 #endif
 850         spin_lock_irqsave(&info->slock, flags);
 851
 852 #ifdef ROCKET_DISABLE_SIMUSAGE
 853         info->flags |= ROCKET_NORMAL_ACTIVE;
 854 #else
 855         if (!tty_hung_up_p(filp)) {
 856                 extra_count = 1;
 857                 info->count--;
 858         }
 859 #endif
 860         info->blocked_open++;
 861
 862         spin_unlock_irqrestore(&info->slock, flags);
 863
 864         while (1) {
 865                 if (tty->termios->c_cflag & CBAUD) {
 866                         sSetDTR(&info->channel);
 867                         sSetRTS(&info->channel);
 868                 }
 869                 set_current_state(TASK_INTERRUPTIBLE);
 870                 if (tty_hung_up_p(filp) || !(info->flags & ROCKET_INITIALIZED)) {
 871                         if (info->flags & ROCKET_HUP_NOTIFY)
 872                                 retval = -EAGAIN;
 873                         else
 874                                 retval = -ERESTARTSYS;
 875                         break;
 876                 }
 877                 if (!(info->flags & ROCKET_CLOSING) && (do_clocal || (sGetChanStatusLo(&info->channel) & CD_ACT)))
 878                         break;
 879                 if (signal_pending(current)) {
 880                         retval = -ERESTARTSYS;
 881                         break;
 882                 }
 883 #ifdef ROCKET_DEBUG_OPEN
 884                 printk(KERN_INFO "block_til_ready blocking: ttyR%d, count = %d, flags=0x%0x\n",
 885                      info->line, info->count, info->flags);
 886 #endif
 887                 schedule();     /*  Don't hold spinlock here, will hang PC */
 888         }
 889         current->state = TASK_RUNNING;
 890         remove_wait_queue(&info->open_wait, &wait);
 891
 892         spin_lock_irqsave(&info->slock, flags);
 893
 894         if (extra_count)
 895                 info->count++;
 896         info->blocked_open--;
 897
 898         spin_unlock_irqrestore(&info->slock, flags);
 899
 900 #ifdef ROCKET_DEBUG_OPEN
 901         printk(KERN_INFO "block_til_ready after blocking: ttyR%d, count = %d\n",
 902                info->line, info->count);
 903 #endif
 904         if (retval)
 905                 return retval;
 906         info->flags |= ROCKET_NORMAL_ACTIVE;
 907         return 0;
 908 }
 909
 910 /*
 911  *  Exception handler that opens a serial port.  Creates xmit_buf storage, fills in
 912  *  port's r_port struct.  Initializes the port hardware.
 913  */
 914 static int rp_open(struct tty_struct *tty, struct file *filp)
 915 {
 916         struct r_port *info;
 917         int line = 0, retval;
 918         CHANNEL_t *cp;
 919         unsigned long page;
 920
 921         line = TTY_GET_LINE(tty);
 922         if ((line < 0) || (line >= MAX_RP_PORTS) || ((info = rp_table[line]) == NULL))
 923                 return -ENXIO;
 924
 925         page = __get_free_page(GFP_KERNEL);
 926         if (!page)
 927                 return -ENOMEM;
 928
 929         if (info->flags & ROCKET_CLOSING) {
 930                 interruptible_sleep_on(&info->close_wait);
 931                 free_page(page);
 932                 return ((info->flags & ROCKET_HUP_NOTIFY) ? -EAGAIN : -ERESTARTSYS);
 933         }
 934
 935         /*
 936          * We must not sleep from here until the port is marked fully in use.
 937          */
 938         if (info->xmit_buf)
 939                 free_page(page);
 940         else
 941                 info->xmit_buf = (unsigned char *) page;
 942
 943         tty->driver_data = info;
 944         info->tty = tty;
 945
 946         if (info->count++ == 0) {
 947                 atomic_inc(&rp_num_ports_open);
 948
 949 #ifdef ROCKET_DEBUG_OPEN
 950                 printk(KERN_INFO "rocket mod++ = %d...", atomic_read(&rp_num_ports_open));
 951 #endif
 952         }
 953 #ifdef ROCKET_DEBUG_OPEN
 954         printk(KERN_INFO "rp_open ttyR%d, count=%d\n", info->line, info->count);
 955 #endif
 956
 957         /*
 958          * Info->count is now 1; so it's safe to sleep now.
 959          */
 960         info->session = current->signal->session;
 961         info->pgrp = process_group(current);
 962
 963         if ((info->flags & ROCKET_INITIALIZED) == 0) {
 964                 cp = &info->channel;
 965                 sSetRxTrigger(cp, TRIG_1);
 966                 if (sGetChanStatus(cp) & CD_ACT)
 967                         info->cd_status = 1;
 968                 else
 969                         info->cd_status = 0;
 970                 sDisRxStatusMode(cp);
 971                 sFlushRxFIFO(cp);
 972                 sFlushTxFIFO(cp);
 973
 974                 sEnInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
 975                 sSetRxTrigger(cp, TRIG_1);
 976
 977                 sGetChanStatus(cp);
 978                 sDisRxStatusMode(cp);
 979                 sClrTxXOFF(cp);
 980
 981                 sDisCTSFlowCtl(cp);
 982                 sDisTxSoftFlowCtl(cp);
 983
 984                 sEnRxFIFO(cp);
 985                 sEnTransmit(cp);
 986
 987                 info->flags |= ROCKET_INITIALIZED;
 988
 989                 /*
 990                  * Set up the tty->alt_speed kludge
 991                  */
 992                 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_HI)
 993                         info->tty->alt_speed = 57600;
 994                 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_VHI)
 995                         info->tty->alt_speed = 115200;
 996                 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_SHI)
 997                         info->tty->alt_speed = 230400;
 998                 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_WARP)
 999                         info->tty->alt_speed = 460800;
1000
1001                 configure_r_port(info, NULL);
1002                 if (tty->termios->c_cflag & CBAUD) {
1003                         sSetDTR(cp);
1004                         sSetRTS(cp);
1005                 }
1006         }
1007         /*  Starts (or resets) the maint polling loop */
1008         mod_timer(&rocket_timer, jiffies + POLL_PERIOD);
1009
1010         retval = block_til_ready(tty, filp, info);
1011         if (retval) {
1012 #ifdef ROCKET_DEBUG_OPEN
1013                 printk(KERN_INFO "rp_open returning after block_til_ready with %d\n", retval);
1014 #endif
1015                 return retval;
1016         }
1017         return 0;
1018 }
1019
1020 /*
1021  *  Exception handler that closes a serial port. info->count is considered critical.
1022  */
1023 static void rp_close(struct tty_struct *tty, struct file *filp)
1024 {
1025         struct r_port *info = (struct r_port *) tty->driver_data;
1026         unsigned long flags;
1027         int timeout;
1028         CHANNEL_t *cp;
1029
1030         if (rocket_paranoia_check(info, "rp_close"))
1031                 return;
1032
1033 #ifdef ROCKET_DEBUG_OPEN
1034         printk(KERN_INFO "rp_close ttyR%d, count = %d\n", info->line, info->count);
1035 #endif
1036
1037         if (tty_hung_up_p(filp))
1038                 return;
1039         spin_lock_irqsave(&info->slock, flags);
1040
1041         if ((tty->count == 1) && (info->count != 1)) {
1042                 /*
1043                  * Uh, oh.  tty->count is 1, which means that the tty
1044                  * structure will be freed.  Info->count should always
1045                  * be one in these conditions.  If it's greater than
1046                  * one, we've got real problems, since it means the
1047                  * serial port won't be shutdown.
1048                  */
1049                 printk(KERN_INFO "rp_close: bad serial port count; tty->count is 1, "
1050                        "info->count is %d\n", info->count);
1051                 info->count = 1;
1052         }
1053         if (--info->count < 0) {
1054                 printk(KERN_INFO "rp_close: bad serial port count for ttyR%d: %d\n",
1055                        info->line, info->count);
1056                 info->count = 0;
1057         }
1058         if (info->count) {
1059                 spin_unlock_irqrestore(&info->slock, flags);
1060                 return;
1061         }
1062         info->flags |= ROCKET_CLOSING;
1063         spin_unlock_irqrestore(&info->slock, flags);
1064
1065         cp = &info->channel;
1066
1067         /*
1068          * Notify the line discpline to only process XON/XOFF characters
1069          */
1070         tty->closing = 1;
1071
1072         /*
1073          * If transmission was throttled by the application request,
1074          * just flush the xmit buffer.
1075          */
1076         if (tty->flow_stopped)
1077                 rp_flush_buffer(tty);
1078
1079         /*
1080          * Wait for the transmit buffer to clear
1081          */
1082         if (info->closing_wait != ROCKET_CLOSING_WAIT_NONE)
1083                 tty_wait_until_sent(tty, info->closing_wait);
1084         /*
1085          * Before we drop DTR, make sure the UART transmitter
1086          * has completely drained; this is especially
1087          * important if there is a transmit FIFO!
1088          */
1089         timeout = (sGetTxCnt(cp) + 1) * HZ / info->cps;
1090         if (timeout == 0)
1091                 timeout = 1;
1092         rp_wait_until_sent(tty, timeout);
1093         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1094
1095         sDisTransmit(cp);
1096         sDisInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
1097         sDisCTSFlowCtl(cp);
1098         sDisTxSoftFlowCtl(cp);
1099         sClrTxXOFF(cp);
1100         sFlushRxFIFO(cp);
1101         sFlushTxFIFO(cp);
1102         sClrRTS(cp);
1103         if (C_HUPCL(tty))
1104                 sClrDTR(cp);
1105
1106         if (TTY_DRIVER_FLUSH_BUFFER_EXISTS(tty))
1107                 TTY_DRIVER_FLUSH_BUFFER(tty);
1108
1109         tty_ldisc_flush(tty);
1110
1111         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1112
1113         if (info->blocked_open) {
1114                 if (info->close_delay) {
1115                         current->state = TASK_INTERRUPTIBLE;
1116                         schedule_timeout(info->close_delay);
1117                 }
1118                 wake_up_interruptible(&info->open_wait);
1119         } else {
1120                 if (info->xmit_buf) {
1121                         free_page((unsigned long) info->xmit_buf);
1122                         info->xmit_buf = NULL;
1123                 }
1124         }
1125         info->flags &= ~(ROCKET_INITIALIZED | ROCKET_CLOSING | ROCKET_NORMAL_ACTIVE);
1126         tty->closing = 0;
1127         wake_up_interruptible(&info->close_wait);
1128         atomic_dec(&rp_num_ports_open);
1129
1130 #ifdef ROCKET_DEBUG_OPEN
1131         printk(KERN_INFO "rocket mod-- = %d...", atomic_read(&rp_num_ports_open));
1132         printk(KERN_INFO "rp_close ttyR%d complete shutdown\n", info->line);
1133 #endif
1134
1135 }
1136
1137 static void rp_set_termios(struct tty_struct *tty,
1138                            struct termios *old_termios)
1139 {
1140         struct r_port *info = (struct r_port *) tty->driver_data;
1141         CHANNEL_t *cp;
1142         unsigned cflag;
1143
1144         if (rocket_paranoia_check(info, "rp_set_termios"))
1145                 return;
1146
1147         cflag = tty->termios->c_cflag;
1148
1149         if (cflag == old_termios->c_cflag)
1150                 return;
1151
1152         /*
1153          * This driver doesn't support CS5 or CS6
1154          */
1155         if (((cflag & CSIZE) == CS5) || ((cflag & CSIZE) == CS6))
1156                 tty->termios->c_cflag =
1157                     ((cflag & ~CSIZE) | (old_termios->c_cflag & CSIZE));
1158
1159         configure_r_port(info, old_termios);
1160
1161         cp = &info->channel;
1162
1163         /* Handle transition to B0 status */
1164         if ((old_termios->c_cflag & CBAUD) && !(tty->termios->c_cflag & CBAUD)) {
1165                 sClrDTR(cp);
1166                 sClrRTS(cp);
1167         }
1168
1169         /* Handle transition away from B0 status */
1170         if (!(old_termios->c_cflag & CBAUD) && (tty->termios->c_cflag & CBAUD)) {
1171                 if (!tty->hw_stopped || !(tty->termios->c_cflag & CRTSCTS))
1172                         sSetRTS(cp);
1173                 sSetDTR(cp);
1174         }
1175
1176         if ((old_termios->c_cflag & CRTSCTS) && !(tty->termios->c_cflag & CRTSCTS)) {
1177                 tty->hw_stopped = 0;
1178                 rp_start(tty);
1179         }
1180 }
1181
1182 static void rp_break(struct tty_struct *tty, int break_state)
1183 {
1184         struct r_port *info = (struct r_port *) tty->driver_data;
1185         unsigned long flags;
1186
1187         if (rocket_paranoia_check(info, "rp_break"))
1188                 return;
1189
1190         spin_lock_irqsave(&info->slock, flags);
1191         if (break_state == -1)
1192                 sSendBreak(&info->channel);
1193         else
1194                 sClrBreak(&info->channel);
1195         spin_unlock_irqrestore(&info->slock, flags);
1196 }
1197
1198 /*
1199  * sGetChanRI used to be a macro in rocket_int.h. When the functionality for
1200  * the UPCI boards was added, it was decided to make this a function because
1201  * the macro was getting too complicated. All cases except the first one
1202  * (UPCIRingInd) are taken directly from the original macro.
1203  */
1204 static int sGetChanRI(CHANNEL_T * ChP)
1205 {
1206         CONTROLLER_t *CtlP = ChP->CtlP;
1207         int ChanNum = ChP->ChanNum;
1208         int RingInd = 0;
1209
1210         if (CtlP->UPCIRingInd)
1211                 RingInd = !(sInB(CtlP->UPCIRingInd) & sBitMapSetTbl[ChanNum]);
1212         else if (CtlP->AltChanRingIndicator)
1213                 RingInd = sInB((ByteIO_t) (ChP->ChanStat + 8)) & DSR_ACT;
1214         else if (CtlP->boardType == ROCKET_TYPE_PC104)
1215                 RingInd = !(sInB(CtlP->AiopIO[3]) & sBitMapSetTbl[ChanNum]);
1216
1217         return RingInd;
1218 }
1219
1220 /********************************************************************************************/
1221 /*  Here are the routines used by rp_ioctl.  These are all called from exception handlers.  */
1222
1223 /*
1224  *  Returns the state of the serial modem control lines.  These next 2 functions
1225  *  are the way kernel versions > 2.5 handle modem control lines rather than IOCTLs.
1226  */
1227 static int rp_tiocmget(struct tty_struct *tty, struct file *file)
1228 {
1229         struct r_port *info = (struct r_port *)tty->driver_data;
1230         unsigned int control, result, ChanStatus;
1231
1232         ChanStatus = sGetChanStatusLo(&info->channel);
1233         control = info->channel.TxControl[3];
1234         result = ((control & SET_RTS) ? TIOCM_RTS : 0) |
1235                 ((control & SET_DTR) ?  TIOCM_DTR : 0) |
1236                 ((ChanStatus & CD_ACT) ? TIOCM_CAR : 0) |
1237                 (sGetChanRI(&info->channel) ? TIOCM_RNG : 0) |
1238                 ((ChanStatus & DSR_ACT) ? TIOCM_DSR : 0) |
1239                 ((ChanStatus & CTS_ACT) ? TIOCM_CTS : 0);
1240
1241         return result;
1242 }
1243
1244 /*
1245  *  Sets the modem control lines
1246  */
1247 static int rp_tiocmset(struct tty_struct *tty, struct file *file,
1248                     unsigned int set, unsigned int clear)
1249 {
1250         struct r_port *info = (struct r_port *)tty->driver_data;
1251
1252         if (set & TIOCM_RTS)
1253                 info->channel.TxControl[3] |= SET_RTS;
1254         if (set & TIOCM_DTR)
1255                 info->channel.TxControl[3] |= SET_DTR;
1256         if (clear & TIOCM_RTS)
1257                 info->channel.TxControl[3] &= ~SET_RTS;
1258         if (clear & TIOCM_DTR)
1259                 info->channel.TxControl[3] &= ~SET_DTR;
1260
1261         sOutDW(info->channel.IndexAddr, *(DWord_t *) & (info->channel.TxControl[0]));
1262         return 0;
1263 }
1264
1265 static int get_config(struct r_port *info, struct rocket_config __user *retinfo)
1266 {
1267         struct rocket_config tmp;
1268
1269         if (!retinfo)
1270                 return -EFAULT;
1271         memset(&tmp, 0, sizeof (tmp));
1272         tmp.line = info->line;
1273         tmp.flags = info->flags;
1274         tmp.close_delay = info->close_delay;
1275         tmp.closing_wait = info->closing_wait;
1276         tmp.port = rcktpt_io_addr[(info->line >> 5) & 3];
1277
1278         if (copy_to_user(retinfo, &tmp, sizeof (*retinfo)))
1279                 return -EFAULT;
1280         return 0;
1281 }
1282
1283 static int set_config(struct r_port *info, struct rocket_config __user *new_info)
1284 {
1285         struct rocket_config new_serial;
1286
1287         if (copy_from_user(&new_serial, new_info, sizeof (new_serial)))
1288                 return -EFAULT;
1289
1290         if (!capable(CAP_SYS_ADMIN))
1291         {
1292                 if ((new_serial.flags & ~ROCKET_USR_MASK) != (info->flags & ~ROCKET_USR_MASK))
1293                         return -EPERM;
1294                 info->flags = ((info->flags & ~ROCKET_USR_MASK) | (new_serial.flags & ROCKET_USR_MASK));
1295                 configure_r_port(info, NULL);
1296                 return 0;
1297         }
1298
1299         info->flags = ((info->flags & ~ROCKET_FLAGS) | (new_serial.flags & ROCKET_FLAGS));
1300         info->close_delay = new_serial.close_delay;
1301         info->closing_wait = new_serial.closing_wait;
1302
1303         if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_HI)
1304                 info->tty->alt_speed = 57600;
1305         if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_VHI)
1306                 info->tty->alt_speed = 115200;
1307         if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_SHI)
1308                 info->tty->alt_speed = 230400;
1309         if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_WARP)
1310                 info->tty->alt_speed = 460800;
1311
1312         configure_r_port(info, NULL);
1313         return 0;
1314 }
1315
1316 /*
1317  *  This function fills in a rocket_ports struct with information
1318  *  about what boards/ports are in the system.  This info is passed
1319  *  to user space.  See setrocket.c where the info is used to create
1320  *  the /dev/ttyRx ports.
1321  */
1322 static int get_ports(struct r_port *info, struct rocket_ports __user *retports)
1323 {
1324         struct rocket_ports tmp;
1325         int board;
1326
1327         if (!retports)
1328                 return -EFAULT;
1329         memset(&tmp, 0, sizeof (tmp));
1330         tmp.tty_major = rocket_driver->major;
1331
1332         for (board = 0; board < 4; board++) {
1333                 tmp.rocketModel[board].model = rocketModel[board].model;
1334                 strcpy(tmp.rocketModel[board].modelString, rocketModel[board].modelString);
1335                 tmp.rocketModel[board].numPorts = rocketModel[board].numPorts;
1336                 tmp.rocketModel[board].loadrm2 = rocketModel[board].loadrm2;
1337                 tmp.rocketModel[board].startingPortNumber = rocketModel[board].startingPortNumber;
1338         }
1339         if (copy_to_user(retports, &tmp, sizeof (*retports)))
1340                 return -EFAULT;
1341         return 0;
1342 }
1343
1344 static int reset_rm2(struct r_port *info, void __user *arg)
1345 {
1346         int reset;
1347
1348         if (copy_from_user(&reset, arg, sizeof (int)))
1349                 return -EFAULT;
1350         if (reset)
1351                 reset = 1;
1352
1353         if (rcktpt_type[info->board] != ROCKET_TYPE_MODEMII &&
1354             rcktpt_type[info->board] != ROCKET_TYPE_MODEMIII)
1355                 return -EINVAL;
1356
1357         if (info->ctlp->BusType == isISA)
1358                 sModemReset(info->ctlp, info->chan, reset);
1359         else
1360                 sPCIModemReset(info->ctlp, info->chan, reset);
1361
1362         return 0;
1363 }
1364
1365 static int get_version(struct r_port *info, struct rocket_version __user *retvers)
1366 {
1367         if (copy_to_user(retvers, &driver_version, sizeof (*retvers)))
1368                 return -EFAULT;
1369         return 0;
1370 }
1371
1372 /*  IOCTL call handler into the driver */
1373 static int rp_ioctl(struct tty_struct *tty, struct file *file,
1374                     unsigned int cmd, unsigned long arg)
1375 {
1376         struct r_port *info = (struct r_port *) tty->driver_data;
1377         void __user *argp = (void __user *)arg;
1378
1379         if (cmd != RCKP_GET_PORTS && rocket_paranoia_check(info, "rp_ioctl"))
1380                 return -ENXIO;
1381
1382         switch (cmd) {
1383         case RCKP_GET_STRUCT:
1384                 if (copy_to_user(argp, info, sizeof (struct r_port)))
1385                         return -EFAULT;
1386                 return 0;
1387         case RCKP_GET_CONFIG:
1388                 return get_config(info, argp);
1389         case RCKP_SET_CONFIG:
1390                 return set_config(info, argp);
1391         case RCKP_GET_PORTS:
1392                 return get_ports(info, argp);
1393         case RCKP_RESET_RM2:
1394                 return reset_rm2(info, argp);
1395         case RCKP_GET_VERSION:
1396                 return get_version(info, argp);
1397         default:
1398                 return -ENOIOCTLCMD;
1399         }
1400         return 0;
1401 }
1402
1403 static void rp_send_xchar(struct tty_struct *tty, char ch)
1404 {
1405         struct r_port *info = (struct r_port *) tty->driver_data;
1406         CHANNEL_t *cp;
1407
1408         if (rocket_paranoia_check(info, "rp_send_xchar"))
1409                 return;
1410
1411         cp = &info->channel;
1412         if (sGetTxCnt(cp))
1413                 sWriteTxPrioByte(cp, ch);
1414         else
1415                 sWriteTxByte(sGetTxRxDataIO(cp), ch);
1416 }
1417
1418 static void rp_throttle(struct tty_struct *tty)
1419 {
1420         struct r_port *info = (struct r_port *) tty->driver_data;
1421         CHANNEL_t *cp;
1422
1423 #ifdef ROCKET_DEBUG_THROTTLE
1424         printk(KERN_INFO "throttle %s: %d....\n", tty->name,
1425                tty->ldisc.chars_in_buffer(tty));
1426 #endif
1427
1428         if (rocket_paranoia_check(info, "rp_throttle"))
1429                 return;
1430
1431         cp = &info->channel;
1432         if (I_IXOFF(tty))
1433                 rp_send_xchar(tty, STOP_CHAR(tty));
1434
1435         sClrRTS(&info->channel);
1436 }
1437
1438 static void rp_unthrottle(struct tty_struct *tty)
1439 {
1440         struct r_port *info = (struct r_port *) tty->driver_data;
1441         CHANNEL_t *cp;
1442 #ifdef ROCKET_DEBUG_THROTTLE
1443         printk(KERN_INFO "unthrottle %s: %d....\n", tty->name,
1444                tty->ldisc.chars_in_buffer(tty));
1445 #endif
1446
1447         if (rocket_paranoia_check(info, "rp_throttle"))
1448                 return;
1449
1450         cp = &info->channel;
1451         if (I_IXOFF(tty))
1452                 rp_send_xchar(tty, START_CHAR(tty));
1453
1454         sSetRTS(&info->channel);
1455 }
1456
1457 /*
1458  * ------------------------------------------------------------
1459  * rp_stop() and rp_start()
1460  *
1461  * This routines are called before setting or resetting tty->stopped.
1462  * They enable or disable transmitter interrupts, as necessary.
1463  * ------------------------------------------------------------
1464  */
1465 static void rp_stop(struct tty_struct *tty)
1466 {
1467         struct r_port *info = (struct r_port *) tty->driver_data;
1468
1469 #ifdef ROCKET_DEBUG_FLOW
1470         printk(KERN_INFO "stop %s: %d %d....\n", tty->name,
1471                info->xmit_cnt, info->xmit_fifo_room);
1472 #endif
1473
1474         if (rocket_paranoia_check(info, "rp_stop"))
1475                 return;
1476
1477         if (sGetTxCnt(&info->channel))
1478                 sDisTransmit(&info->channel);
1479 }
1480
1481 static void rp_start(struct tty_struct *tty)
1482 {
1483         struct r_port *info = (struct r_port *) tty->driver_data;
1484
1485 #ifdef ROCKET_DEBUG_FLOW
1486         printk(KERN_INFO "start %s: %d %d....\n", tty->name,
1487                info->xmit_cnt, info->xmit_fifo_room);
1488 #endif
1489
1490         if (rocket_paranoia_check(info, "rp_stop"))
1491                 return;
1492
1493         sEnTransmit(&info->channel);
1494         set_bit((info->aiop * 8) + info->chan,
1495                 (void *) &xmit_flags[info->board]);
1496 }
1497
1498 /*
1499  * rp_wait_until_sent() --- wait until the transmitter is empty
1500  */
1501 static void rp_wait_until_sent(struct tty_struct *tty, int timeout)
1502 {
1503         struct r_port *info = (struct r_port *) tty->driver_data;
1504         CHANNEL_t *cp;
1505         unsigned long orig_jiffies;
1506         int check_time, exit_time;
1507         int txcnt;
1508
1509         if (rocket_paranoia_check(info, "rp_wait_until_sent"))
1510                 return;
1511
1512         cp = &info->channel;
1513
1514         orig_jiffies = jiffies;
1515 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1516         printk(KERN_INFO "In RP_wait_until_sent(%d) (jiff=%lu)...", timeout,
1517                jiffies);
1518         printk(KERN_INFO "cps=%d...", info->cps);
1519 #endif
1520         while (1) {
1521                 txcnt = sGetTxCnt(cp);
1522                 if (!txcnt) {
1523                         if (sGetChanStatusLo(cp) & TXSHRMT)
1524                                 break;
1525                         check_time = (HZ / info->cps) / 5;
1526                 } else {
1527                         check_time = HZ * txcnt / info->cps;
1528                 }
1529                 if (timeout) {
1530                         exit_time = orig_jiffies + timeout - jiffies;
1531                         if (exit_time <= 0)
1532                                 break;
1533                         if (exit_time < check_time)
1534                                 check_time = exit_time;
1535                 }
1536                 if (check_time == 0)
1537                         check_time = 1;
1538 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1539                 printk(KERN_INFO "txcnt = %d (jiff=%lu,check=%d)...", txcnt, jiffies, check_time);
1540 #endif
1541                 current->state = TASK_INTERRUPTIBLE;
1542                 schedule_timeout(check_time);
1543                 if (signal_pending(current))
1544                         break;
1545         }
1546         current->state = TASK_RUNNING;
1547 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1548         printk(KERN_INFO "txcnt = %d (jiff=%lu)...done\n", txcnt, jiffies);
1549 #endif
1550 }
1551
1552 /*
1553  * rp_hangup() --- called by tty_hangup() when a hangup is signaled.
1554  */
1555 static void rp_hangup(struct tty_struct *tty)
1556 {
1557         CHANNEL_t *cp;
1558         struct r_port *info = (struct r_port *) tty->driver_data;
1559
1560         if (rocket_paranoia_check(info, "rp_hangup"))
1561                 return;
1562
1563 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_HANGUP))
1564         printk(KERN_INFO "rp_hangup of ttyR%d...", info->line);
1565 #endif
1566         rp_flush_buffer(tty);
1567         if (info->flags & ROCKET_CLOSING)
1568                 return;
1569         if (info->count)
1570                 atomic_dec(&rp_num_ports_open);
1571         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1572
1573         info->count = 0;
1574         info->flags &= ~ROCKET_NORMAL_ACTIVE;
1575         info->tty = NULL;
1576
1577         cp = &info->channel;
1578         sDisRxFIFO(cp);
1579         sDisTransmit(cp);
1580         sDisInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
1581         sDisCTSFlowCtl(cp);
1582         sDisTxSoftFlowCtl(cp);
1583         sClrTxXOFF(cp);
1584         info->flags &= ~ROCKET_INITIALIZED;
1585
1586         wake_up_interruptible(&info->open_wait);
1587 }
1588
1589 /*
1590  *  Exception handler - write char routine.  The RocketPort driver uses a
1591  *  double-buffering strategy, with the twist that if the in-memory CPU
1592  *  buffer is empty, and there's space in the transmit FIFO, the
1593  *  writing routines will write directly to transmit FIFO.
1594  *  Write buffer and counters protected by spinlocks
1595  */
1596 static void rp_put_char(struct tty_struct *tty, unsigned char ch)
1597 {
1598         struct r_port *info = (struct r_port *) tty->driver_data;
1599         CHANNEL_t *cp;
1600         unsigned long flags;
1601
1602         if (rocket_paranoia_check(info, "rp_put_char"))
1603                 return;
1604
1605         /*  Grab the port write semaphore, locking out other processes that try to write to this port */
1606         down(&info->write_sem);
1607
1608 #ifdef ROCKET_DEBUG_WRITE
1609         printk(KERN_INFO "rp_put_char %c...", ch);
1610 #endif
1611
1612         spin_lock_irqsave(&info->slock, flags);
1613         cp = &info->channel;
1614
1615         if (!tty->stopped && !tty->hw_stopped && info->xmit_fifo_room == 0)
1616                 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
1617
1618         if (tty->stopped || tty->hw_stopped || info->xmit_fifo_room == 0 || info->xmit_cnt != 0) {
1619                 info->xmit_buf[info->xmit_head++] = ch;
1620                 info->xmit_head &= XMIT_BUF_SIZE - 1;
1621                 info->xmit_cnt++;
1622                 set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1623         } else {
1624                 sOutB(sGetTxRxDataIO(cp), ch);
1625                 info->xmit_fifo_room--;
1626         }
1627         spin_unlock_irqrestore(&info->slock, flags);
1628         up(&info->write_sem);
1629 }
1630
1631 /*
1632  *  Exception handler - write routine, called when user app writes to the device.
1633  *  A per port write semaphore is used to protect from another process writing to
1634  *  this port at the same time.  This other process could be running on the other CPU
1635  *  or get control of the CPU if the copy_from_user() blocks due to a page fault (swapped out).
1636  *  Spinlocks protect the info xmit members.
1637  */
1638 static int rp_write(struct tty_struct *tty, int from_user,
1639                     const unsigned char *buf, int count)
1640 {
1641         struct r_port *info = (struct r_port *) tty->driver_data;
1642         CHANNEL_t *cp;
1643         const unsigned char *b;
1644         int c, retval = 0;
1645         unsigned long flags;
1646
1647         if (count <= 0 || rocket_paranoia_check(info, "rp_write"))
1648                 return 0;
1649
1650         down_interruptible(&info->write_sem);
1651
1652 #ifdef ROCKET_DEBUG_WRITE
1653         printk(KERN_INFO "rp_write %d chars...", count);
1654 #endif
1655         cp = &info->channel;
1656
1657         if (!tty->stopped && !tty->hw_stopped && info->xmit_fifo_room < count)
1658                 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
1659
1660         /*
1661          *  If the write queue for the port is empty, and there is FIFO space, stuff bytes
1662          *  into FIFO.  Use the write queue for temp storage.
1663          */
1664         if (!tty->stopped && !tty->hw_stopped && info->xmit_cnt == 0 && info->xmit_fifo_room > 0) {
1665                 c = min(count, info->xmit_fifo_room);
1666                 b = buf;
1667                 if (from_user) {
1668                         if (copy_from_user(info->xmit_buf, buf, c)) {
1669                                 retval = -EFAULT;
1670                                 goto end;
1671                         }
1672                         if (info->tty == 0)
1673                                 goto end;
1674                         b = info->xmit_buf;
1675                         c = min(c, info->xmit_fifo_room);
1676                 }
1677
1678                 /*  Push data into FIFO, 2 bytes at a time */
1679                 sOutStrW(sGetTxRxDataIO(cp), (unsigned short *) b, c / 2);
1680
1681                 /*  If there is a byte remaining, write it */
1682                 if (c & 1)
1683                         sOutB(sGetTxRxDataIO(cp), b[c - 1]);
1684
1685                 retval += c;
1686                 buf += c;
1687                 count -= c;
1688
1689                 spin_lock_irqsave(&info->slock, flags);
1690                 info->xmit_fifo_room -= c;
1691                 spin_unlock_irqrestore(&info->slock, flags);
1692         }
1693
1694         /* If count is zero, we wrote it all and are done */
1695         if (!count)
1696                 goto end;
1697
1698         /*  Write remaining data into the port's xmit_buf */
1699         while (1) {
1700                 if (info->tty == 0)     /*   Seemingly obligatory check... */
1701                         goto end;
1702
1703                 c = min(count, min(XMIT_BUF_SIZE - info->xmit_cnt - 1, XMIT_BUF_SIZE - info->xmit_head));
1704                 if (c <= 0)
1705                         break;
1706
1707                 b = buf;
1708                 if (from_user) {
1709                         if (copy_from_user(info->xmit_buf + info->xmit_head, b, c)) {
1710                                 retval = -EFAULT;
1711                                 goto end_intr;
1712                         } else {
1713                                 memcpy(info->xmit_buf + info->xmit_head, b, c);
1714                         }
1715                 }
1716
1717                 spin_lock_irqsave(&info->slock, flags);
1718                 info->xmit_head =
1719                     (info->xmit_head + c) & (XMIT_BUF_SIZE - 1);
1720                 info->xmit_cnt += c;
1721                 spin_unlock_irqrestore(&info->slock, flags);
1722
1723                 buf += c;
1724                 count -= c;
1725                 retval += c;
1726         }
1727
1728 end_intr:
1729         if ((retval > 0) && !tty->stopped && !tty->hw_stopped)
1730                 set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1731
1732 end:
1733         if (info->xmit_cnt < WAKEUP_CHARS) {
1734                 tty_wakeup(tty);
1735                 wake_up_interruptible(&tty->write_wait);
1736 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1737                 wake_up_interruptible(&tty->poll_wait);
1738 #endif
1739         }
1740         up(&info->write_sem);
1741         return retval;
1742 }
1743
1744 /*
1745  * Return the number of characters that can be sent.  We estimate
1746  * only using the in-memory transmit buffer only, and ignore the
1747  * potential space in the transmit FIFO.
1748  */
1749 static int rp_write_room(struct tty_struct *tty)
1750 {
1751         struct r_port *info = (struct r_port *) tty->driver_data;
1752         int ret;
1753
1754         if (rocket_paranoia_check(info, "rp_write_room"))
1755                 return 0;
1756
1757         ret = XMIT_BUF_SIZE - info->xmit_cnt - 1;
1758         if (ret < 0)
1759                 ret = 0;
1760 #ifdef ROCKET_DEBUG_WRITE
1761         printk(KERN_INFO "rp_write_room returns %d...", ret);
1762 #endif
1763         return ret;
1764 }
1765
1766 /*
1767  * Return the number of characters in the buffer.  Again, this only
1768  * counts those characters in the in-memory transmit buffer.
1769  */
1770 static int rp_chars_in_buffer(struct tty_struct *tty)
1771 {
1772         struct r_port *info = (struct r_port *) tty->driver_data;
1773         CHANNEL_t *cp;
1774
1775         if (rocket_paranoia_check(info, "rp_chars_in_buffer"))
1776                 return 0;
1777
1778         cp = &info->channel;
1779
1780 #ifdef ROCKET_DEBUG_WRITE
1781         printk(KERN_INFO "rp_chars_in_buffer returns %d...", info->xmit_cnt);
1782 #endif
1783         return info->xmit_cnt;
1784 }
1785
1786 /*
1787  *  Flushes the TX fifo for a port, deletes data in the xmit_buf stored in the
1788  *  r_port struct for the port.  Note that spinlock are used to protect info members,
1789  *  do not call this function if the spinlock is already held.
1790  */
1791 static void rp_flush_buffer(struct tty_struct *tty)
1792 {
1793         struct r_port *info = (struct r_port *) tty->driver_data;
1794         CHANNEL_t *cp;
1795         unsigned long flags;
1796
1797         if (rocket_paranoia_check(info, "rp_flush_buffer"))
1798                 return;
1799
1800         spin_lock_irqsave(&info->slock, flags);
1801         info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1802         spin_unlock_irqrestore(&info->slock, flags);
1803
1804         wake_up_interruptible(&tty->write_wait);
1805 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1806         wake_up_interruptible(&tty->poll_wait);
1807 #endif
1808         tty_wakeup(tty);
1809
1810         cp = &info->channel;
1811         sFlushTxFIFO(cp);
1812 }
1813
1814 #ifdef CONFIG_PCI
1815
1816 /*
1817  *  Called when a PCI card is found.  Retrieves and stores model information,
1818  *  init's aiopic and serial port hardware.
1819  *  Inputs:  i is the board number (0-n)
1820  */
1821 __init int register_PCI(int i, struct pci_dev *dev)
1822 {
1823         int num_aiops, aiop, max_num_aiops, num_chan, chan;
1824         unsigned int aiopio[MAX_AIOPS_PER_BOARD];
1825         char *str, *board_type;
1826         CONTROLLER_t *ctlp;
1827
1828         int fast_clock = 0;
1829         int altChanRingIndicator = 0;
1830         int ports_per_aiop = 8;
1831         int ret;
1832         unsigned int class_rev;
1833         WordIO_t ConfigIO = 0;
1834         ByteIO_t UPCIRingInd = 0;
1835
1836         if (!dev || pci_enable_device(dev))
1837                 return 0;
1838
1839         rcktpt_io_addr[i] = pci_resource_start(dev, 0);
1840         ret = pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
1841
1842         if (ret) {
1843                 printk(KERN_INFO "  Error during register_PCI(), unable to read config dword \n");
1844                 return 0;
1845         }
1846
1847         rcktpt_type[i] = ROCKET_TYPE_NORMAL;
1848         rocketModel[i].loadrm2 = 0;
1849         rocketModel[i].startingPortNumber = nextLineNumber;
1850
1851         /*  Depending on the model, set up some config variables */
1852         switch (dev->device) {
1853         case PCI_DEVICE_ID_RP4QUAD:
1854                 str = "Quadcable";
1855                 max_num_aiops = 1;
1856                 ports_per_aiop = 4;
1857                 rocketModel[i].model = MODEL_RP4QUAD;
1858                 strcpy(rocketModel[i].modelString, "RocketPort 4 port w/quad cable");
1859                 rocketModel[i].numPorts = 4;
1860                 break;
1861         case PCI_DEVICE_ID_RP8OCTA:
1862                 str = "Octacable";
1863                 max_num_aiops = 1;
1864                 rocketModel[i].model = MODEL_RP8OCTA;
1865                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/octa cable");
1866                 rocketModel[i].numPorts = 8;
1867                 break;
1868         case PCI_DEVICE_ID_URP8OCTA:
1869                 str = "Octacable";
1870                 max_num_aiops = 1;
1871                 rocketModel[i].model = MODEL_UPCI_RP8OCTA;
1872                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 8 port w/octa cable");
1873                 rocketModel[i].numPorts = 8;
1874                 break;
1875         case PCI_DEVICE_ID_RP8INTF:
1876                 str = "8";
1877                 max_num_aiops = 1;
1878                 rocketModel[i].model = MODEL_RP8INTF;
1879                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/external I/F");
1880                 rocketModel[i].numPorts = 8;
1881                 break;
1882         case PCI_DEVICE_ID_URP8INTF:
1883                 str = "8";
1884                 max_num_aiops = 1;
1885                 rocketModel[i].model = MODEL_UPCI_RP8INTF;
1886                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 8 port w/external I/F");
1887                 rocketModel[i].numPorts = 8;
1888                 break;
1889         case PCI_DEVICE_ID_RP8J:
1890                 str = "8J";
1891                 max_num_aiops = 1;
1892                 rocketModel[i].model = MODEL_RP8J;
1893                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/RJ11 connectors");
1894                 rocketModel[i].numPorts = 8;
1895                 break;
1896         case PCI_DEVICE_ID_RP4J:
1897                 str = "4J";
1898                 max_num_aiops = 1;
1899                 ports_per_aiop = 4;
1900                 rocketModel[i].model = MODEL_RP4J;
1901                 strcpy(rocketModel[i].modelString, "RocketPort 4 port w/RJ45 connectors");
1902                 rocketModel[i].numPorts = 4;
1903                 break;
1904         case PCI_DEVICE_ID_RP8SNI:
1905                 str = "8 (DB78 Custom)";
1906                 max_num_aiops = 1;
1907                 rocketModel[i].model = MODEL_RP8SNI;
1908                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/ custom DB78");
1909                 rocketModel[i].numPorts = 8;
1910                 break;
1911         case PCI_DEVICE_ID_RP16SNI:
1912                 str = "16 (DB78 Custom)";
1913                 max_num_aiops = 2;
1914                 rocketModel[i].model = MODEL_RP16SNI;
1915                 strcpy(rocketModel[i].modelString, "RocketPort 16 port w/ custom DB78");
1916                 rocketModel[i].numPorts = 16;
1917                 break;
1918         case PCI_DEVICE_ID_RP16INTF:
1919                 str = "16";
1920                 max_num_aiops = 2;
1921                 rocketModel[i].model = MODEL_RP16INTF;
1922                 strcpy(rocketModel[i].modelString, "RocketPort 16 port w/external I/F");
1923                 rocketModel[i].numPorts = 16;
1924                 break;
1925         case PCI_DEVICE_ID_URP16INTF:
1926                 str = "16";
1927                 max_num_aiops = 2;
1928                 rocketModel[i].model = MODEL_UPCI_RP16INTF;
1929                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 16 port w/external I/F");
1930                 rocketModel[i].numPorts = 16;
1931                 break;
1932         case PCI_DEVICE_ID_CRP16INTF:
1933                 str = "16";
1934                 max_num_aiops = 2;
1935                 rocketModel[i].model = MODEL_CPCI_RP16INTF;
1936                 strcpy(rocketModel[i].modelString, "RocketPort Compact PCI 16 port w/external I/F");
1937                 rocketModel[i].numPorts = 16;
1938                 break;
1939         case PCI_DEVICE_ID_RP32INTF:
1940                 str = "32";
1941                 max_num_aiops = 4;
1942                 rocketModel[i].model = MODEL_RP32INTF;
1943                 strcpy(rocketModel[i].modelString, "RocketPort 32 port w/external I/F");
1944                 rocketModel[i].numPorts = 32;
1945                 break;
1946         case PCI_DEVICE_ID_URP32INTF:
1947                 str = "32";
1948                 max_num_aiops = 4;
1949                 rocketModel[i].model = MODEL_UPCI_RP32INTF;
1950                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 32 port w/external I/F");
1951                 rocketModel[i].numPorts = 32;
1952                 break;
1953         case PCI_DEVICE_ID_RPP4:
1954                 str = "Plus Quadcable";
1955                 max_num_aiops = 1;
1956                 ports_per_aiop = 4;
1957                 altChanRingIndicator++;
1958                 fast_clock++;
1959                 rocketModel[i].model = MODEL_RPP4;
1960                 strcpy(rocketModel[i].modelString, "RocketPort Plus 4 port");
1961                 rocketModel[i].numPorts = 4;
1962                 break;
1963         case PCI_DEVICE_ID_RPP8:
1964                 str = "Plus Octacable";
1965                 max_num_aiops = 2;
1966                 ports_per_aiop = 4;
1967                 altChanRingIndicator++;
1968                 fast_clock++;
1969                 rocketModel[i].model = MODEL_RPP8;
1970                 strcpy(rocketModel[i].modelString, "RocketPort Plus 8 port");
1971                 rocketModel[i].numPorts = 8;
1972                 break;
1973         case PCI_DEVICE_ID_RP2_232:
1974                 str = "Plus 2 (RS-232)";
1975                 max_num_aiops = 1;
1976                 ports_per_aiop = 2;
1977                 altChanRingIndicator++;
1978                 fast_clock++;
1979                 rocketModel[i].model = MODEL_RP2_232;
1980                 strcpy(rocketModel[i].modelString, "RocketPort Plus 2 port RS232");
1981                 rocketModel[i].numPorts = 2;
1982                 break;
1983         case PCI_DEVICE_ID_RP2_422:
1984                 str = "Plus 2 (RS-422)";
1985                 max_num_aiops = 1;
1986                 ports_per_aiop = 2;
1987                 altChanRingIndicator++;
1988                 fast_clock++;
1989                 rocketModel[i].model = MODEL_RP2_422;
1990                 strcpy(rocketModel[i].modelString, "RocketPort Plus 2 port RS422");
1991                 rocketModel[i].numPorts = 2;
1992                 break;
1993         case PCI_DEVICE_ID_RP6M:
1994
1995                 max_num_aiops = 1;
1996                 ports_per_aiop = 6;
1997                 str = "6-port";
1998
1999                 /*  If class_rev is 1, the rocketmodem flash must be loaded.  If it is 2 it is a "socketed" version. */
2000                 if ((class_rev & 0xFF) == 1) {
2001                         rcktpt_type[i] = ROCKET_TYPE_MODEMII;
2002                         rocketModel[i].loadrm2 = 1;
2003                 } else {
2004                         rcktpt_type[i] = ROCKET_TYPE_MODEM;
2005                 }
2006
2007                 rocketModel[i].model = MODEL_RP6M;
2008                 strcpy(rocketModel[i].modelString, "RocketModem 6 port");
2009                 rocketModel[i].numPorts = 6;
2010                 break;
2011         case PCI_DEVICE_ID_RP4M:
2012                 max_num_aiops = 1;
2013                 ports_per_aiop = 4;
2014                 str = "4-port";
2015                 if ((class_rev & 0xFF) == 1) {
2016                         rcktpt_type[i] = ROCKET_TYPE_MODEMII;
2017                         rocketModel[i].loadrm2 = 1;
2018                 } else {
2019                         rcktpt_type[i] = ROCKET_TYPE_MODEM;
2020                 }
2021
2022                 rocketModel[i].model = MODEL_RP4M;
2023                 strcpy(rocketModel[i].modelString, "RocketModem 4 port");
2024                 rocketModel[i].numPorts = 4;
2025                 break;
2026         default:
2027                 str = "(unknown/unsupported)";
2028                 max_num_aiops = 0;
2029                 break;
2030         }
2031
2032         /*
2033          * Check for UPCI boards.
2034          */
2035
2036         switch (dev->device) {
2037         case PCI_DEVICE_ID_URP32INTF:
2038         case PCI_DEVICE_ID_URP8INTF:
2039         case PCI_DEVICE_ID_URP16INTF:
2040         case PCI_DEVICE_ID_CRP16INTF:
2041         case PCI_DEVICE_ID_URP8OCTA:
2042                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2043                 ConfigIO = pci_resource_start(dev, 1);
2044                 if (dev->device == PCI_DEVICE_ID_URP8OCTA) {
2045                         UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2046
2047                         /*
2048                          * Check for octa or quad cable.
2049                          */
2050                         if (!
2051                             (sInW(ConfigIO + _PCI_9030_GPIO_CTRL) &
2052                              PCI_GPIO_CTRL_8PORT)) {
2053                                 str = "Quadcable";
2054                                 ports_per_aiop = 4;
2055                                 rocketModel[i].numPorts = 4;
2056                         }
2057                 }
2058                 break;
2059         case PCI_DEVICE_ID_UPCI_RM3_8PORT:
2060                 str = "8 ports";
2061                 max_num_aiops = 1;
2062                 rocketModel[i].model = MODEL_UPCI_RM3_8PORT;
2063                 strcpy(rocketModel[i].modelString, "RocketModem III 8 port");
2064                 rocketModel[i].numPorts = 8;
2065                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2066                 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2067                 ConfigIO = pci_resource_start(dev, 1);
2068                 rcktpt_type[i] = ROCKET_TYPE_MODEMIII;
2069                 break;
2070         case PCI_DEVICE_ID_UPCI_RM3_4PORT:
2071                 str = "4 ports";
2072                 max_num_aiops = 1;
2073                 rocketModel[i].model = MODEL_UPCI_RM3_4PORT;
2074                 strcpy(rocketModel[i].modelString, "RocketModem III 4 port");
2075                 rocketModel[i].numPorts = 4;
2076                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2077                 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2078                 ConfigIO = pci_resource_start(dev, 1);
2079                 rcktpt_type[i] = ROCKET_TYPE_MODEMIII;
2080                 break;
2081         default:
2082                 break;
2083         }
2084
2085         switch (rcktpt_type[i]) {
2086         case ROCKET_TYPE_MODEM:
2087                 board_type = "RocketModem";
2088                 break;
2089         case ROCKET_TYPE_MODEMII:
2090                 board_type = "RocketModem II";
2091                 break;
2092         case ROCKET_TYPE_MODEMIII:
2093                 board_type = "RocketModem III";
2094                 break;
2095         default:
2096                 board_type = "RocketPort";
2097                 break;
2098         }
2099
2100         if (fast_clock) {
2101                 sClockPrescale = 0x12;  /* mod 2 (divide by 3) */
2102                 rp_baud_base[i] = 921600;
2103         } else {
2104                 /*
2105                  * If support_low_speed is set, use the slow clock
2106                  * prescale, which supports 50 bps
2107                  */
2108                 if (support_low_speed) {
2109                         /* mod 9 (divide by 10) prescale */
2110                         sClockPrescale = 0x19;
2111                         rp_baud_base[i] = 230400;
2112                 } else {
2113                         /* mod 4 (devide by 5) prescale */
2114                         sClockPrescale = 0x14;
2115                         rp_baud_base[i] = 460800;
2116                 }
2117         }
2118
2119         for (aiop = 0; aiop < max_num_aiops; aiop++)
2120                 aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x40);
2121         ctlp = sCtlNumToCtlPtr(i);
2122         num_aiops = sPCIInitController(ctlp, i, aiopio, max_num_aiops, ConfigIO, 0, FREQ_DIS, 0, altChanRingIndicator, UPCIRingInd);
2123         for (aiop = 0; aiop < max_num_aiops; aiop++)
2124                 ctlp->AiopNumChan[aiop] = ports_per_aiop;
2125
2126         printk("Comtrol PCI controller #%d ID 0x%x found in bus:slot:fn %s at address %04lx, "
2127              "%d AIOP(s) (%s)\n", i, dev->device, pci_name(dev),
2128              rcktpt_io_addr[i], num_aiops, rocketModel[i].modelString);
2129         printk(KERN_INFO "Installing %s, creating /dev/ttyR%d - %ld\n",
2130                rocketModel[i].modelString,
2131                rocketModel[i].startingPortNumber,
2132                rocketModel[i].startingPortNumber +
2133                rocketModel[i].numPorts - 1);
2134
2135         if (num_aiops <= 0) {
2136                 rcktpt_io_addr[i] = 0;
2137                 return (0);
2138         }
2139         is_PCI[i] = 1;
2140
2141         /*  Reset the AIOPIC, init the serial ports */
2142         for (aiop = 0; aiop < num_aiops; aiop++) {
2143                 sResetAiopByNum(ctlp, aiop);
2144                 num_chan = ports_per_aiop;
2145                 for (chan = 0; chan < num_chan; chan++)
2146                         init_r_port(i, aiop, chan, dev);
2147         }
2148
2149         /*  Rocket modems must be reset */
2150         if ((rcktpt_type[i] == ROCKET_TYPE_MODEM) ||
2151             (rcktpt_type[i] == ROCKET_TYPE_MODEMII) ||
2152             (rcktpt_type[i] == ROCKET_TYPE_MODEMIII)) {
2153                 num_chan = ports_per_aiop;
2154                 for (chan = 0; chan < num_chan; chan++)
2155                         sPCIModemReset(ctlp, chan, 1);
2156                 mdelay(500);
2157                 for (chan = 0; chan < num_chan; chan++)
2158                         sPCIModemReset(ctlp, chan, 0);
2159                 mdelay(500);
2160                 rmSpeakerReset(ctlp, rocketModel[i].model);
2161         }
2162         return (1);
2163 }
2164
2165 /*
2166  *  Probes for PCI cards, inits them if found
2167  *  Input:   board_found = number of ISA boards already found, or the
2168  *           starting board number
2169  *  Returns: Number of PCI boards found
2170  */
2171 static int __init init_PCI(int boards_found)
2172 {
2173         struct pci_dev *dev = NULL;
2174         int count = 0;
2175
2176         /*  Work through the PCI device list, pulling out ours */
2177         while ((dev = pci_find_device(PCI_VENDOR_ID_RP, PCI_ANY_ID, dev))) {
2178                 if (register_PCI(count + boards_found, dev))
2179                         count++;
2180         }
2181         return (count);
2182 }
2183
2184 #endif                          /* CONFIG_PCI */
2185
2186 /*
2187  *  Probes for ISA cards
2188  *  Input:   i = the board number to look for
2189  *  Returns: 1 if board found, 0 else
2190  */
2191 static int __init init_ISA(int i)
2192 {
2193         int num_aiops, num_chan = 0, total_num_chan = 0;
2194         int aiop, chan;
2195         unsigned int aiopio[MAX_AIOPS_PER_BOARD];
2196         CONTROLLER_t *ctlp;
2197         char *type_string;
2198
2199         /*  If io_addr is zero, no board configured */
2200         if (rcktpt_io_addr[i] == 0)
2201                 return (0);
2202
2203         /*  Reserve the IO region */
2204         if (!request_region(rcktpt_io_addr[i], 64, "Comtrol RocketPort")) {
2205                 printk(KERN_INFO "Unable to reserve IO region for configured ISA RocketPort at address 0x%lx, board not installed...\n", rcktpt_io_addr[i]);
2206                 rcktpt_io_addr[i] = 0;
2207                 return (0);
2208         }
2209
2210         ctlp = sCtlNumToCtlPtr(i);
2211
2212         ctlp->boardType = rcktpt_type[i];
2213
2214         switch (rcktpt_type[i]) {
2215         case ROCKET_TYPE_PC104:
2216                 type_string = "(PC104)";
2217                 break;
2218         case ROCKET_TYPE_MODEM:
2219                 type_string = "(RocketModem)";
2220                 break;
2221         case ROCKET_TYPE_MODEMII:
2222                 type_string = "(RocketModem II)";
2223                 break;
2224         default:
2225                 type_string = "";
2226                 break;
2227         }
2228
2229         /*
2230          * If support_low_speed is set, use the slow clock prescale,
2231          * which supports 50 bps
2232          */
2233         if (support_low_speed) {
2234                 sClockPrescale = 0x19;  /* mod 9 (divide by 10) prescale */
2235                 rp_baud_base[i] = 230400;
2236         } else {
2237                 sClockPrescale = 0x14;  /* mod 4 (devide by 5) prescale */
2238                 rp_baud_base[i] = 460800;
2239         }
2240
2241         for (aiop = 0; aiop < MAX_AIOPS_PER_BOARD; aiop++)
2242                 aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x400);
2243
2244         num_aiops = sInitController(ctlp, i, controller + (i * 0x400), aiopio,  MAX_AIOPS_PER_BOARD, 0, FREQ_DIS, 0);
2245
2246         if (ctlp->boardType == ROCKET_TYPE_PC104) {
2247                 sEnAiop(ctlp, 2);       /* only one AIOPIC, but these */
2248                 sEnAiop(ctlp, 3);       /* CSels used for other stuff */
2249         }
2250
2251         /*  If something went wrong initing the AIOP's release the ISA IO memory */
2252         if (num_aiops <= 0) {
2253                 release_region(rcktpt_io_addr[i], 64);
2254                 rcktpt_io_addr[i] = 0;
2255                 return (0);
2256         }
2257
2258         rocketModel[i].startingPortNumber = nextLineNumber;
2259
2260         for (aiop = 0; aiop < num_aiops; aiop++) {
2261                 sResetAiopByNum(ctlp, aiop);
2262                 sEnAiop(ctlp, aiop);
2263                 num_chan = sGetAiopNumChan(ctlp, aiop);
2264                 total_num_chan += num_chan;
2265                 for (chan = 0; chan < num_chan; chan++)
2266                         init_r_port(i, aiop, chan, NULL);
2267         }
2268         is_PCI[i] = 0;
2269         if ((rcktpt_type[i] == ROCKET_TYPE_MODEM) || (rcktpt_type[i] == ROCKET_TYPE_MODEMII)) {
2270                 num_chan = sGetAiopNumChan(ctlp, 0);
2271                 total_num_chan = num_chan;
2272                 for (chan = 0; chan < num_chan; chan++)
2273                         sModemReset(ctlp, chan, 1);
2274                 mdelay(500);
2275                 for (chan = 0; chan < num_chan; chan++)
2276                         sModemReset(ctlp, chan, 0);
2277                 mdelay(500);
2278                 strcpy(rocketModel[i].modelString, "RocketModem ISA");
2279         } else {
2280                 strcpy(rocketModel[i].modelString, "RocketPort ISA");
2281         }
2282         rocketModel[i].numPorts = total_num_chan;
2283         rocketModel[i].model = MODEL_ISA;
2284
2285         printk(KERN_INFO "RocketPort ISA card #%d found at 0x%lx - %d AIOPs %s\n",
2286                i, rcktpt_io_addr[i], num_aiops, type_string);
2287
2288         printk(KERN_INFO "Installing %s, creating /dev/ttyR%d - %ld\n",
2289                rocketModel[i].modelString,
2290                rocketModel[i].startingPortNumber,
2291                rocketModel[i].startingPortNumber +
2292                rocketModel[i].numPorts - 1);
2293
2294         return (1);
2295 }
2296
2297 static struct tty_operations rocket_ops = {
2298         .open = rp_open,
2299         .close = rp_close,
2300         .write = rp_write,
2301         .put_char = rp_put_char,
2302         .write_room = rp_write_room,
2303         .chars_in_buffer = rp_chars_in_buffer,
2304         .flush_buffer = rp_flush_buffer,
2305         .ioctl = rp_ioctl,
2306         .throttle = rp_throttle,
2307         .unthrottle = rp_unthrottle,
2308         .set_termios = rp_set_termios,
2309         .stop = rp_stop,
2310         .start = rp_start,
2311         .hangup = rp_hangup,
2312         .break_ctl = rp_break,
2313         .send_xchar = rp_send_xchar,
2314         .wait_until_sent = rp_wait_until_sent,
2315         .tiocmget = rp_tiocmget,
2316         .tiocmset = rp_tiocmset,
2317 };
2318
2319 /*
2320  * The module "startup" routine; it's run when the module is loaded.
2321  */
2322 int __init rp_init(void)
2323 {
2324         int retval, pci_boards_found, isa_boards_found, i;
2325
2326         printk(KERN_INFO "RocketPort device driver module, version %s, %s\n",
2327                ROCKET_VERSION, ROCKET_DATE);
2328
2329         rocket_driver = alloc_tty_driver(MAX_RP_PORTS);
2330         if (!rocket_driver)
2331                 return -ENOMEM;
2332
2333         /*
2334          * Set up the timer channel.
2335          */
2336         init_timer(&rocket_timer);
2337         rocket_timer.function = rp_do_poll;
2338
2339         /*
2340          * Initialize the array of pointers to our own internal state
2341          * structures.
2342          */
2343         memset(rp_table, 0, sizeof (rp_table));
2344         memset(xmit_flags, 0, sizeof (xmit_flags));
2345
2346         for (i = 0; i < MAX_RP_PORTS; i++)
2347                 lineNumbers[i] = 0;
2348         nextLineNumber = 0;
2349         memset(rocketModel, 0, sizeof (rocketModel));
2350
2351         /*
2352          *  If board 1 is non-zero, there is at least one ISA configured.  If controller is
2353          *  zero, use the default controller IO address of board1 + 0x40.
2354          */
2355         if (board1) {
2356                 if (controller == 0)
2357                         controller = board1 + 0x40;
2358         } else {
2359                 controller = 0;  /*  Used as a flag, meaning no ISA boards */
2360         }
2361
2362         /*  If an ISA card is configured, reserve the 4 byte IO space for the Mudbac controller */
2363         if (controller && (!request_region(controller, 4, "Comtrol RocketPort"))) {
2364                 printk(KERN_INFO "Unable to reserve IO region for first configured ISA RocketPort controller 0x%lx.  Driver exiting \n", controller);
2365                 return -EBUSY;
2366         }
2367
2368         /*  Store ISA variable retrieved from command line or .conf file. */
2369         rcktpt_io_addr[0] = board1;
2370         rcktpt_io_addr[1] = board2;
2371         rcktpt_io_addr[2] = board3;
2372         rcktpt_io_addr[3] = board4;
2373
2374         rcktpt_type[0] = modem1 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2375         rcktpt_type[0] = pc104_1[0] ? ROCKET_TYPE_PC104 : rcktpt_type[0];
2376         rcktpt_type[1] = modem2 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2377         rcktpt_type[1] = pc104_2[0] ? ROCKET_TYPE_PC104 : rcktpt_type[1];
2378         rcktpt_type[2] = modem3 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2379         rcktpt_type[2] = pc104_3[0] ? ROCKET_TYPE_PC104 : rcktpt_type[2];
2380         rcktpt_type[3] = modem4 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2381         rcktpt_type[3] = pc104_4[0] ? ROCKET_TYPE_PC104 : rcktpt_type[3];
2382
2383         /*
2384          * Set up the tty driver structure and then register this
2385          * driver with the tty layer.
2386          */
2387
2388         rocket_driver->owner = THIS_MODULE;
2389         rocket_driver->flags = TTY_DRIVER_NO_DEVFS;
2390         rocket_driver->devfs_name = "tts/R";
2391         rocket_driver->name = "ttyR";
2392         rocket_driver->driver_name = "Comtrol RocketPort";
2393         rocket_driver->major = TTY_ROCKET_MAJOR;
2394         rocket_driver->minor_start = 0;
2395         rocket_driver->type = TTY_DRIVER_TYPE_SERIAL;
2396         rocket_driver->subtype = SERIAL_TYPE_NORMAL;
2397         rocket_driver->init_termios = tty_std_termios;
2398         rocket_driver->init_termios.c_cflag =
2399             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2400 #ifdef ROCKET_SOFT_FLOW
2401         rocket_driver->flags |= TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
2402 #endif
2403         tty_set_operations(rocket_driver, &rocket_ops);
2404
2405         retval = tty_register_driver(rocket_driver);
2406         if (retval < 0) {
2407                 printk(KERN_INFO "Couldn't install tty RocketPort driver (error %d)\n", -retval);
2408                 put_tty_driver(rocket_driver);
2409                 return -1;
2410         }
2411
2412 #ifdef ROCKET_DEBUG_OPEN
2413         printk(KERN_INFO "RocketPort driver is major %d\n", rocket_driver.major);
2414 #endif
2415
2416         /*
2417          *  OK, let's probe each of the controllers looking for boards.  Any boards found
2418          *  will be initialized here.
2419          */
2420         isa_boards_found = 0;
2421         pci_boards_found = 0;
2422
2423         for (i = 0; i < NUM_BOARDS; i++) {
2424                 if (init_ISA(i))
2425                         isa_boards_found++;
2426         }
2427
2428 #ifdef CONFIG_PCI
2429         if (isa_boards_found < NUM_BOARDS)
2430                 pci_boards_found = init_PCI(isa_boards_found);
2431 #endif
2432
2433         max_board = pci_boards_found + isa_boards_found;
2434
2435         if (max_board == 0) {
2436                 printk(KERN_INFO "No rocketport ports found; unloading driver.\n");
2437                 del_timer_sync(&rocket_timer);
2438                 tty_unregister_driver(rocket_driver);
2439                 put_tty_driver(rocket_driver);
2440                 return -ENXIO;
2441         }
2442
2443         return 0;
2444 }
2445
2446 #ifdef MODULE
2447
2448 static void rp_cleanup_module(void)
2449 {
2450         int retval;
2451         int i;
2452
2453         del_timer_sync(&rocket_timer);
2454
2455         retval = tty_unregister_driver(rocket_driver);
2456         if (retval)
2457                 printk(KERN_INFO "Error %d while trying to unregister "
2458                        "rocketport driver\n", -retval);
2459         put_tty_driver(rocket_driver);
2460
2461         for (i = 0; i < MAX_RP_PORTS; i++) {
2462                 if (rp_table[i])
2463                         kfree(rp_table[i]);
2464         }
2465
2466         for (i = 0; i < NUM_BOARDS; i++) {
2467                 if (rcktpt_io_addr[i] <= 0 || is_PCI[i])
2468                         continue;
2469                 release_region(rcktpt_io_addr[i], 64);
2470         }
2471         if (controller)
2472                 release_region(controller, 4);
2473 }
2474 #endif
2475
2476 /***********************************************************************
2477                 Copyright 1994 Comtrol Corporation.
2478                         All Rights Reserved.
2479
2480 The following source code is subject to Comtrol Corporation's
2481 Developer's License Agreement.
2482
2483 This source code is protected by United States copyright law and
2484 international copyright treaties.
2485
2486 This source code may only be used to develop software products that
2487 will operate with Comtrol brand hardware.
2488
2489 You may not reproduce nor distribute this source code in its original
2490 form but must produce a derivative work which includes portions of
2491 this source code only.
2492
2493 The portions of this source code which you use in your derivative
2494 work must bear Comtrol's copyright notice:
2495
2496                 Copyright 1994 Comtrol Corporation.
2497
2498 ***********************************************************************/
2499
2500 #ifndef TRUE
2501 #define TRUE 1
2502 #endif
2503
2504 #ifndef FALSE
2505 #define FALSE 0
2506 #endif
2507
2508 static Byte_t RData[RDATASIZE] = {
2509         0x00, 0x09, 0xf6, 0x82,
2510         0x02, 0x09, 0x86, 0xfb,
2511         0x04, 0x09, 0x00, 0x0a,
2512         0x06, 0x09, 0x01, 0x0a,
2513         0x08, 0x09, 0x8a, 0x13,
2514         0x0a, 0x09, 0xc5, 0x11,
2515         0x0c, 0x09, 0x86, 0x85,
2516         0x0e, 0x09, 0x20, 0x0a,
2517         0x10, 0x09, 0x21, 0x0a,
2518         0x12, 0x09, 0x41, 0xff,
2519         0x14, 0x09, 0x82, 0x00,
2520         0x16, 0x09, 0x82, 0x7b,
2521         0x18, 0x09, 0x8a, 0x7d,
2522         0x1a, 0x09, 0x88, 0x81,
2523         0x1c, 0x09, 0x86, 0x7a,
2524         0x1e, 0x09, 0x84, 0x81,
2525         0x20, 0x09, 0x82, 0x7c,
2526         0x22, 0x09, 0x0a, 0x0a
2527 };
2528
2529 static Byte_t RRegData[RREGDATASIZE] = {
2530         0x00, 0x09, 0xf6, 0x82, /* 00: Stop Rx processor */
2531         0x08, 0x09, 0x8a, 0x13, /* 04: Tx software flow control */
2532         0x0a, 0x09, 0xc5, 0x11, /* 08: XON char */
2533         0x0c, 0x09, 0x86, 0x85, /* 0c: XANY */
2534         0x12, 0x09, 0x41, 0xff, /* 10: Rx mask char */
2535         0x14, 0x09, 0x82, 0x00, /* 14: Compare/Ignore #0 */
2536         0x16, 0x09, 0x82, 0x7b, /* 18: Compare #1 */
2537         0x18, 0x09, 0x8a, 0x7d, /* 1c: Compare #2 */
2538         0x1a, 0x09, 0x88, 0x81, /* 20: Interrupt #1 */
2539         0x1c, 0x09, 0x86, 0x7a, /* 24: Ignore/Replace #1 */
2540         0x1e, 0x09, 0x84, 0x81, /* 28: Interrupt #2 */
2541         0x20, 0x09, 0x82, 0x7c, /* 2c: Ignore/Replace #2 */
2542         0x22, 0x09, 0x0a, 0x0a  /* 30: Rx FIFO Enable */
2543 };
2544
2545 CONTROLLER_T sController[CTL_SIZE] = {
2546         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
2547          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
2548         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
2549          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
2550         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
2551          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
2552         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
2553          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}}
2554 };
2555
2556 Byte_t sBitMapClrTbl[8] = {
2557         0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f
2558 };
2559
2560 Byte_t sBitMapSetTbl[8] = {
2561         0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80
2562 };
2563
2564 int sClockPrescale = 0x14;
2565
2566 /***************************************************************************
2567 Function: sInitController
2568 Purpose:  Initialization of controller global registers and controller
2569           structure.
2570 Call:     sInitController(CtlP,CtlNum,MudbacIO,AiopIOList,AiopIOListSize,
2571                           IRQNum,Frequency,PeriodicOnly)
2572           CONTROLLER_T *CtlP; Ptr to controller structure
2573           int CtlNum; Controller number
2574           ByteIO_t MudbacIO; Mudbac base I/O address.
2575           ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2576              This list must be in the order the AIOPs will be found on the
2577              controller.  Once an AIOP in the list is not found, it is
2578              assumed that there are no more AIOPs on the controller.
2579           int AiopIOListSize; Number of addresses in AiopIOList
2580           int IRQNum; Interrupt Request number.  Can be any of the following:
2581                          0: Disable global interrupts
2582                          3: IRQ 3
2583                          4: IRQ 4
2584                          5: IRQ 5
2585                          9: IRQ 9
2586                          10: IRQ 10
2587                          11: IRQ 11
2588                          12: IRQ 12
2589                          15: IRQ 15
2590           Byte_t Frequency: A flag identifying the frequency
2591                    of the periodic interrupt, can be any one of the following:
2592                       FREQ_DIS - periodic interrupt disabled
2593                       FREQ_137HZ - 137 Hertz
2594                       FREQ_69HZ - 69 Hertz
2595                       FREQ_34HZ - 34 Hertz
2596                       FREQ_17HZ - 17 Hertz
2597                       FREQ_9HZ - 9 Hertz
2598                       FREQ_4HZ - 4 Hertz
2599                    If IRQNum is set to 0 the Frequency parameter is
2600                    overidden, it is forced to a value of FREQ_DIS.
2601           int PeriodicOnly: TRUE if all interrupts except the periodic
2602                                interrupt are to be blocked.
2603                             FALSE is both the periodic interrupt and
2604                                other channel interrupts are allowed.
2605                             If IRQNum is set to 0 the PeriodicOnly parameter is
2606                                overidden, it is forced to a value of FALSE.
2607 Return:   int: Number of AIOPs on the controller, or CTLID_NULL if controller
2608                initialization failed.
2609
2610 Comments:
2611           If periodic interrupts are to be disabled but AIOP interrupts
2612           are allowed, set Frequency to FREQ_DIS and PeriodicOnly to FALSE.
2613
2614           If interrupts are to be completely disabled set IRQNum to 0.
2615
2616           Setting Frequency to FREQ_DIS and PeriodicOnly to TRUE is an
2617           invalid combination.
2618
2619           This function performs initialization of global interrupt modes,
2620           but it does not actually enable global interrupts.  To enable
2621           and disable global interrupts use functions sEnGlobalInt() and
2622           sDisGlobalInt().  Enabling of global interrupts is normally not
2623           done until all other initializations are complete.
2624
2625           Even if interrupts are globally enabled, they must also be
2626           individually enabled for each channel that is to generate
2627           interrupts.
2628
2629 Warnings: No range checking on any of the parameters is done.
2630
2631           No context switches are allowed while executing this function.
2632
2633           After this function all AIOPs on the controller are disabled,
2634           they can be enabled with sEnAiop().
2635 */
2636 int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
2637                     ByteIO_t * AiopIOList, int AiopIOListSize, int IRQNum,
2638                     Byte_t Frequency, int PeriodicOnly)
2639 {
2640         int i;
2641         ByteIO_t io;
2642         int done;
2643
2644         CtlP->AiopIntrBits = aiop_intr_bits;
2645         CtlP->AltChanRingIndicator = 0;
2646         CtlP->CtlNum = CtlNum;
2647         CtlP->CtlID = CTLID_0001;       /* controller release 1 */
2648         CtlP->BusType = isISA;
2649         CtlP->MBaseIO = MudbacIO;
2650         CtlP->MReg1IO = MudbacIO + 1;
2651         CtlP->MReg2IO = MudbacIO + 2;
2652         CtlP->MReg3IO = MudbacIO + 3;
2653 #if 1
2654         CtlP->MReg2 = 0;        /* interrupt disable */
2655         CtlP->MReg3 = 0;        /* no periodic interrupts */
2656 #else
2657         if (sIRQMap[IRQNum] == 0) {     /* interrupts globally disabled */
2658                 CtlP->MReg2 = 0;        /* interrupt disable */
2659                 CtlP->MReg3 = 0;        /* no periodic interrupts */
2660         } else {
2661                 CtlP->MReg2 = sIRQMap[IRQNum];  /* set IRQ number */
2662                 CtlP->MReg3 = Frequency;        /* set frequency */
2663                 if (PeriodicOnly) {     /* periodic interrupt only */
2664                         CtlP->MReg3 |= PERIODIC_ONLY;
2665                 }
2666         }
2667 #endif
2668         sOutB(CtlP->MReg2IO, CtlP->MReg2);
2669         sOutB(CtlP->MReg3IO, CtlP->MReg3);
2670         sControllerEOI(CtlP);   /* clear EOI if warm init */
2671         /* Init AIOPs */
2672         CtlP->NumAiop = 0;
2673         for (i = done = 0; i < AiopIOListSize; i++) {
2674                 io = AiopIOList[i];
2675                 CtlP->AiopIO[i] = (WordIO_t) io;
2676                 CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
2677                 sOutB(CtlP->MReg2IO, CtlP->MReg2 | (i & 0x03)); /* AIOP index */
2678                 sOutB(MudbacIO, (Byte_t) (io >> 6));    /* set up AIOP I/O in MUDBAC */
2679                 if (done)
2680                         continue;
2681                 sEnAiop(CtlP, i);       /* enable the AIOP */
2682                 CtlP->AiopID[i] = sReadAiopID(io);      /* read AIOP ID */
2683                 if (CtlP->AiopID[i] == AIOPID_NULL)     /* if AIOP does not exist */
2684                         done = 1;       /* done looking for AIOPs */
2685                 else {
2686                         CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
2687                         sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE);    /* clock prescaler */
2688                         sOutB(io + _INDX_DATA, sClockPrescale);
2689                         CtlP->NumAiop++;        /* bump count of AIOPs */
2690                 }
2691                 sDisAiop(CtlP, i);      /* disable AIOP */
2692         }
2693
2694         if (CtlP->NumAiop == 0)
2695                 return (-1);
2696         else
2697                 return (CtlP->NumAiop);
2698 }
2699
2700 /***************************************************************************
2701 Function: sPCIInitController
2702 Purpose:  Initialization of controller global registers and controller
2703           structure.
2704 Call:     sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize,
2705                           IRQNum,Frequency,PeriodicOnly)
2706           CONTROLLER_T *CtlP; Ptr to controller structure
2707           int CtlNum; Controller number
2708           ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2709              This list must be in the order the AIOPs will be found on the
2710              controller.  Once an AIOP in the list is not found, it is
2711              assumed that there are no more AIOPs on the controller.
2712           int AiopIOListSize; Number of addresses in AiopIOList
2713           int IRQNum; Interrupt Request number.  Can be any of the following:
2714                          0: Disable global interrupts
2715                          3: IRQ 3
2716                          4: IRQ 4
2717                          5: IRQ 5
2718                          9: IRQ 9
2719                          10: IRQ 10
2720                          11: IRQ 11
2721                          12: IRQ 12
2722                          15: IRQ 15
2723           Byte_t Frequency: A flag identifying the frequency
2724                    of the periodic interrupt, can be any one of the following:
2725                       FREQ_DIS - periodic interrupt disabled
2726                       FREQ_137HZ - 137 Hertz
2727                       FREQ_69HZ - 69 Hertz
2728                       FREQ_34HZ - 34 Hertz
2729                       FREQ_17HZ - 17 Hertz
2730                       FREQ_9HZ - 9 Hertz
2731                       FREQ_4HZ - 4 Hertz
2732                    If IRQNum is set to 0 the Frequency parameter is
2733                    overidden, it is forced to a value of FREQ_DIS.
2734           int PeriodicOnly: TRUE if all interrupts except the periodic
2735                                interrupt are to be blocked.
2736                             FALSE is both the periodic interrupt and
2737                                other channel interrupts are allowed.
2738                             If IRQNum is set to 0 the PeriodicOnly parameter is
2739                                overidden, it is forced to a value of FALSE.
2740 Return:   int: Number of AIOPs on the controller, or CTLID_NULL if controller
2741                initialization failed.
2742
2743 Comments:
2744           If periodic interrupts are to be disabled but AIOP interrupts
2745           are allowed, set Frequency to FREQ_DIS and PeriodicOnly to FALSE.
2746
2747           If interrupts are to be completely disabled set IRQNum to 0.
2748
2749           Setting Frequency to FREQ_DIS and PeriodicOnly to TRUE is an
2750           invalid combination.
2751
2752           This function performs initialization of global interrupt modes,
2753           but it does not actually enable global interrupts.  To enable
2754           and disable global interrupts use functions sEnGlobalInt() and
2755           sDisGlobalInt().  Enabling of global interrupts is normally not
2756           done until all other initializations are complete.
2757
2758           Even if interrupts are globally enabled, they must also be
2759           individually enabled for each channel that is to generate
2760           interrupts.
2761
2762 Warnings: No range checking on any of the parameters is done.
2763
2764           No context switches are allowed while executing this function.
2765
2766           After this function all AIOPs on the controller are disabled,
2767           they can be enabled with sEnAiop().
2768 */
2769 int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum,
2770                        ByteIO_t * AiopIOList, int AiopIOListSize,
2771                        WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
2772                        int PeriodicOnly, int altChanRingIndicator,
2773                        int UPCIRingInd)
2774 {
2775         int i;
2776         ByteIO_t io;
2777
2778         CtlP->AltChanRingIndicator = altChanRingIndicator;
2779         CtlP->UPCIRingInd = UPCIRingInd;
2780         CtlP->CtlNum = CtlNum;
2781         CtlP->CtlID = CTLID_0001;       /* controller release 1 */
2782         CtlP->BusType = isPCI;  /* controller release 1 */
2783
2784         if (ConfigIO) {
2785                 CtlP->isUPCI = 1;
2786                 CtlP->PCIIO = ConfigIO + _PCI_9030_INT_CTRL;
2787                 CtlP->PCIIO2 = ConfigIO + _PCI_9030_GPIO_CTRL;
2788                 CtlP->AiopIntrBits = upci_aiop_intr_bits;
2789         } else {
2790                 CtlP->isUPCI = 0;
2791                 CtlP->PCIIO =
2792                     (WordIO_t) ((ByteIO_t) AiopIOList[0] + _PCI_INT_FUNC);
2793                 CtlP->AiopIntrBits = aiop_intr_bits;
2794         }
2795
2796         sPCIControllerEOI(CtlP);        /* clear EOI if warm init */
2797         /* Init AIOPs */
2798         CtlP->NumAiop = 0;
2799         for (i = 0; i < AiopIOListSize; i++) {
2800                 io = AiopIOList[i];
2801                 CtlP->AiopIO[i] = (WordIO_t) io;
2802                 CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
2803
2804                 CtlP->AiopID[i] = sReadAiopID(io);      /* read AIOP ID */
2805                 if (CtlP->AiopID[i] == AIOPID_NULL)     /* if AIOP does not exist */
2806                         break;  /* done looking for AIOPs */
2807
2808                 CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
2809                 sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE);    /* clock prescaler */
2810                 sOutB(io + _INDX_DATA, sClockPrescale);
2811                 CtlP->NumAiop++;        /* bump count of AIOPs */
2812         }
2813
2814         if (CtlP->NumAiop == 0)
2815                 return (-1);
2816         else
2817                 return (CtlP->NumAiop);
2818 }
2819
2820 /***************************************************************************
2821 Function: sReadAiopID
2822 Purpose:  Read the AIOP idenfication number directly from an AIOP.
2823 Call:     sReadAiopID(io)
2824           ByteIO_t io: AIOP base I/O address
2825 Return:   int: Flag AIOPID_XXXX if a valid AIOP is found, where X
2826                  is replace by an identifying number.
2827           Flag AIOPID_NULL if no valid AIOP is found
2828 Warnings: No context switches are allowed while executing this function.
2829
2830 */
2831 int sReadAiopID(ByteIO_t io)
2832 {
2833         Byte_t AiopID;          /* ID byte from AIOP */
2834
2835         sOutB(io + _CMD_REG, RESET_ALL);        /* reset AIOP */
2836         sOutB(io + _CMD_REG, 0x0);
2837         AiopID = sInW(io + _CHN_STAT0) & 0x07;
2838         if (AiopID == 0x06)
2839                 return (1);
2840         else                    /* AIOP does not exist */
2841                 return (-1);
2842 }
2843
2844 /***************************************************************************
2845 Function: sReadAiopNumChan
2846 Purpose:  Read the number of channels available in an AIOP directly from
2847           an AIOP.
2848 Call:     sReadAiopNumChan(io)
2849           WordIO_t io: AIOP base I/O address
2850 Return:   int: The number of channels available
2851 Comments: The number of channels is determined by write/reads from identical
2852           offsets within the SRAM address spaces for channels 0 and 4.
2853           If the channel 4 space is mirrored to channel 0 it is a 4 channel
2854           AIOP, otherwise it is an 8 channel.
2855 Warnings: No context switches are allowed while executing this function.
2856 */
2857 int sReadAiopNumChan(WordIO_t io)
2858 {
2859         Word_t x;
2860         static Byte_t R[4] = { 0x00, 0x00, 0x34, 0x12 };
2861
2862         /* write to chan 0 SRAM */
2863         sOutDW((DWordIO_t) io + _INDX_ADDR, *((DWord_t *) & R[0]));
2864         sOutW(io + _INDX_ADDR, 0);      /* read from SRAM, chan 0 */
2865         x = sInW(io + _INDX_DATA);
2866         sOutW(io + _INDX_ADDR, 0x4000); /* read from SRAM, chan 4 */
2867         if (x != sInW(io + _INDX_DATA)) /* if different must be 8 chan */
2868                 return (8);
2869         else
2870                 return (4);
2871 }
2872
2873 /***************************************************************************
2874 Function: sInitChan
2875 Purpose:  Initialization of a channel and channel structure
2876 Call:     sInitChan(CtlP,ChP,AiopNum,ChanNum)
2877           CONTROLLER_T *CtlP; Ptr to controller structure
2878           CHANNEL_T *ChP; Ptr to channel structure
2879           int AiopNum; AIOP number within controller
2880           int ChanNum; Channel number within AIOP
2881 Return:   int: TRUE if initialization succeeded, FALSE if it fails because channel
2882                number exceeds number of channels available in AIOP.
2883 Comments: This function must be called before a channel can be used.
2884 Warnings: No range checking on any of the parameters is done.
2885
2886           No context switches are allowed while executing this function.
2887 */
2888 int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
2889               int ChanNum)
2890 {
2891         int i;
2892         WordIO_t AiopIO;
2893         WordIO_t ChIOOff;
2894         Byte_t *ChR;
2895         Word_t ChOff;
2896         static Byte_t R[4];
2897         int brd9600;
2898
2899         if (ChanNum >= CtlP->AiopNumChan[AiopNum])
2900                 return (FALSE); /* exceeds num chans in AIOP */
2901
2902         /* Channel, AIOP, and controller identifiers */
2903         ChP->CtlP = CtlP;
2904         ChP->ChanID = CtlP->AiopID[AiopNum];
2905         ChP->AiopNum = AiopNum;
2906         ChP->ChanNum = ChanNum;
2907
2908         /* Global direct addresses */
2909         AiopIO = CtlP->AiopIO[AiopNum];
2910         ChP->Cmd = (ByteIO_t) AiopIO + _CMD_REG;
2911         ChP->IntChan = (ByteIO_t) AiopIO + _INT_CHAN;
2912         ChP->IntMask = (ByteIO_t) AiopIO + _INT_MASK;
2913         ChP->IndexAddr = (DWordIO_t) AiopIO + _INDX_ADDR;
2914         ChP->IndexData = AiopIO + _INDX_DATA;
2915
2916         /* Channel direct addresses */
2917         ChIOOff = AiopIO + ChP->ChanNum * 2;
2918         ChP->TxRxData = ChIOOff + _TD0;
2919         ChP->ChanStat = ChIOOff + _CHN_STAT0;
2920         ChP->TxRxCount = ChIOOff + _FIFO_CNT0;
2921         ChP->IntID = (ByteIO_t) AiopIO + ChP->ChanNum + _INT_ID0;
2922
2923         /* Initialize the channel from the RData array */
2924         for (i = 0; i < RDATASIZE; i += 4) {
2925                 R[0] = RData[i];
2926                 R[1] = RData[i + 1] + 0x10 * ChanNum;
2927                 R[2] = RData[i + 2];
2928                 R[3] = RData[i + 3];
2929                 sOutDW(ChP->IndexAddr, *((DWord_t *) & R[0]));
2930         }
2931
2932         ChR = ChP->R;
2933         for (i = 0; i < RREGDATASIZE; i += 4) {
2934                 ChR[i] = RRegData[i];
2935                 ChR[i + 1] = RRegData[i + 1] + 0x10 * ChanNum;
2936                 ChR[i + 2] = RRegData[i + 2];
2937                 ChR[i + 3] = RRegData[i + 3];
2938         }
2939
2940         /* Indexed registers */
2941         ChOff = (Word_t) ChanNum *0x1000;
2942
2943         if (sClockPrescale == 0x14)
2944                 brd9600 = 47;
2945         else
2946                 brd9600 = 23;
2947
2948         ChP->BaudDiv[0] = (Byte_t) (ChOff + _BAUD);
2949         ChP->BaudDiv[1] = (Byte_t) ((ChOff + _BAUD) >> 8);
2950         ChP->BaudDiv[2] = (Byte_t) brd9600;
2951         ChP->BaudDiv[3] = (Byte_t) (brd9600 >> 8);
2952         sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->BaudDiv[0]);
2953
2954         ChP->TxControl[0] = (Byte_t) (ChOff + _TX_CTRL);
2955         ChP->TxControl[1] = (Byte_t) ((ChOff + _TX_CTRL) >> 8);
2956         ChP->TxControl[2] = 0;
2957         ChP->TxControl[3] = 0;
2958         sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxControl[0]);
2959
2960         ChP->RxControl[0] = (Byte_t) (ChOff + _RX_CTRL);
2961         ChP->RxControl[1] = (Byte_t) ((ChOff + _RX_CTRL) >> 8);
2962         ChP->RxControl[2] = 0;
2963         ChP->RxControl[3] = 0;
2964         sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->RxControl[0]);
2965
2966         ChP->TxEnables[0] = (Byte_t) (ChOff + _TX_ENBLS);
2967         ChP->TxEnables[1] = (Byte_t) ((ChOff + _TX_ENBLS) >> 8);
2968         ChP->TxEnables[2] = 0;
2969         ChP->TxEnables[3] = 0;
2970         sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxEnables[0]);
2971
2972         ChP->TxCompare[0] = (Byte_t) (ChOff + _TXCMP1);
2973         ChP->TxCompare[1] = (Byte_t) ((ChOff + _TXCMP1) >> 8);
2974         ChP->TxCompare[2] = 0;
2975         ChP->TxCompare[3] = 0;
2976         sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxCompare[0]);
2977
2978         ChP->TxReplace1[0] = (Byte_t) (ChOff + _TXREP1B1);
2979         ChP->TxReplace1[1] = (Byte_t) ((ChOff + _TXREP1B1) >> 8);
2980         ChP->TxReplace1[2] = 0;
2981         ChP->TxReplace1[3] = 0;
2982         sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxReplace1[0]);
2983
2984         ChP->TxReplace2[0] = (Byte_t) (ChOff + _TXREP2);
2985         ChP->TxReplace2[1] = (Byte_t) ((ChOff + _TXREP2) >> 8);
2986         ChP->TxReplace2[2] = 0;
2987         ChP->TxReplace2[3] = 0;
2988         sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxReplace2[0]);
2989
2990         ChP->TxFIFOPtrs = ChOff + _TXF_OUTP;
2991         ChP->TxFIFO = ChOff + _TX_FIFO;
2992
2993         sOutB(ChP->Cmd, (Byte_t) ChanNum | RESTXFCNT);  /* apply reset Tx FIFO count */
2994         sOutB(ChP->Cmd, (Byte_t) ChanNum);      /* remove reset Tx FIFO count */
2995         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxFIFOPtrs);      /* clear Tx in/out ptrs */
2996         sOutW(ChP->IndexData, 0);
2997         ChP->RxFIFOPtrs = ChOff + _RXF_OUTP;
2998         ChP->RxFIFO = ChOff + _RX_FIFO;
2999
3000         sOutB(ChP->Cmd, (Byte_t) ChanNum | RESRXFCNT);  /* apply reset Rx FIFO count */
3001         sOutB(ChP->Cmd, (Byte_t) ChanNum);      /* remove reset Rx FIFO count */
3002         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs);      /* clear Rx out ptr */
3003         sOutW(ChP->IndexData, 0);
3004         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs + 2);  /* clear Rx in ptr */
3005         sOutW(ChP->IndexData, 0);
3006         ChP->TxPrioCnt = ChOff + _TXP_CNT;
3007         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxPrioCnt);
3008         sOutB(ChP->IndexData, 0);
3009         ChP->TxPrioPtr = ChOff + _TXP_PNTR;
3010         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxPrioPtr);
3011         sOutB(ChP->IndexData, 0);
3012         ChP->TxPrioBuf = ChOff + _TXP_BUF;
3013         sEnRxProcessor(ChP);    /* start the Rx processor */
3014
3015         return (TRUE);
3016 }
3017
3018 /***************************************************************************
3019 Function: sStopRxProcessor
3020 Purpose:  Stop the receive processor from processing a channel.
3021 Call:     sStopRxProcessor(ChP)
3022           CHANNEL_T *ChP; Ptr to channel structure
3023
3024 Comments: The receive processor can be started again with sStartRxProcessor().
3025           This function causes the receive processor to skip over the
3026           stopped channel.  It does not stop it from processing other channels.
3027
3028 Warnings: No context switches are allowed while executing this function.
3029
3030           Do not leave the receive processor stopped for more than one
3031           character time.
3032
3033           After calling this function a delay of 4 uS is required to ensure
3034           that the receive processor is no longer processing this channel.
3035 */
3036 void sStopRxProcessor(CHANNEL_T * ChP)
3037 {
3038         Byte_t R[4];
3039
3040         R[0] = ChP->R[0];
3041         R[1] = ChP->R[1];
3042         R[2] = 0x0a;
3043         R[3] = ChP->R[3];
3044         sOutDW(ChP->IndexAddr, *(DWord_t *) & R[0]);
3045 }
3046
3047 /***************************************************************************
3048 Function: sFlushRxFIFO
3049 Purpose:  Flush the Rx FIFO
3050 Call:     sFlushRxFIFO(ChP)
3051           CHANNEL_T *ChP; Ptr to channel structure
3052 Return:   void
3053 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
3054           while it is being flushed the receive processor is stopped
3055           and the transmitter is disabled.  After these operations a
3056           4 uS delay is done before clearing the pointers to allow
3057           the receive processor to stop.  These items are handled inside
3058           this function.
3059 Warnings: No context switches are allowed while executing this function.
3060 */
3061 void sFlushRxFIFO(CHANNEL_T * ChP)
3062 {
3063         int i;
3064         Byte_t Ch;              /* channel number within AIOP */
3065         int RxFIFOEnabled;      /* TRUE if Rx FIFO enabled */
3066
3067         if (sGetRxCnt(ChP) == 0)        /* Rx FIFO empty */
3068                 return;         /* don't need to flush */
3069
3070         RxFIFOEnabled = FALSE;
3071         if (ChP->R[0x32] == 0x08) {     /* Rx FIFO is enabled */
3072                 RxFIFOEnabled = TRUE;
3073                 sDisRxFIFO(ChP);        /* disable it */
3074                 for (i = 0; i < 2000 / 200; i++)        /* delay 2 uS to allow proc to disable FIFO */
3075                         sInB(ChP->IntChan);     /* depends on bus i/o timing */
3076         }
3077         sGetChanStatus(ChP);    /* clear any pending Rx errors in chan stat */
3078         Ch = (Byte_t) sGetChanNum(ChP);
3079         sOutB(ChP->Cmd, Ch | RESRXFCNT);        /* apply reset Rx FIFO count */
3080         sOutB(ChP->Cmd, Ch);    /* remove reset Rx FIFO count */
3081         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs);      /* clear Rx out ptr */
3082         sOutW(ChP->IndexData, 0);
3083         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs + 2);  /* clear Rx in ptr */
3084         sOutW(ChP->IndexData, 0);
3085         if (RxFIFOEnabled)
3086                 sEnRxFIFO(ChP); /* enable Rx FIFO */
3087 }
3088
3089 /***************************************************************************
3090 Function: sFlushTxFIFO
3091 Purpose:  Flush the Tx FIFO
3092 Call:     sFlushTxFIFO(ChP)
3093           CHANNEL_T *ChP; Ptr to channel structure
3094 Return:   void
3095 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
3096           while it is being flushed the receive processor is stopped
3097           and the transmitter is disabled.  After these operations a
3098           4 uS delay is done before clearing the pointers to allow
3099           the receive processor to stop.  These items are handled inside
3100           this function.
3101 Warnings: No context switches are allowed while executing this function.
3102 */
3103 void sFlushTxFIFO(CHANNEL_T * ChP)
3104 {
3105         int i;
3106         Byte_t Ch;              /* channel number within AIOP */
3107         int TxEnabled;          /* TRUE if transmitter enabled */
3108
3109         if (sGetTxCnt(ChP) == 0)        /* Tx FIFO empty */
3110                 return;         /* don't need to flush */
3111
3112         TxEnabled = FALSE;
3113         if (ChP->TxControl[3] & TX_ENABLE) {
3114                 TxEnabled = TRUE;
3115                 sDisTransmit(ChP);      /* disable transmitter */
3116         }
3117         sStopRxProcessor(ChP);  /* stop Rx processor */
3118         for (i = 0; i < 4000 / 200; i++)        /* delay 4 uS to allow proc to stop */
3119                 sInB(ChP->IntChan);     /* depends on bus i/o timing */
3120         Ch = (Byte_t) sGetChanNum(ChP);
3121         sOutB(ChP->Cmd, Ch | RESTXFCNT);        /* apply reset Tx FIFO count */
3122         sOutB(ChP->Cmd, Ch);    /* remove reset Tx FIFO count */
3123         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxFIFOPtrs);      /* clear Tx in/out ptrs */
3124         sOutW(ChP->IndexData, 0);
3125         if (TxEnabled)
3126                 sEnTransmit(ChP);       /* enable transmitter */
3127         sStartRxProcessor(ChP); /* restart Rx processor */
3128 }
3129
3130 /***************************************************************************
3131 Function: sWriteTxPrioByte
3132 Purpose:  Write a byte of priority transmit data to a channel
3133 Call:     sWriteTxPrioByte(ChP,Data)
3134           CHANNEL_T *ChP; Ptr to channel structure
3135           Byte_t Data; The transmit data byte
3136
3137 Return:   int: 1 if the bytes is successfully written, otherwise 0.
3138
3139 Comments: The priority byte is transmitted before any data in the Tx FIFO.
3140
3141 Warnings: No context switches are allowed while executing this function.
3142 */
3143 int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data)
3144 {
3145         Byte_t DWBuf[4];        /* buffer for double word writes */
3146         Word_t *WordPtr;        /* must be far because Win SS != DS */
3147         register DWordIO_t IndexAddr;
3148
3149         if (sGetTxCnt(ChP) > 1) {       /* write it to Tx priority buffer */
3150                 IndexAddr = ChP->IndexAddr;
3151                 sOutW((WordIO_t) IndexAddr, ChP->TxPrioCnt);    /* get priority buffer status */
3152                 if (sInB((ByteIO_t) ChP->IndexData) & PRI_PEND) /* priority buffer busy */
3153                         return (0);     /* nothing sent */
3154
3155                 WordPtr = (Word_t *) (&DWBuf[0]);
3156                 *WordPtr = ChP->TxPrioBuf;      /* data byte address */
3157
3158                 DWBuf[2] = Data;        /* data byte value */
3159                 sOutDW(IndexAddr, *((DWord_t *) (&DWBuf[0])));  /* write it out */
3160
3161                 *WordPtr = ChP->TxPrioCnt;      /* Tx priority count address */
3162
3163                 DWBuf[2] = PRI_PEND + 1;        /* indicate 1 byte pending */
3164                 DWBuf[3] = 0;   /* priority buffer pointer */
3165                 sOutDW(IndexAddr, *((DWord_t *) (&DWBuf[0])));  /* write it out */
3166         } else {                /* write it to Tx FIFO */
3167
3168                 sWriteTxByte(sGetTxRxDataIO(ChP), Data);
3169         }
3170         return (1);             /* 1 byte sent */
3171 }
3172
3173 /***************************************************************************
3174 Function: sEnInterrupts
3175 Purpose:  Enable one or more interrupts for a channel
3176 Call:     sEnInterrupts(ChP,Flags)
3177           CHANNEL_T *ChP; Ptr to channel structure
3178           Word_t Flags: Interrupt enable flags, can be any combination
3179              of the following flags:
3180                 TXINT_EN:   Interrupt on Tx FIFO empty
3181                 RXINT_EN:   Interrupt on Rx FIFO at trigger level (see
3182                             sSetRxTrigger())
3183                 SRCINT_EN:  Interrupt on SRC (Special Rx Condition)
3184                 MCINT_EN:   Interrupt on modem input change
3185                 CHANINT_EN: Allow channel interrupt signal to the AIOP's
3186                             Interrupt Channel Register.
3187 Return:   void
3188 Comments: If an interrupt enable flag is set in Flags, that interrupt will be
3189           enabled.  If an interrupt enable flag is not set in Flags, that
3190           interrupt will not be changed.  Interrupts can be disabled with
3191           function sDisInterrupts().
3192
3193           This function sets the appropriate bit for the channel in the AIOP's
3194           Interrupt Mask Register if the CHANINT_EN flag is set.  This allows
3195           this channel's bit to be set in the AIOP's Interrupt Channel Register.
3196
3197           Interrupts must also be globally enabled before channel interrupts
3198           will be passed on to the host.  This is done with function
3199           sEnGlobalInt().
3200
3201           In some cases it may be desirable to disable interrupts globally but
3202           enable channel interrupts.  This would allow the global interrupt
3203           status register to be used to determine which AIOPs need service.
3204 */
3205 void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags)
3206 {
3207         Byte_t Mask;            /* Interrupt Mask Register */
3208
3209         ChP->RxControl[2] |=
3210             ((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3211
3212         sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->RxControl[0]);
3213
3214         ChP->TxControl[2] |= ((Byte_t) Flags & TXINT_EN);
3215
3216         sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxControl[0]);
3217
3218         if (Flags & CHANINT_EN) {
3219                 Mask = sInB(ChP->IntMask) | sBitMapSetTbl[ChP->ChanNum];
3220                 sOutB(ChP->IntMask, Mask);
3221         }
3222 }
3223
3224 /***************************************************************************
3225 Function: sDisInterrupts
3226 Purpose:  Disable one or more interrupts for a channel
3227 Call:     sDisInterrupts(ChP,Flags)
3228           CHANNEL_T *ChP; Ptr to channel structure
3229           Word_t Flags: Interrupt flags, can be any combination
3230              of the following flags:
3231                 TXINT_EN:   Interrupt on Tx FIFO empty
3232                 RXINT_EN:   Interrupt on Rx FIFO at trigger level (see
3233                             sSetRxTrigger())
3234                 SRCINT_EN:  Interrupt on SRC (Special Rx Condition)
3235                 MCINT_EN:   Interrupt on modem input change
3236                 CHANINT_EN: Disable channel interrupt signal to the
3237                             AIOP's Interrupt Channel Register.
3238 Return:   void
3239 Comments: If an interrupt flag is set in Flags, that interrupt will be
3240           disabled.  If an interrupt flag is not set in Flags, that
3241           interrupt will not be changed.  Interrupts can be enabled with
3242           function sEnInterrupts().
3243
3244           This function clears the appropriate bit for the channel in the AIOP's
3245           Interrupt Mask Register if the CHANINT_EN flag is set.  This blocks
3246           this channel's bit from being set in the AIOP's Interrupt Channel
3247           Register.
3248 */
3249 void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags)
3250 {
3251         Byte_t Mask;            /* Interrupt Mask Register */
3252
3253         ChP->RxControl[2] &=
3254             ~((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3255         sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->RxControl[0]);
3256         ChP->TxControl[2] &= ~((Byte_t) Flags & TXINT_EN);
3257         sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxControl[0]);
3258
3259         if (Flags & CHANINT_EN) {
3260                 Mask = sInB(ChP->IntMask) & sBitMapClrTbl[ChP->ChanNum];
3261                 sOutB(ChP->IntMask, Mask);
3262         }
3263 }
3264
3265 void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode)
3266 {
3267         sOutB(ChP->CtlP->AiopIO[2], (mode & 0x18) | ChP->ChanNum);
3268 }
3269
3270 /*
3271  *  Not an official SSCI function, but how to reset RocketModems.
3272  *  ISA bus version
3273  */
3274 void sModemReset(CONTROLLER_T * CtlP, int chan, int on)
3275 {
3276         ByteIO_t addr;
3277         Byte_t val;
3278
3279         addr = CtlP->AiopIO[0] + 0x400;
3280         val = sInB(CtlP->MReg3IO);
3281         /* if AIOP[1] is not enabled, enable it */
3282         if ((val & 2) == 0) {
3283                 val = sInB(CtlP->MReg2IO);
3284                 sOutB(CtlP->MReg2IO, (val & 0xfc) | (1 & 0x03));
3285                 sOutB(CtlP->MBaseIO, (unsigned char) (addr >> 6));
3286         }
3287
3288         sEnAiop(CtlP, 1);
3289         if (!on)
3290                 addr += 8;
3291         sOutB(addr + chan, 0);  /* apply or remove reset */
3292         sDisAiop(CtlP, 1);
3293 }
3294
3295 /*
3296  *  Not an official SSCI function, but how to reset RocketModems.
3297  *  PCI bus version
3298  */
3299 void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on)
3300 {
3301         ByteIO_t addr;
3302
3303         addr = CtlP->AiopIO[0] + 0x40;  /* 2nd AIOP */
3304         if (!on)
3305                 addr += 8;
3306         sOutB(addr + chan, 0);  /* apply or remove reset */
3307 }
3308
3309 /*  Resets the speaker controller on RocketModem II and III devices */
3310 static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model)
3311 {
3312         ByteIO_t addr;
3313
3314         /* RocketModem II speaker control is at the 8th port location of offset 0x40 */
3315         if ((model == MODEL_RP4M) || (model == MODEL_RP6M)) {
3316                 addr = CtlP->AiopIO[0] + 0x4F;
3317                 sOutB(addr, 0);
3318         }
3319
3320         /* RocketModem III speaker control is at the 1st port location of offset 0x80 */
3321         if ((model == MODEL_UPCI_RM3_8PORT)
3322             || (model == MODEL_UPCI_RM3_4PORT)) {
3323                 addr = CtlP->AiopIO[0] + 0x88;
3324                 sOutB(addr, 0);
3325         }
3326 }
3327
3328 /*  Returns the line number given the controller (board), aiop and channel number */
3329 static unsigned char GetLineNumber(int ctrl, int aiop, int ch)
3330 {
3331         return lineNumbers[(ctrl << 5) | (aiop << 3) | ch];
3332 }
3333
3334 /*
3335  *  Stores the line number associated with a given controller (board), aiop
3336  *  and channel number.
3337  *  Returns:  The line number assigned
3338  */
3339 static unsigned char SetLineNumber(int ctrl, int aiop, int ch)
3340 {
3341         lineNumbers[(ctrl << 5) | (aiop << 3) | ch] = nextLineNumber++;
3342         return (nextLineNumber - 1);
3343 }