arch/m68k/q40/config.c

   1 /*
   2  *  arch/m68k/q40/config.c
   3  *
   4  *  Copyright (C) 1999 Richard Zidlicky
   5  *
   6  * originally based on:
   7  *
   8  *  linux/bvme/config.c
   9  *
  10  * This file is subject to the terms and conditions of the GNU General Public
  11  * License.  See the file README.legal in the main directory of this archive
  12  * for more details.
  13  */
  14
  15 #include <linux/config.h>
  16 #include <linux/types.h>
  17 #include <linux/kernel.h>
  18 #include <linux/mm.h>
  19 #include <linux/tty.h>
  20 #include <linux/console.h>
  21 #include <linux/linkage.h>
  22 #include <linux/init.h>
  23 #include <linux/major.h>
  24 #include <linux/serial_reg.h>
  25 #include <linux/rtc.h>
  26 #include <linux/vt_kern.h>
  27
  28 #include <asm/io.h>
  29 #include <asm/rtc.h>
  30 #include <asm/bootinfo.h>
  31 #include <asm/system.h>
  32 #include <asm/pgtable.h>
  33 #include <asm/setup.h>
  34 #include <asm/irq.h>
  35 #include <asm/traps.h>
  36 #include <asm/rtc.h>
  37 #include <asm/machdep.h>
  38 #include <asm/q40_master.h>
  39
  40 extern void floppy_setup(char *str, int *ints);
  41
  42 extern irqreturn_t q40_process_int (int level, struct pt_regs *regs);
  43 extern irqreturn_t (*q40_default_handler[]) (int, void *, struct pt_regs *);  /* added just for debugging */
  44 extern void q40_init_IRQ (void);
  45 extern void q40_free_irq (unsigned int, void *);
  46 extern int  show_q40_interrupts (struct seq_file *, void *);
  47 extern void q40_enable_irq (unsigned int);
  48 extern void q40_disable_irq (unsigned int);
  49 static void q40_get_model(char *model);
  50 static int  q40_get_hardware_list(char *buffer);
  51 extern int  q40_request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *), unsigned long flags, const char *devname, void *dev_id);
  52 extern void q40_sched_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
  53
  54 extern unsigned long q40_gettimeoffset (void);
  55 extern int q40_hwclk (int, struct rtc_time *);
  56 extern unsigned int q40_get_ss (void);
  57 extern int q40_set_clock_mmss (unsigned long);
  58 static int q40_get_rtc_pll(struct rtc_pll_info *pll);
  59 static int q40_set_rtc_pll(struct rtc_pll_info *pll);
  60 extern void q40_reset (void);
  61 void q40_halt(void);
  62 extern void q40_waitbut(void);
  63 void q40_set_vectors (void);
  64
  65 extern void q40_mksound(unsigned int /*freq*/, unsigned int /*ticks*/ );
  66
  67 extern char m68k_debug_device[];
  68 static void q40_mem_console_write(struct console *co, const char *b,
  69                                     unsigned int count);
  70
  71 extern int ql_ticks;
  72
  73 static struct console q40_console_driver = {
  74         .name =         "debug",
  75         .flags =        CON_PRINTBUFFER,
  76         .index =        -1,
  77 };
  78
  79
  80 /* early debugging function:*/
  81 extern char *q40_mem_cptr; /*=(char *)0xff020000;*/
  82 static int _cpleft;
  83
  84 static void q40_mem_console_write(struct console *co, const char *s,
  85                                   unsigned int count)
  86 {
  87   char *p=(char *)s;
  88
  89   if (count<_cpleft)
  90     while (count-- >0){
  91       *q40_mem_cptr=*p++;
  92       q40_mem_cptr+=4;
  93       _cpleft--;
  94     }
  95 }
  96 #if 0
  97 void printq40(char *str)
  98 {
  99   int l=strlen(str);
 100   char *p=q40_mem_cptr;
 101
 102   while (l-- >0 && _cpleft-- >0)
 103     {
 104       *p=*str++;
 105       p+=4;
 106     }
 107   q40_mem_cptr=p;
 108 }
 109 #endif
 110
 111 static int halted=0;
 112
 113 #ifdef CONFIG_HEARTBEAT
 114 static void q40_heartbeat(int on)
 115 {
 116   if (halted) return;
 117
 118   if (on)
 119     Q40_LED_ON();
 120   else
 121     Q40_LED_OFF();
 122 }
 123 #endif
 124
 125 void q40_reset(void)
 126 {
 127         halted=1;
 128         printk ("\n\n*******************************************\n"
 129                 "Called q40_reset : press the RESET button!! \n"
 130                 "*******************************************\n");
 131         Q40_LED_ON();
 132         while(1) ;
 133 }
 134 void q40_halt(void)
 135 {
 136         halted=1;
 137         printk ("\n\n*******************\n"
 138                     "  Called q40_halt\n"
 139                     "*******************\n");
 140         Q40_LED_ON();
 141         while(1) ;
 142 }
 143
 144 static void q40_get_model(char *model)
 145 {
 146     sprintf(model, "Q40");
 147 }
 148
 149 /* No hardware options on Q40? */
 150
 151 static int q40_get_hardware_list(char *buffer)
 152 {
 153     *buffer = '\0';
 154     return 0;
 155 }
 156
 157 static unsigned int serports[]={0x3f8,0x2f8,0x3e8,0x2e8,0};
 158 void q40_disable_irqs(void)
 159 {
 160   unsigned i,j;
 161
 162   j=0;
 163   while((i=serports[j++])) outb(0,i+UART_IER);
 164   master_outb(0,EXT_ENABLE_REG);
 165   master_outb(0,KEY_IRQ_ENABLE_REG);
 166 }
 167
 168 void __init config_q40(void)
 169 {
 170     mach_sched_init      = q40_sched_init;
 171
 172     mach_init_IRQ        = q40_init_IRQ;
 173     mach_gettimeoffset   = q40_gettimeoffset;
 174     mach_hwclk           = q40_hwclk;
 175     mach_get_ss          = q40_get_ss;
 176     mach_get_rtc_pll     = q40_get_rtc_pll;
 177     mach_set_rtc_pll     = q40_set_rtc_pll;
 178     mach_set_clock_mmss  = q40_set_clock_mmss;
 179
 180     mach_reset           = q40_reset;
 181     mach_free_irq        = q40_free_irq;
 182     mach_process_int     = q40_process_int;
 183     mach_get_irq_list    = show_q40_interrupts;
 184     mach_request_irq     = q40_request_irq;
 185     enable_irq           = q40_enable_irq;
 186     disable_irq          = q40_disable_irq;
 187     mach_default_handler = &q40_default_handler;
 188     mach_get_model       = q40_get_model;
 189     mach_get_hardware_list = q40_get_hardware_list;
 190
 191 #if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
 192     mach_beep            = q40_mksound;
 193 #endif
 194 #ifdef CONFIG_HEARTBEAT
 195     mach_heartbeat = q40_heartbeat;
 196 #endif
 197     mach_halt = q40_halt;
 198 #ifdef CONFIG_DUMMY_CONSOLE
 199     conswitchp = &dummy_con;
 200 #endif
 201
 202     /* disable a few things that SMSQ might have left enabled */
 203     q40_disable_irqs();
 204
 205     /* no DMA at all, but ide-scsi requires it.. make sure
 206      * all physical RAM fits into the boundary - otherwise
 207      * allocator may play costly and useless tricks */
 208     mach_max_dma_address = 1024*1024*1024;
 209
 210     /* useful for early debugging stages - writes kernel messages into SRAM */
 211     if (!strncmp( m68k_debug_device,"mem",3 ))
 212       {
 213         /*printk("using NVRAM debug, q40_mem_cptr=%p\n",q40_mem_cptr);*/
 214         _cpleft=2000-((long)q40_mem_cptr-0xff020000)/4;
 215         q40_console_driver.write = q40_mem_console_write;
 216         register_console(&q40_console_driver);
 217       }
 218 }
 219
 220
 221 int q40_parse_bootinfo(const struct bi_record *rec)
 222 {
 223   return 1;
 224 }
 225
 226
 227 static inline unsigned char bcd2bin (unsigned char b)
 228 {
 229         return ((b>>4)*10 + (b&15));
 230 }
 231
 232 static inline unsigned char bin2bcd (unsigned char b)
 233 {
 234         return (((b/10)*16) + (b%10));
 235 }
 236
 237
 238 unsigned long q40_gettimeoffset (void)
 239 {
 240     return 5000*(ql_ticks!=0);
 241 }
 242
 243
 244 /*
 245  * Looks like op is non-zero for setting the clock, and zero for
 246  * reading the clock.
 247  *
 248  *  struct hwclk_time {
 249  *         unsigned        sec;       0..59
 250  *         unsigned        min;       0..59
 251  *         unsigned        hour;      0..23
 252  *         unsigned        day;       1..31
 253  *         unsigned        mon;       0..11
 254  *         unsigned        year;      00...
 255  *         int             wday;      0..6, 0 is Sunday, -1 means unknown/don't set
 256  * };
 257  */
 258
 259 int q40_hwclk(int op, struct rtc_time *t)
 260 {
 261         if (op)
 262         {       /* Write.... */
 263                 Q40_RTC_CTRL |= Q40_RTC_WRITE;
 264
 265                 Q40_RTC_SECS = bin2bcd(t->tm_sec);
 266                 Q40_RTC_MINS = bin2bcd(t->tm_min);
 267                 Q40_RTC_HOUR = bin2bcd(t->tm_hour);
 268                 Q40_RTC_DATE = bin2bcd(t->tm_mday);
 269                 Q40_RTC_MNTH = bin2bcd(t->tm_mon + 1);
 270                 Q40_RTC_YEAR = bin2bcd(t->tm_year%100);
 271                 if (t->tm_wday >= 0)
 272                         Q40_RTC_DOW = bin2bcd(t->tm_wday+1);
 273
 274                 Q40_RTC_CTRL &= ~(Q40_RTC_WRITE);
 275         }
 276         else
 277         {       /* Read....  */
 278           Q40_RTC_CTRL |= Q40_RTC_READ;
 279
 280           t->tm_year = bcd2bin (Q40_RTC_YEAR);
 281           t->tm_mon  = bcd2bin (Q40_RTC_MNTH)-1;
 282           t->tm_mday = bcd2bin (Q40_RTC_DATE);
 283           t->tm_hour = bcd2bin (Q40_RTC_HOUR);
 284           t->tm_min  = bcd2bin (Q40_RTC_MINS);
 285           t->tm_sec  = bcd2bin (Q40_RTC_SECS);
 286
 287           Q40_RTC_CTRL &= ~(Q40_RTC_READ);
 288
 289           if (t->tm_year < 70)
 290             t->tm_year += 100;
 291           t->tm_wday = bcd2bin(Q40_RTC_DOW)-1;
 292
 293         }
 294
 295         return 0;
 296 }
 297
 298 unsigned int q40_get_ss(void)
 299 {
 300         return bcd2bin(Q40_RTC_SECS);
 301 }
 302
 303 /*
 304  * Set the minutes and seconds from seconds value 'nowtime'.  Fail if
 305  * clock is out by > 30 minutes.  Logic lifted from atari code.
 306  */
 307
 308 int q40_set_clock_mmss (unsigned long nowtime)
 309 {
 310         int retval = 0;
 311         short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
 312
 313         int rtc_minutes;
 314
 315
 316         rtc_minutes = bcd2bin (Q40_RTC_MINS);
 317
 318         if ((rtc_minutes < real_minutes
 319                 ? real_minutes - rtc_minutes
 320                         : rtc_minutes - real_minutes) < 30)
 321         {
 322                 Q40_RTC_CTRL |= Q40_RTC_WRITE;
 323                 Q40_RTC_MINS = bin2bcd(real_minutes);
 324                 Q40_RTC_SECS = bin2bcd(real_seconds);
 325                 Q40_RTC_CTRL &= ~(Q40_RTC_WRITE);
 326         }
 327         else
 328                 retval = -1;
 329
 330
 331         return retval;
 332 }
 333
 334
 335 /* get and set PLL calibration of RTC clock */
 336 #define Q40_RTC_PLL_MASK ((1<<5)-1)
 337 #define Q40_RTC_PLL_SIGN (1<<5)
 338
 339 static int q40_get_rtc_pll(struct rtc_pll_info *pll)
 340 {
 341         int tmp=Q40_RTC_CTRL;
 342         pll->pll_value = tmp & Q40_RTC_PLL_MASK;
 343         if (tmp & Q40_RTC_PLL_SIGN)
 344                 pll->pll_value = -pll->pll_value;
 345         pll->pll_max=31;
 346         pll->pll_min=-31;
 347         pll->pll_posmult=512;
 348         pll->pll_negmult=256;
 349         pll->pll_clock=125829120;
 350         return 0;
 351 }
 352
 353 static int q40_set_rtc_pll(struct rtc_pll_info *pll)
 354 {
 355         if (!pll->pll_ctrl){
 356                 /* the docs are a bit unclear so I am doublesetting */
 357                 /* RTC_WRITE here ... */
 358                 int tmp = (pll->pll_value & 31) | (pll->pll_value<0 ? 32 : 0) |
 359                           Q40_RTC_WRITE;
 360                 Q40_RTC_CTRL |= Q40_RTC_WRITE;
 361                 Q40_RTC_CTRL = tmp;
 362                 Q40_RTC_CTRL &= ~(Q40_RTC_WRITE);
 363                 return 0;
 364         } else
 365                 return -EINVAL;
 366 }