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MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / net / tulip / tulip_core.c
blobcff6f977cd4674fc018ba4dd8a9408dea552f82e
1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux. */
2
3 /*
4 Maintained by Jeff Garzik <jgarzik@pobox.com>
5 Copyright 2000,2001 The Linux Kernel Team
6 Written/copyright 1994-2001 by Donald Becker.
7
8 This software may be used and distributed according to the terms
9 of the GNU General Public License, incorporated herein by reference.
10
11 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
12 for more information on this driver, or visit the project
13 Web page at http://sourceforge.net/projects/tulip/
14
15 */
16
17 #include <linux/config.h>
18
19 #define DRV_NAME "tulip"
20 #ifdef CONFIG_TULIP_NAPI
21 #define DRV_VERSION "1.1.13-NAPI" /* Keep at least for test */
22 #else
23 #define DRV_VERSION "1.1.13"
24 #endif
25 #define DRV_RELDATE "May 11, 2002"
26
27
28 #include <linux/module.h>
29 #include "tulip.h"
30 #include <linux/pci.h>
31 #include <linux/init.h>
32 #include <linux/etherdevice.h>
33 #include <linux/delay.h>
34 #include <linux/mii.h>
35 #include <linux/ethtool.h>
36 #include <linux/crc32.h>
37 #include <asm/unaligned.h>
38 #include <asm/uaccess.h>
39
40 #ifdef __sparc__
41 #include <asm/pbm.h>
42 #endif
43
44 static char version[] __devinitdata =
45 "Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
46
47
48 /* A few user-configurable values. */
49
50 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
51 static unsigned int max_interrupt_work = 25;
52
53 #define MAX_UNITS 8
54 /* Used to pass the full-duplex flag, etc. */
55 static int full_duplex[MAX_UNITS];
56 static int options[MAX_UNITS];
57 static int mtu[MAX_UNITS]; /* Jumbo MTU for interfaces. */
58
59 /* The possible media types that can be set in options[] are: */
60 const char * const medianame[32] = {
61 "10baseT", "10base2", "AUI", "100baseTx",
62 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
63 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
64 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
65 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
66 "","","","", "","","","", "","","","Transceiver reset",
67 };
68
69 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
70 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) \
71 || defined(__sparc_) || defined(__ia64__) \
72 || defined(__sh__) || defined(__mips__)
73 static int rx_copybreak = 1518;
74 #else
75 static int rx_copybreak = 100;
76 #endif
77
78 /*
79 Set the bus performance register.
80 Typical: Set 16 longword cache alignment, no burst limit.
81 Cache alignment bits 15:14 Burst length 13:8
82 0000 No alignment 0x00000000 unlimited 0800 8 longwords
83 4000 8 longwords 0100 1 longword 1000 16 longwords
84 8000 16 longwords 0200 2 longwords 2000 32 longwords
85 C000 32 longwords 0400 4 longwords
86 Warning: many older 486 systems are broken and require setting 0x00A04800
87 8 longword cache alignment, 8 longword burst.
88 ToDo: Non-Intel setting could be better.
89 */
90
91 #if defined(__alpha__) || defined(__ia64__) || defined(__x86_64__)
92 static int csr0 = 0x01A00000 | 0xE000;
93 #elif defined(__i386__) || defined(__powerpc__)
94 static int csr0 = 0x01A00000 | 0x8000;
95 #elif defined(__sparc__) || defined(__hppa__)
96 /* The UltraSparc PCI controllers will disconnect at every 64-byte
97 * crossing anyways so it makes no sense to tell Tulip to burst
98 * any more than that.
99 */
100 static int csr0 = 0x01A00000 | 0x9000;
101 #elif defined(__arm__) || defined(__sh__)
102 static int csr0 = 0x01A00000 | 0x4800;
103 #elif defined(__mips__)
104 static int csr0 = 0x00200000 | 0x4000;
105 #else
106 #warning Processor architecture undefined!
107 static int csr0 = 0x00A00000 | 0x4800;
108 #endif
109
110 /* Operational parameters that usually are not changed. */
111 /* Time in jiffies before concluding the transmitter is hung. */
112 #define TX_TIMEOUT (4*HZ)
113
114
115 MODULE_AUTHOR("The Linux Kernel Team");
116 MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
117 MODULE_LICENSE("GPL");
118 MODULE_PARM(tulip_debug, "i");
119 MODULE_PARM(max_interrupt_work, "i");
120 MODULE_PARM(rx_copybreak, "i");
121 MODULE_PARM(csr0, "i");
122 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
123 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
124
125 #define PFX DRV_NAME ": "
126
127 #ifdef TULIP_DEBUG
128 int tulip_debug = TULIP_DEBUG;
129 #else
130 int tulip_debug = 1;
131 #endif
132
133
134
135 /*
136 * This table use during operation for capabilities and media timer.
137 *
138 * It is indexed via the values in 'enum chips'
139 */
140
141 struct tulip_chip_table tulip_tbl[] = {
142 { }, /* placeholder for array, slot unused currently */
143 { }, /* placeholder for array, slot unused currently */
144
145 /* DC21140 */
146 { "Digital DS21140 Tulip", 128, 0x0001ebef,
147 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer },
148
149 /* DC21142, DC21143 */
150 { "Digital DS21143 Tulip", 128, 0x0801fbff,
151 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
152 | HAS_INTR_MITIGATION | HAS_PCI_MWI, t21142_timer },
153
154 /* LC82C168 */
155 { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
156 HAS_MII | HAS_PNICNWAY, pnic_timer },
157
158 /* MX98713 */
159 { "Macronix 98713 PMAC", 128, 0x0001ebef,
160 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
161
162 /* MX98715 */
163 { "Macronix 98715 PMAC", 256, 0x0001ebef,
164 HAS_MEDIA_TABLE, mxic_timer },
165
166 /* MX98725 */
167 { "Macronix 98725 PMAC", 256, 0x0001ebef,
168 HAS_MEDIA_TABLE, mxic_timer },
169
170 /* AX88140 */
171 { "ASIX AX88140", 128, 0x0001fbff,
172 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
173 | IS_ASIX, tulip_timer },
174
175 /* PNIC2 */
176 { "Lite-On PNIC-II", 256, 0x0801fbff,
177 HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer },
178
179 /* COMET */
180 { "ADMtek Comet", 256, 0x0001abef,
181 HAS_MII | MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer },
182
183 /* COMPEX9881 */
184 { "Compex 9881 PMAC", 128, 0x0001ebef,
185 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
186
187 /* I21145 */
188 { "Intel DS21145 Tulip", 128, 0x0801fbff,
189 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
190 | HAS_NWAY | HAS_PCI_MWI, t21142_timer },
191
192 /* DM910X */
193 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
194 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
195 tulip_timer },
196
197 /* RS7112 */
198 { "Conexant LANfinity", 256, 0x0001ebef,
199 HAS_MII | HAS_ACPI, tulip_timer },
200 };
201
202
203 static struct pci_device_id tulip_pci_tbl[] = {
204 { 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
205 { 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
206 { 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
207 { 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
208 { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
209 /* { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
210 { 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
211 { 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
212 { 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
213 { 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
214 { 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
215 { 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
216 { 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
217 { 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
218 { 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
219 { 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
220 { 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
221 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
222 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
223 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
224 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
225 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
226 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
227 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
228 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
229 { 0x1186, 0x1541, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
230 { 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
231 { 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
232 { 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
233 { 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
234 { 0x1737, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
235 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
236 { 0x10b9, 0x5261, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X }, /* ALi 1563 integrated ethernet */
237 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
238 { } /* terminate list */
239 };
240 MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
241
242
243 /* A full-duplex map for media types. */
244 const char tulip_media_cap[32] =
245 {0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
246
247 static void tulip_tx_timeout(struct net_device *dev);
248 static void tulip_init_ring(struct net_device *dev);
249 static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
250 static int tulip_open(struct net_device *dev);
251 static int tulip_close(struct net_device *dev);
252 static void tulip_up(struct net_device *dev);
253 static void tulip_down(struct net_device *dev);
254 static struct net_device_stats *tulip_get_stats(struct net_device *dev);
255 static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
256 static void set_rx_mode(struct net_device *dev);
257 #ifdef CONFIG_NET_POLL_CONTROLLER
258 static void poll_tulip(struct net_device *dev);
259 #endif
260
261 static void tulip_set_power_state (struct tulip_private *tp,
262 int sleep, int snooze)
263 {
264 if (tp->flags & HAS_ACPI) {
265 u32 tmp, newtmp;
266 pci_read_config_dword (tp->pdev, CFDD, &tmp);
267 newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
268 if (sleep)
269 newtmp |= CFDD_Sleep;
270 else if (snooze)
271 newtmp |= CFDD_Snooze;
272 if (tmp != newtmp)
273 pci_write_config_dword (tp->pdev, CFDD, newtmp);
274 }
275
276 }
277
278
279 static void tulip_up(struct net_device *dev)
280 {
281 struct tulip_private *tp = netdev_priv(dev);
282 long ioaddr = dev->base_addr;
283 int next_tick = 3*HZ;
284 int i;
285
286 /* Wake the chip from sleep/snooze mode. */
287 tulip_set_power_state (tp, 0, 0);
288
289 /* On some chip revs we must set the MII/SYM port before the reset!? */
290 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
291 outl(0x00040000, ioaddr + CSR6);
292
293 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
294 outl(0x00000001, ioaddr + CSR0);
295 udelay(100);
296
297 /* Deassert reset.
298 Wait the specified 50 PCI cycles after a reset by initializing
299 Tx and Rx queues and the address filter list. */
300 outl(tp->csr0, ioaddr + CSR0);
301 udelay(100);
302
303 if (tulip_debug > 1)
304 printk(KERN_DEBUG "%s: tulip_up(), irq==%d.\n", dev->name, dev->irq);
305
306 outl(tp->rx_ring_dma, ioaddr + CSR3);
307 outl(tp->tx_ring_dma, ioaddr + CSR4);
308 tp->cur_rx = tp->cur_tx = 0;
309 tp->dirty_rx = tp->dirty_tx = 0;
310
311 if (tp->flags & MC_HASH_ONLY) {
312 u32 addr_low = le32_to_cpu(get_unaligned((u32 *)dev->dev_addr));
313 u32 addr_high = le16_to_cpu(get_unaligned((u16 *)(dev->dev_addr+4)));
314 if (tp->chip_id == AX88140) {
315 outl(0, ioaddr + CSR13);
316 outl(addr_low, ioaddr + CSR14);
317 outl(1, ioaddr + CSR13);
318 outl(addr_high, ioaddr + CSR14);
319 } else if (tp->flags & COMET_MAC_ADDR) {
320 outl(addr_low, ioaddr + 0xA4);
321 outl(addr_high, ioaddr + 0xA8);
322 outl(0, ioaddr + 0xAC);
323 outl(0, ioaddr + 0xB0);
324 }
325 } else {
326 /* This is set_rx_mode(), but without starting the transmitter. */
327 u16 *eaddrs = (u16 *)dev->dev_addr;
328 u16 *setup_frm = &tp->setup_frame[15*6];
329 dma_addr_t mapping;
330
331 /* 21140 bug: you must add the broadcast address. */
332 memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
333 /* Fill the final entry of the table with our physical address. */
334 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
335 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
336 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
337
338 mapping = pci_map_single(tp->pdev, tp->setup_frame,
339 sizeof(tp->setup_frame),
340 PCI_DMA_TODEVICE);
341 tp->tx_buffers[tp->cur_tx].skb = NULL;
342 tp->tx_buffers[tp->cur_tx].mapping = mapping;
343
344 /* Put the setup frame on the Tx list. */
345 tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
346 tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
347 tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
348
349 tp->cur_tx++;
350 }
351
352 tp->saved_if_port = dev->if_port;
353 if (dev->if_port == 0)
354 dev->if_port = tp->default_port;
355
356 /* Allow selecting a default media. */
357 i = 0;
358 if (tp->mtable == NULL)
359 goto media_picked;
360 if (dev->if_port) {
361 int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
362 (dev->if_port == 12 ? 0 : dev->if_port);
363 for (i = 0; i < tp->mtable->leafcount; i++)
364 if (tp->mtable->mleaf[i].media == looking_for) {
365 printk(KERN_INFO "%s: Using user-specified media %s.\n",
366 dev->name, medianame[dev->if_port]);
367 goto media_picked;
368 }
369 }
370 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
371 int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
372 for (i = 0; i < tp->mtable->leafcount; i++)
373 if (tp->mtable->mleaf[i].media == looking_for) {
374 printk(KERN_INFO "%s: Using EEPROM-set media %s.\n",
375 dev->name, medianame[looking_for]);
376 goto media_picked;
377 }
378 }
379 /* Start sensing first non-full-duplex media. */
380 for (i = tp->mtable->leafcount - 1;
381 (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
382 ;
383 media_picked:
384
385 tp->csr6 = 0;
386 tp->cur_index = i;
387 tp->nwayset = 0;
388
389 if (dev->if_port) {
390 if (tp->chip_id == DC21143 &&
391 (tulip_media_cap[dev->if_port] & MediaIsMII)) {
392 /* We must reset the media CSRs when we force-select MII mode. */
393 outl(0x0000, ioaddr + CSR13);
394 outl(0x0000, ioaddr + CSR14);
395 outl(0x0008, ioaddr + CSR15);
396 }
397 tulip_select_media(dev, 1);
398 } else if (tp->chip_id == DC21142) {
399 if (tp->mii_cnt) {
400 tulip_select_media(dev, 1);
401 if (tulip_debug > 1)
402 printk(KERN_INFO "%s: Using MII transceiver %d, status "
403 "%4.4x.\n",
404 dev->name, tp->phys[0], tulip_mdio_read(dev, tp->phys[0], 1));
405 outl(csr6_mask_defstate, ioaddr + CSR6);
406 tp->csr6 = csr6_mask_hdcap;
407 dev->if_port = 11;
408 outl(0x0000, ioaddr + CSR13);
409 outl(0x0000, ioaddr + CSR14);
410 } else
411 t21142_start_nway(dev);
412 } else if (tp->chip_id == PNIC2) {
413 /* for initial startup advertise 10/100 Full and Half */
414 tp->sym_advertise = 0x01E0;
415 /* enable autonegotiate end interrupt */
416 outl(inl(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
417 outl(inl(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
418 pnic2_start_nway(dev);
419 } else if (tp->chip_id == LC82C168 && ! tp->medialock) {
420 if (tp->mii_cnt) {
421 dev->if_port = 11;
422 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
423 outl(0x0001, ioaddr + CSR15);
424 } else if (inl(ioaddr + CSR5) & TPLnkPass)
425 pnic_do_nway(dev);
426 else {
427 /* Start with 10mbps to do autonegotiation. */
428 outl(0x32, ioaddr + CSR12);
429 tp->csr6 = 0x00420000;
430 outl(0x0001B078, ioaddr + 0xB8);
431 outl(0x0201B078, ioaddr + 0xB8);
432 next_tick = 1*HZ;
433 }
434 } else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881)
435 && ! tp->medialock) {
436 dev->if_port = 0;
437 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
438 outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
439 } else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
440 /* Provided by BOLO, Macronix - 12/10/1998. */
441 dev->if_port = 0;
442 tp->csr6 = 0x01a80200;
443 outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
444 outl(0x11000 | inw(ioaddr + 0xa0), ioaddr + 0xa0);
445 } else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
446 /* Enable automatic Tx underrun recovery. */
447 outl(inl(ioaddr + 0x88) | 1, ioaddr + 0x88);
448 dev->if_port = tp->mii_cnt ? 11 : 0;
449 tp->csr6 = 0x00040000;
450 } else if (tp->chip_id == AX88140) {
451 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
452 } else
453 tulip_select_media(dev, 1);
454
455 /* Start the chip's Tx to process setup frame. */
456 tulip_stop_rxtx(tp);
457 barrier();
458 udelay(5);
459 outl(tp->csr6 | TxOn, ioaddr + CSR6);
460
461 /* Enable interrupts by setting the interrupt mask. */
462 outl(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
463 outl(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
464 tulip_start_rxtx(tp);
465 outl(0, ioaddr + CSR2); /* Rx poll demand */
466
467 if (tulip_debug > 2) {
468 printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %8.8x, CSR5 %8.8x CSR6 %8.8x.\n",
469 dev->name, inl(ioaddr + CSR0), inl(ioaddr + CSR5),
470 inl(ioaddr + CSR6));
471 }
472
473 /* Set the timer to switch to check for link beat and perhaps switch
474 to an alternate media type. */
475 tp->timer.expires = RUN_AT(next_tick);
476 add_timer(&tp->timer);
477 #ifdef CONFIG_TULIP_NAPI
478 init_timer(&tp->oom_timer);
479 tp->oom_timer.data = (unsigned long)dev;
480 tp->oom_timer.function = oom_timer;
481 #endif
482 }
483
484 static int
485 tulip_open(struct net_device *dev)
486 {
487 int retval;
488
489 if ((retval = request_irq(dev->irq, &tulip_interrupt, SA_SHIRQ, dev->name, dev)))
490 return retval;
491
492 tulip_init_ring (dev);
493
494 tulip_up (dev);
495
496 netif_start_queue (dev);
497
498 return 0;
499 }
500
501
502 static void tulip_tx_timeout(struct net_device *dev)
503 {
504 struct tulip_private *tp = netdev_priv(dev);
505 long ioaddr = dev->base_addr;
506 unsigned long flags;
507
508 spin_lock_irqsave (&tp->lock, flags);
509
510 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
511 /* Do nothing -- the media monitor should handle this. */
512 if (tulip_debug > 1)
513 printk(KERN_WARNING "%s: Transmit timeout using MII device.\n",
514 dev->name);
515 } else if (tp->chip_id == DC21140 || tp->chip_id == DC21142
516 || tp->chip_id == MX98713 || tp->chip_id == COMPEX9881
517 || tp->chip_id == DM910X) {
518 printk(KERN_WARNING "%s: 21140 transmit timed out, status %8.8x, "
519 "SIA %8.8x %8.8x %8.8x %8.8x, resetting...\n",
520 dev->name, inl(ioaddr + CSR5), inl(ioaddr + CSR12),
521 inl(ioaddr + CSR13), inl(ioaddr + CSR14), inl(ioaddr + CSR15));
522 if ( ! tp->medialock && tp->mtable) {
523 do
524 --tp->cur_index;
525 while (tp->cur_index >= 0
526 && (tulip_media_cap[tp->mtable->mleaf[tp->cur_index].media]
527 & MediaIsFD));
528 if (--tp->cur_index < 0) {
529 /* We start again, but should instead look for default. */
530 tp->cur_index = tp->mtable->leafcount - 1;
531 }
532 tulip_select_media(dev, 0);
533 printk(KERN_WARNING "%s: transmit timed out, switching to %s "
534 "media.\n", dev->name, medianame[dev->if_port]);
535 }
536 } else if (tp->chip_id == PNIC2) {
537 printk(KERN_WARNING "%s: PNIC2 transmit timed out, status %8.8x, "
538 "CSR6/7 %8.8x / %8.8x CSR12 %8.8x, resetting...\n",
539 dev->name, (int)inl(ioaddr + CSR5), (int)inl(ioaddr + CSR6),
540 (int)inl(ioaddr + CSR7), (int)inl(ioaddr + CSR12));
541 } else {
542 printk(KERN_WARNING "%s: Transmit timed out, status %8.8x, CSR12 "
543 "%8.8x, resetting...\n",
544 dev->name, inl(ioaddr + CSR5), inl(ioaddr + CSR12));
545 dev->if_port = 0;
546 }
547
548 #if defined(way_too_many_messages)
549 if (tulip_debug > 3) {
550 int i;
551 for (i = 0; i < RX_RING_SIZE; i++) {
552 u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
553 int j;
554 printk(KERN_DEBUG "%2d: %8.8x %8.8x %8.8x %8.8x "
555 "%2.2x %2.2x %2.2x.\n",
556 i, (unsigned int)tp->rx_ring[i].status,
557 (unsigned int)tp->rx_ring[i].length,
558 (unsigned int)tp->rx_ring[i].buffer1,
559 (unsigned int)tp->rx_ring[i].buffer2,
560 buf[0], buf[1], buf[2]);
561 for (j = 0; buf[j] != 0xee && j < 1600; j++)
562 if (j < 100) printk(" %2.2x", buf[j]);
563 printk(" j=%d.\n", j);
564 }
565 printk(KERN_DEBUG " Rx ring %8.8x: ", (int)tp->rx_ring);
566 for (i = 0; i < RX_RING_SIZE; i++)
567 printk(" %8.8x", (unsigned int)tp->rx_ring[i].status);
568 printk("\n" KERN_DEBUG " Tx ring %8.8x: ", (int)tp->tx_ring);
569 for (i = 0; i < TX_RING_SIZE; i++)
570 printk(" %8.8x", (unsigned int)tp->tx_ring[i].status);
571 printk("\n");
572 }
573 #endif
574
575 /* Stop and restart the chip's Tx processes . */
576
577 tulip_restart_rxtx(tp);
578 /* Trigger an immediate transmit demand. */
579 outl(0, ioaddr + CSR1);
580
581 tp->stats.tx_errors++;
582
583 spin_unlock_irqrestore (&tp->lock, flags);
584 dev->trans_start = jiffies;
585 netif_wake_queue (dev);
586 }
587
588
589 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
590 static void tulip_init_ring(struct net_device *dev)
591 {
592 struct tulip_private *tp = netdev_priv(dev);
593 int i;
594
595 tp->susp_rx = 0;
596 tp->ttimer = 0;
597 tp->nir = 0;
598
599 for (i = 0; i < RX_RING_SIZE; i++) {
600 tp->rx_ring[i].status = 0x00000000;
601 tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
602 tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
603 tp->rx_buffers[i].skb = NULL;
604 tp->rx_buffers[i].mapping = 0;
605 }
606 /* Mark the last entry as wrapping the ring. */
607 tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
608 tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
609
610 for (i = 0; i < RX_RING_SIZE; i++) {
611 dma_addr_t mapping;
612
613 /* Note the receive buffer must be longword aligned.
614 dev_alloc_skb() provides 16 byte alignment. But do *not*
615 use skb_reserve() to align the IP header! */
616 struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
617 tp->rx_buffers[i].skb = skb;
618 if (skb == NULL)
619 break;
620 mapping = pci_map_single(tp->pdev, skb->tail,
621 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
622 tp->rx_buffers[i].mapping = mapping;
623 skb->dev = dev; /* Mark as being used by this device. */
624 tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
625 tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
626 }
627 tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
628
629 /* The Tx buffer descriptor is filled in as needed, but we
630 do need to clear the ownership bit. */
631 for (i = 0; i < TX_RING_SIZE; i++) {
632 tp->tx_buffers[i].skb = NULL;
633 tp->tx_buffers[i].mapping = 0;
634 tp->tx_ring[i].status = 0x00000000;
635 tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
636 }
637 tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
638 }
639
640 static int
641 tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
642 {
643 struct tulip_private *tp = netdev_priv(dev);
644 int entry;
645 u32 flag;
646 dma_addr_t mapping;
647
648 spin_lock_irq(&tp->lock);
649
650 /* Calculate the next Tx descriptor entry. */
651 entry = tp->cur_tx % TX_RING_SIZE;
652
653 tp->tx_buffers[entry].skb = skb;
654 mapping = pci_map_single(tp->pdev, skb->data,
655 skb->len, PCI_DMA_TODEVICE);
656 tp->tx_buffers[entry].mapping = mapping;
657 tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
658
659 if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */
660 flag = 0x60000000; /* No interrupt */
661 } else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
662 flag = 0xe0000000; /* Tx-done intr. */
663 } else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
664 flag = 0x60000000; /* No Tx-done intr. */
665 } else { /* Leave room for set_rx_mode() to fill entries. */
666 flag = 0xe0000000; /* Tx-done intr. */
667 netif_stop_queue(dev);
668 }
669 if (entry == TX_RING_SIZE-1)
670 flag = 0xe0000000 | DESC_RING_WRAP;
671
672 tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
673 /* if we were using Transmit Automatic Polling, we would need a
674 * wmb() here. */
675 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
676 wmb();
677
678 tp->cur_tx++;
679
680 /* Trigger an immediate transmit demand. */
681 outl(0, dev->base_addr + CSR1);
682
683 spin_unlock_irq(&tp->lock);
684
685 dev->trans_start = jiffies;
686
687 return 0;
688 }
689
690 static void tulip_clean_tx_ring(struct tulip_private *tp)
691 {
692 unsigned int dirty_tx;
693
694 for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
695 dirty_tx++) {
696 int entry = dirty_tx % TX_RING_SIZE;
697 int status = le32_to_cpu(tp->tx_ring[entry].status);
698
699 if (status < 0) {
700 tp->stats.tx_errors++; /* It wasn't Txed */
701 tp->tx_ring[entry].status = 0;
702 }
703
704 /* Check for Tx filter setup frames. */
705 if (tp->tx_buffers[entry].skb == NULL) {
706 /* test because dummy frames not mapped */
707 if (tp->tx_buffers[entry].mapping)
708 pci_unmap_single(tp->pdev,
709 tp->tx_buffers[entry].mapping,
710 sizeof(tp->setup_frame),
711 PCI_DMA_TODEVICE);
712 continue;
713 }
714
715 pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
716 tp->tx_buffers[entry].skb->len,
717 PCI_DMA_TODEVICE);
718
719 /* Free the original skb. */
720 dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
721 tp->tx_buffers[entry].skb = NULL;
722 tp->tx_buffers[entry].mapping = 0;
723 }
724 }
725
726 static void tulip_down (struct net_device *dev)
727 {
728 long ioaddr = dev->base_addr;
729 struct tulip_private *tp = netdev_priv(dev);
730 unsigned long flags;
731
732 del_timer_sync (&tp->timer);
733 #ifdef CONFIG_TULIP_NAPI
734 del_timer_sync (&tp->oom_timer);
735 #endif
736 spin_lock_irqsave (&tp->lock, flags);
737
738 /* Disable interrupts by clearing the interrupt mask. */
739 outl (0x00000000, ioaddr + CSR7);
740
741 /* Stop the Tx and Rx processes. */
742 tulip_stop_rxtx(tp);
743
744 /* prepare receive buffers */
745 tulip_refill_rx(dev);
746
747 /* release any unconsumed transmit buffers */
748 tulip_clean_tx_ring(tp);
749
750 if (inl (ioaddr + CSR6) != 0xffffffff)
751 tp->stats.rx_missed_errors += inl (ioaddr + CSR8) & 0xffff;
752
753 spin_unlock_irqrestore (&tp->lock, flags);
754
755 init_timer(&tp->timer);
756 tp->timer.data = (unsigned long)dev;
757 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
758
759 dev->if_port = tp->saved_if_port;
760
761 /* Leave the driver in snooze, not sleep, mode. */
762 tulip_set_power_state (tp, 0, 1);
763 }
764
765
766 static int tulip_close (struct net_device *dev)
767 {
768 long ioaddr = dev->base_addr;
769 struct tulip_private *tp = netdev_priv(dev);
770 int i;
771
772 netif_stop_queue (dev);
773
774 tulip_down (dev);
775
776 if (tulip_debug > 1)
777 printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
778 dev->name, inl (ioaddr + CSR5));
779
780 free_irq (dev->irq, dev);
781
782 /* Free all the skbuffs in the Rx queue. */
783 for (i = 0; i < RX_RING_SIZE; i++) {
784 struct sk_buff *skb = tp->rx_buffers[i].skb;
785 dma_addr_t mapping = tp->rx_buffers[i].mapping;
786
787 tp->rx_buffers[i].skb = NULL;
788 tp->rx_buffers[i].mapping = 0;
789
790 tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */
791 tp->rx_ring[i].length = 0;
792 tp->rx_ring[i].buffer1 = 0xBADF00D0; /* An invalid address. */
793 if (skb) {
794 pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
795 PCI_DMA_FROMDEVICE);
796 dev_kfree_skb (skb);
797 }
798 }
799 for (i = 0; i < TX_RING_SIZE; i++) {
800 struct sk_buff *skb = tp->tx_buffers[i].skb;
801
802 if (skb != NULL) {
803 pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
804 skb->len, PCI_DMA_TODEVICE);
805 dev_kfree_skb (skb);
806 }
807 tp->tx_buffers[i].skb = NULL;
808 tp->tx_buffers[i].mapping = 0;
809 }
810
811 return 0;
812 }
813
814 static struct net_device_stats *tulip_get_stats(struct net_device *dev)
815 {
816 struct tulip_private *tp = netdev_priv(dev);
817 long ioaddr = dev->base_addr;
818
819 if (netif_running(dev)) {
820 unsigned long flags;
821
822 spin_lock_irqsave (&tp->lock, flags);
823
824 tp->stats.rx_missed_errors += inl(ioaddr + CSR8) & 0xffff;
825
826 spin_unlock_irqrestore(&tp->lock, flags);
827 }
828
829 return &tp->stats;
830 }
831
832
833 static int netdev_ethtool_ioctl(struct net_device *dev, void __user *useraddr)
834 {
835 struct tulip_private *np = netdev_priv(dev);
836 u32 ethcmd;
837
838 if (copy_from_user(&ethcmd, useraddr, sizeof(ethcmd)))
839 return -EFAULT;
840
841 switch (ethcmd) {
842 case ETHTOOL_GDRVINFO: {
843 struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
844 strcpy(info.driver, DRV_NAME);
845 strcpy(info.version, DRV_VERSION);
846 strcpy(info.bus_info, pci_name(np->pdev));
847 if (copy_to_user(useraddr, &info, sizeof(info)))
848 return -EFAULT;
849 return 0;
850 }
851
852 }
853
854 return -EOPNOTSUPP;
855 }
856
857 /* Provide ioctl() calls to examine the MII xcvr state. */
858 static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
859 {
860 struct tulip_private *tp = netdev_priv(dev);
861 long ioaddr = dev->base_addr;
862 struct mii_ioctl_data *data = if_mii(rq);
863 const unsigned int phy_idx = 0;
864 int phy = tp->phys[phy_idx] & 0x1f;
865 unsigned int regnum = data->reg_num;
866
867 switch (cmd) {
868 case SIOCETHTOOL:
869 return netdev_ethtool_ioctl(dev, rq->ifr_data);
870
871 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
872 if (tp->mii_cnt)
873 data->phy_id = phy;
874 else if (tp->flags & HAS_NWAY)
875 data->phy_id = 32;
876 else if (tp->chip_id == COMET)
877 data->phy_id = 1;
878 else
879 return -ENODEV;
880
881 case SIOCGMIIREG: /* Read MII PHY register. */
882 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
883 int csr12 = inl (ioaddr + CSR12);
884 int csr14 = inl (ioaddr + CSR14);
885 switch (regnum) {
886 case 0:
887 if (((csr14<<5) & 0x1000) ||
888 (dev->if_port == 5 && tp->nwayset))
889 data->val_out = 0x1000;
890 else
891 data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
892 | (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
893 break;
894 case 1:
895 data->val_out =
896 0x1848 +
897 ((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
898 ((csr12&0x06) == 6 ? 0 : 4);
899 data->val_out |= 0x6048;
900 break;
901 case 4:
902 /* Advertised value, bogus 10baseTx-FD value from CSR6. */
903 data->val_out =
904 ((inl(ioaddr + CSR6) >> 3) & 0x0040) +
905 ((csr14 >> 1) & 0x20) + 1;
906 data->val_out |= ((csr14 >> 9) & 0x03C0);
907 break;
908 case 5: data->val_out = tp->lpar; break;
909 default: data->val_out = 0; break;
910 }
911 } else {
912 data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
913 }
914 return 0;
915
916 case SIOCSMIIREG: /* Write MII PHY register. */
917 if (!capable (CAP_NET_ADMIN))
918 return -EPERM;
919 if (regnum & ~0x1f)
920 return -EINVAL;
921 if (data->phy_id == phy) {
922 u16 value = data->val_in;
923 switch (regnum) {
924 case 0: /* Check for autonegotiation on or reset. */
925 tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
926 if (tp->full_duplex_lock)
927 tp->full_duplex = (value & 0x0100) ? 1 : 0;
928 break;
929 case 4:
930 tp->advertising[phy_idx] =
931 tp->mii_advertise = data->val_in;
932 break;
933 }
934 }
935 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
936 u16 value = data->val_in;
937 if (regnum == 0) {
938 if ((value & 0x1200) == 0x1200) {
939 if (tp->chip_id == PNIC2) {
940 pnic2_start_nway (dev);
941 } else {
942 t21142_start_nway (dev);
943 }
944 }
945 } else if (regnum == 4)
946 tp->sym_advertise = value;
947 } else {
948 tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
949 }
950 return 0;
951 default:
952 return -EOPNOTSUPP;
953 }
954
955 return -EOPNOTSUPP;
956 }
957
958
959 /* Set or clear the multicast filter for this adaptor.
960 Note that we only use exclusion around actually queueing the
961 new frame, not around filling tp->setup_frame. This is non-deterministic
962 when re-entered but still correct. */
963
964 #undef set_bit_le
965 #define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
966
967 static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
968 {
969 struct tulip_private *tp = netdev_priv(dev);
970 u16 hash_table[32];
971 struct dev_mc_list *mclist;
972 int i;
973 u16 *eaddrs;
974
975 memset(hash_table, 0, sizeof(hash_table));
976 set_bit_le(255, hash_table); /* Broadcast entry */
977 /* This should work on big-endian machines as well. */
978 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
979 i++, mclist = mclist->next) {
980 int index = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x1ff;
981
982 set_bit_le(index, hash_table);
983
984 }
985 for (i = 0; i < 32; i++) {
986 *setup_frm++ = hash_table[i];
987 *setup_frm++ = hash_table[i];
988 }
989 setup_frm = &tp->setup_frame[13*6];
990
991 /* Fill the final entry with our physical address. */
992 eaddrs = (u16 *)dev->dev_addr;
993 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
994 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
995 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
996 }
997
998 static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
999 {
1000 struct tulip_private *tp = netdev_priv(dev);
1001 struct dev_mc_list *mclist;
1002 int i;
1003 u16 *eaddrs;
1004
1005 /* We have <= 14 addresses so we can use the wonderful
1006 16 address perfect filtering of the Tulip. */
1007 for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
1008 i++, mclist = mclist->next) {
1009 eaddrs = (u16 *)mclist->dmi_addr;
1010 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1011 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1012 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1013 }
1014 /* Fill the unused entries with the broadcast address. */
1015 memset(setup_frm, 0xff, (15-i)*12);
1016 setup_frm = &tp->setup_frame[15*6];
1017
1018 /* Fill the final entry with our physical address. */
1019 eaddrs = (u16 *)dev->dev_addr;
1020 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1021 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1022 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1023 }
1024
1025
1026 static void set_rx_mode(struct net_device *dev)
1027 {
1028 struct tulip_private *tp = netdev_priv(dev);
1029 long ioaddr = dev->base_addr;
1030 int csr6;
1031
1032 csr6 = inl(ioaddr + CSR6) & ~0x00D5;
1033
1034 tp->csr6 &= ~0x00D5;
1035 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1036 tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
1037 csr6 |= AcceptAllMulticast | AcceptAllPhys;
1038 /* Unconditionally log net taps. */
1039 printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
1040 } else if ((dev->mc_count > 1000) || (dev->flags & IFF_ALLMULTI)) {
1041 /* Too many to filter well -- accept all multicasts. */
1042 tp->csr6 |= AcceptAllMulticast;
1043 csr6 |= AcceptAllMulticast;
1044 } else if (tp->flags & MC_HASH_ONLY) {
1045 /* Some work-alikes have only a 64-entry hash filter table. */
1046 /* Should verify correctness on big-endian/__powerpc__ */
1047 struct dev_mc_list *mclist;
1048 int i;
1049 if (dev->mc_count > 64) { /* Arbitrary non-effective limit. */
1050 tp->csr6 |= AcceptAllMulticast;
1051 csr6 |= AcceptAllMulticast;
1052 } else {
1053 u32 mc_filter[2] = {0, 0}; /* Multicast hash filter */
1054 int filterbit;
1055 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1056 i++, mclist = mclist->next) {
1057 if (tp->flags & COMET_MAC_ADDR)
1058 filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr);
1059 else
1060 filterbit = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1061 filterbit &= 0x3f;
1062 mc_filter[filterbit >> 5] |= cpu_to_le32(1 << (filterbit & 31));
1063 if (tulip_debug > 2) {
1064 printk(KERN_INFO "%s: Added filter for %2.2x:%2.2x:%2.2x:"
1065 "%2.2x:%2.2x:%2.2x %8.8x bit %d.\n", dev->name,
1066 mclist->dmi_addr[0], mclist->dmi_addr[1],
1067 mclist->dmi_addr[2], mclist->dmi_addr[3],
1068 mclist->dmi_addr[4], mclist->dmi_addr[5],
1069 ether_crc(ETH_ALEN, mclist->dmi_addr), filterbit);
1070 }
1071 }
1072 if (mc_filter[0] == tp->mc_filter[0] &&
1073 mc_filter[1] == tp->mc_filter[1])
1074 ; /* No change. */
1075 else if (tp->flags & IS_ASIX) {
1076 outl(2, ioaddr + CSR13);
1077 outl(mc_filter[0], ioaddr + CSR14);
1078 outl(3, ioaddr + CSR13);
1079 outl(mc_filter[1], ioaddr + CSR14);
1080 } else if (tp->flags & COMET_MAC_ADDR) {
1081 outl(mc_filter[0], ioaddr + 0xAC);
1082 outl(mc_filter[1], ioaddr + 0xB0);
1083 }
1084 tp->mc_filter[0] = mc_filter[0];
1085 tp->mc_filter[1] = mc_filter[1];
1086 }
1087 } else {
1088 unsigned long flags;
1089 u32 tx_flags = 0x08000000 | 192;
1090
1091 /* Note that only the low-address shortword of setup_frame is valid!
1092 The values are doubled for big-endian architectures. */
1093 if (dev->mc_count > 14) { /* Must use a multicast hash table. */
1094 build_setup_frame_hash(tp->setup_frame, dev);
1095 tx_flags = 0x08400000 | 192;
1096 } else {
1097 build_setup_frame_perfect(tp->setup_frame, dev);
1098 }
1099
1100 spin_lock_irqsave(&tp->lock, flags);
1101
1102 if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
1103 /* Same setup recently queued, we need not add it. */
1104 } else {
1105 unsigned int entry;
1106 int dummy = -1;
1107
1108 /* Now add this frame to the Tx list. */
1109
1110 entry = tp->cur_tx++ % TX_RING_SIZE;
1111
1112 if (entry != 0) {
1113 /* Avoid a chip errata by prefixing a dummy entry. */
1114 tp->tx_buffers[entry].skb = NULL;
1115 tp->tx_buffers[entry].mapping = 0;
1116 tp->tx_ring[entry].length =
1117 (entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
1118 tp->tx_ring[entry].buffer1 = 0;
1119 /* Must set DescOwned later to avoid race with chip */
1120 dummy = entry;
1121 entry = tp->cur_tx++ % TX_RING_SIZE;
1122 }
1123
1124 tp->tx_buffers[entry].skb = NULL;
1125 tp->tx_buffers[entry].mapping =
1126 pci_map_single(tp->pdev, tp->setup_frame,
1127 sizeof(tp->setup_frame),
1128 PCI_DMA_TODEVICE);
1129 /* Put the setup frame on the Tx list. */
1130 if (entry == TX_RING_SIZE-1)
1131 tx_flags |= DESC_RING_WRAP; /* Wrap ring. */
1132 tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
1133 tp->tx_ring[entry].buffer1 =
1134 cpu_to_le32(tp->tx_buffers[entry].mapping);
1135 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
1136 if (dummy >= 0)
1137 tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
1138 if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
1139 netif_stop_queue(dev);
1140
1141 /* Trigger an immediate transmit demand. */
1142 outl(0, ioaddr + CSR1);
1143 }
1144
1145 spin_unlock_irqrestore(&tp->lock, flags);
1146 }
1147
1148 outl(csr6, ioaddr + CSR6);
1149 }
1150
1151 #ifdef CONFIG_TULIP_MWI
1152 static void __devinit tulip_mwi_config (struct pci_dev *pdev,
1153 struct net_device *dev)
1154 {
1155 struct tulip_private *tp = netdev_priv(dev);
1156 u8 cache;
1157 u16 pci_command;
1158 u32 csr0;
1159
1160 if (tulip_debug > 3)
1161 printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pci_name(pdev));
1162
1163 tp->csr0 = csr0 = 0;
1164
1165 /* if we have any cache line size at all, we can do MRM */
1166 csr0 |= MRM;
1167
1168 /* ...and barring hardware bugs, MWI */
1169 if (!(tp->chip_id == DC21143 && tp->revision == 65))
1170 csr0 |= MWI;
1171
1172 /* set or disable MWI in the standard PCI command bit.
1173 * Check for the case where mwi is desired but not available
1174 */
1175 if (csr0 & MWI) pci_set_mwi(pdev);
1176 else pci_clear_mwi(pdev);
1177
1178 /* read result from hardware (in case bit refused to enable) */
1179 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
1180 if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
1181 csr0 &= ~MWI;
1182
1183 /* if cache line size hardwired to zero, no MWI */
1184 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
1185 if ((csr0 & MWI) && (cache == 0)) {
1186 csr0 &= ~MWI;
1187 pci_clear_mwi(pdev);
1188 }
1189
1190 /* assign per-cacheline-size cache alignment and
1191 * burst length values
1192 */
1193 switch (cache) {
1194 case 8:
1195 csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
1196 break;
1197 case 16:
1198 csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
1199 break;
1200 case 32:
1201 csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
1202 break;
1203 default:
1204 cache = 0;
1205 break;
1206 }
1207
1208 /* if we have a good cache line size, we by now have a good
1209 * csr0, so save it and exit
1210 */
1211 if (cache)
1212 goto out;
1213
1214 /* we don't have a good csr0 or cache line size, disable MWI */
1215 if (csr0 & MWI) {
1216 pci_clear_mwi(pdev);
1217 csr0 &= ~MWI;
1218 }
1219
1220 /* sane defaults for burst length and cache alignment
1221 * originally from de4x5 driver
1222 */
1223 csr0 |= (8 << BurstLenShift) | (1 << CALShift);
1224
1225 out:
1226 tp->csr0 = csr0;
1227 if (tulip_debug > 2)
1228 printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
1229 pci_name(pdev), cache, csr0);
1230 }
1231 #endif
1232
1233 static int __devinit tulip_init_one (struct pci_dev *pdev,
1234 const struct pci_device_id *ent)
1235 {
1236 struct tulip_private *tp;
1237 /* See note below on the multiport cards. */
1238 static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1239 static int last_irq;
1240 static int multiport_cnt; /* For four-port boards w/one EEPROM */
1241 u8 chip_rev;
1242 int i, irq;
1243 unsigned short sum;
1244 unsigned char *ee_data;
1245 struct net_device *dev;
1246 long ioaddr;
1247 static int board_idx = -1;
1248 int chip_idx = ent->driver_data;
1249 const char *chip_name = tulip_tbl[chip_idx].chip_name;
1250 unsigned int eeprom_missing = 0;
1251 unsigned int force_csr0 = 0;
1252
1253 #ifndef MODULE
1254 static int did_version; /* Already printed version info. */
1255 if (tulip_debug > 0 && did_version++ == 0)
1256 printk (KERN_INFO "%s", version);
1257 #endif
1258
1259 board_idx++;
1260
1261 /*
1262 * Lan media wire a tulip chip to a wan interface. Needs a very
1263 * different driver (lmc driver)
1264 */
1265
1266 if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
1267 printk (KERN_ERR PFX "skipping LMC card.\n");
1268 return -ENODEV;
1269 }
1270
1271 /*
1272 * Early DM9100's need software CRC and the DMFE driver
1273 */
1274
1275 if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
1276 {
1277 u32 dev_rev;
1278 /* Read Chip revision */
1279 pci_read_config_dword(pdev, PCI_REVISION_ID, &dev_rev);
1280 if(dev_rev < 0x02000030)
1281 {
1282 printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
1283 return -ENODEV;
1284 }
1285 }
1286
1287 /*
1288 * Looks for early PCI chipsets where people report hangs
1289 * without the workarounds being on.
1290 */
1291
1292 /* Intel Saturn. Switch to 8 long words burst, 8 long word cache aligned
1293 Aries might need this too. The Saturn errata are not pretty reading but
1294 thankfully it's an old 486 chipset.
1295 */
1296
1297 if (pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424, NULL)) {
1298 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1299 force_csr0 = 1;
1300 }
1301 /* The dreaded SiS496 486 chipset. Same workaround as above. */
1302 if (pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, NULL)) {
1303 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1304 force_csr0 = 1;
1305 }
1306
1307 /* bugfix: the ASIX must have a burst limit or horrible things happen. */
1308 if (chip_idx == AX88140) {
1309 if ((csr0 & 0x3f00) == 0)
1310 csr0 |= 0x2000;
1311 }
1312
1313 /* PNIC doesn't have MWI/MRL/MRM... */
1314 if (chip_idx == LC82C168)
1315 csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
1316
1317 /* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
1318 if ((pdev->vendor == 0x1282 && pdev->device == 0x9102)
1319 || (pdev->vendor == 0x10b9 && pdev->device == 0x5261))
1320 csr0 &= ~0x01f100ff;
1321
1322 #if defined(__sparc__)
1323 /* DM9102A needs 32-dword alignment/burst length on sparc - chip bug? */
1324 if ((pdev->vendor == 0x1282 && pdev->device == 0x9102)
1325 || (pdev->vendor == 0x10b9 && pdev->device == 0x5261))
1326 csr0 = (csr0 & ~0xff00) | 0xe000;
1327 #endif
1328
1329 /*
1330 * And back to business
1331 */
1332
1333 i = pci_enable_device(pdev);
1334 if (i) {
1335 printk (KERN_ERR PFX
1336 "Cannot enable tulip board #%d, aborting\n",
1337 board_idx);
1338 return i;
1339 }
1340
1341 ioaddr = pci_resource_start (pdev, 0);
1342 irq = pdev->irq;
1343
1344 /* alloc_etherdev ensures aligned and zeroed private structures */
1345 dev = alloc_etherdev (sizeof (*tp));
1346 if (!dev) {
1347 printk (KERN_ERR PFX "ether device alloc failed, aborting\n");
1348 return -ENOMEM;
1349 }
1350
1351 SET_MODULE_OWNER(dev);
1352 SET_NETDEV_DEV(dev, &pdev->dev);
1353 if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
1354 printk (KERN_ERR PFX "%s: I/O region (0x%lx@0x%lx) too small, "
1355 "aborting\n", pci_name(pdev),
1356 pci_resource_len (pdev, 0),
1357 pci_resource_start (pdev, 0));
1358 goto err_out_free_netdev;
1359 }
1360
1361 /* grab all resources from both PIO and MMIO regions, as we
1362 * don't want anyone else messing around with our hardware */
1363 if (pci_request_regions (pdev, "tulip"))
1364 goto err_out_free_netdev;
1365
1366 #ifndef USE_IO_OPS
1367 ioaddr = (unsigned long) ioremap (pci_resource_start (pdev, 1),
1368 tulip_tbl[chip_idx].io_size);
1369 if (!ioaddr)
1370 goto err_out_free_res;
1371 #endif
1372
1373 pci_read_config_byte (pdev, PCI_REVISION_ID, &chip_rev);
1374
1375 /*
1376 * initialize private data structure 'tp'
1377 * it is zeroed and aligned in alloc_etherdev
1378 */
1379 tp = netdev_priv(dev);
1380
1381 tp->rx_ring = pci_alloc_consistent(pdev,
1382 sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
1383 sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
1384 &tp->rx_ring_dma);
1385 if (!tp->rx_ring)
1386 goto err_out_mtable;
1387 tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
1388 tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
1389
1390 tp->chip_id = chip_idx;
1391 tp->flags = tulip_tbl[chip_idx].flags;
1392 tp->pdev = pdev;
1393 tp->base_addr = ioaddr;
1394 tp->revision = chip_rev;
1395 tp->csr0 = csr0;
1396 spin_lock_init(&tp->lock);
1397 spin_lock_init(&tp->mii_lock);
1398 init_timer(&tp->timer);
1399 tp->timer.data = (unsigned long)dev;
1400 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
1401
1402 dev->base_addr = ioaddr;
1403
1404 #ifdef CONFIG_TULIP_MWI
1405 if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1406 tulip_mwi_config (pdev, dev);
1407 #else
1408 /* MWI is broken for DC21143 rev 65... */
1409 if (chip_idx == DC21143 && chip_rev == 65)
1410 tp->csr0 &= ~MWI;
1411 #endif
1412
1413 /* Stop the chip's Tx and Rx processes. */
1414 tulip_stop_rxtx(tp);
1415
1416 pci_set_master(pdev);
1417
1418 #ifdef CONFIG_GSC
1419 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP) {
1420 switch (pdev->subsystem_device) {
1421 default:
1422 break;
1423 case 0x1061:
1424 case 0x1062:
1425 case 0x1063:
1426 case 0x1098:
1427 case 0x1099:
1428 case 0x10EE:
1429 tp->flags |= HAS_SWAPPED_SEEPROM | NEEDS_FAKE_MEDIA_TABLE;
1430 chip_name = "GSC DS21140 Tulip";
1431 }
1432 }
1433 #endif
1434
1435 /* Clear the missed-packet counter. */
1436 inl(ioaddr + CSR8);
1437
1438 /* The station address ROM is read byte serially. The register must
1439 be polled, waiting for the value to be read bit serially from the
1440 EEPROM.
1441 */
1442 ee_data = tp->eeprom;
1443 sum = 0;
1444 if (chip_idx == LC82C168) {
1445 for (i = 0; i < 3; i++) {
1446 int value, boguscnt = 100000;
1447 outl(0x600 | i, ioaddr + 0x98);
1448 do
1449 value = inl(ioaddr + CSR9);
1450 while (value < 0 && --boguscnt > 0);
1451 put_unaligned(le16_to_cpu(value), ((u16*)dev->dev_addr) + i);
1452 sum += value & 0xffff;
1453 }
1454 } else if (chip_idx == COMET) {
1455 /* No need to read the EEPROM. */
1456 put_unaligned(cpu_to_le32(inl(ioaddr + 0xA4)), (u32 *)dev->dev_addr);
1457 put_unaligned(cpu_to_le16(inl(ioaddr + 0xA8)), (u16 *)(dev->dev_addr + 4));
1458 for (i = 0; i < 6; i ++)
1459 sum += dev->dev_addr[i];
1460 } else {
1461 /* A serial EEPROM interface, we read now and sort it out later. */
1462 int sa_offset = 0;
1463 int ee_addr_size = tulip_read_eeprom(dev, 0xff, 8) & 0x40000 ? 8 : 6;
1464
1465 for (i = 0; i < sizeof(tp->eeprom); i+=2) {
1466 u16 data = tulip_read_eeprom(dev, i/2, ee_addr_size);
1467 ee_data[i] = data & 0xff;
1468 ee_data[i + 1] = data >> 8;
1469 }
1470
1471 /* DEC now has a specification (see Notes) but early board makers
1472 just put the address in the first EEPROM locations. */
1473 /* This does memcmp(ee_data, ee_data+16, 8) */
1474 for (i = 0; i < 8; i ++)
1475 if (ee_data[i] != ee_data[16+i])
1476 sa_offset = 20;
1477 if (chip_idx == CONEXANT) {
1478 /* Check that the tuple type and length is correct. */
1479 if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
1480 sa_offset = 0x19A;
1481 } else if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
1482 ee_data[2] == 0) {
1483 sa_offset = 2; /* Grrr, damn Matrox boards. */
1484 multiport_cnt = 4;
1485 }
1486 #ifdef CONFIG_DDB5476
1487 if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 6)) {
1488 /* DDB5476 MAC address in first EEPROM locations. */
1489 sa_offset = 0;
1490 /* No media table either */
1491 tp->flags &= ~HAS_MEDIA_TABLE;
1492 }
1493 #endif
1494 #ifdef CONFIG_DDB5477
1495 if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 4)) {
1496 /* DDB5477 MAC address in first EEPROM locations. */
1497 sa_offset = 0;
1498 /* No media table either */
1499 tp->flags &= ~HAS_MEDIA_TABLE;
1500 }
1501 #endif
1502 #ifdef CONFIG_MIPS_COBALT
1503 if ((pdev->bus->number == 0) &&
1504 ((PCI_SLOT(pdev->devfn) == 7) ||
1505 (PCI_SLOT(pdev->devfn) == 12))) {
1506 /* Cobalt MAC address in first EEPROM locations. */
1507 sa_offset = 0;
1508 /* No media table either */
1509 tp->flags &= ~HAS_MEDIA_TABLE;
1510 }
1511 #endif
1512 #ifdef CONFIG_GSC
1513 /* Check to see if we have a broken srom */
1514 if (ee_data[0] == 0x61 && ee_data[1] == 0x10) {
1515 /* pci_vendor_id and subsystem_id are swapped */
1516 ee_data[0] = ee_data[2];
1517 ee_data[1] = ee_data[3];
1518 ee_data[2] = 0x61;
1519 ee_data[3] = 0x10;
1520
1521 /* HSC-PCI boards need to be byte-swaped and shifted
1522 * up 1 word. This shift needs to happen at the end
1523 * of the MAC first because of the 2 byte overlap.
1524 */
1525 for (i = 4; i >= 0; i -= 2) {
1526 ee_data[17 + i + 3] = ee_data[17 + i];
1527 ee_data[16 + i + 5] = ee_data[16 + i];
1528 }
1529 }
1530 #endif
1531
1532 for (i = 0; i < 6; i ++) {
1533 dev->dev_addr[i] = ee_data[i + sa_offset];
1534 sum += ee_data[i + sa_offset];
1535 }
1536 }
1537 /* Lite-On boards have the address byte-swapped. */
1538 if ((dev->dev_addr[0] == 0xA0 || dev->dev_addr[0] == 0xC0 || dev->dev_addr[0] == 0x02)
1539 && dev->dev_addr[1] == 0x00)
1540 for (i = 0; i < 6; i+=2) {
1541 char tmp = dev->dev_addr[i];
1542 dev->dev_addr[i] = dev->dev_addr[i+1];
1543 dev->dev_addr[i+1] = tmp;
1544 }
1545 /* On the Zynx 315 Etherarray and other multiport boards only the
1546 first Tulip has an EEPROM.
1547 On Sparc systems the mac address is held in the OBP property
1548 "local-mac-address".
1549 The addresses of the subsequent ports are derived from the first.
1550 Many PCI BIOSes also incorrectly report the IRQ line, so we correct
1551 that here as well. */
1552 if (sum == 0 || sum == 6*0xff) {
1553 #if defined(__sparc__)
1554 struct pcidev_cookie *pcp = pdev->sysdata;
1555 #endif
1556 eeprom_missing = 1;
1557 for (i = 0; i < 5; i++)
1558 dev->dev_addr[i] = last_phys_addr[i];
1559 dev->dev_addr[i] = last_phys_addr[i] + 1;
1560 #if defined(__sparc__)
1561 if ((pcp != NULL) && prom_getproplen(pcp->prom_node,
1562 "local-mac-address") == 6) {
1563 prom_getproperty(pcp->prom_node, "local-mac-address",
1564 dev->dev_addr, 6);
1565 }
1566 #endif
1567 #if defined(__i386__) /* Patch up x86 BIOS bug. */
1568 if (last_irq)
1569 irq = last_irq;
1570 #endif
1571 }
1572
1573 for (i = 0; i < 6; i++)
1574 last_phys_addr[i] = dev->dev_addr[i];
1575 last_irq = irq;
1576 dev->irq = irq;
1577
1578 /* The lower four bits are the media type. */
1579 if (board_idx >= 0 && board_idx < MAX_UNITS) {
1580 if (options[board_idx] & MEDIA_MASK)
1581 tp->default_port = options[board_idx] & MEDIA_MASK;
1582 if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
1583 tp->full_duplex = 1;
1584 if (mtu[board_idx] > 0)
1585 dev->mtu = mtu[board_idx];
1586 }
1587 if (dev->mem_start & MEDIA_MASK)
1588 tp->default_port = dev->mem_start & MEDIA_MASK;
1589 if (tp->default_port) {
1590 printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
1591 board_idx, medianame[tp->default_port & MEDIA_MASK]);
1592 tp->medialock = 1;
1593 if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
1594 tp->full_duplex = 1;
1595 }
1596 if (tp->full_duplex)
1597 tp->full_duplex_lock = 1;
1598
1599 if (tulip_media_cap[tp->default_port] & MediaIsMII) {
1600 u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1601 tp->mii_advertise = media2advert[tp->default_port - 9];
1602 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1603 }
1604
1605 if (tp->flags & HAS_MEDIA_TABLE) {
1606 sprintf(dev->name, "tulip%d", board_idx); /* hack */
1607 tulip_parse_eeprom(dev);
1608 strcpy(dev->name, "eth%d"); /* un-hack */
1609 }
1610
1611 if ((tp->flags & ALWAYS_CHECK_MII) ||
1612 (tp->mtable && tp->mtable->has_mii) ||
1613 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1614 if (tp->mtable && tp->mtable->has_mii) {
1615 for (i = 0; i < tp->mtable->leafcount; i++)
1616 if (tp->mtable->mleaf[i].media == 11) {
1617 tp->cur_index = i;
1618 tp->saved_if_port = dev->if_port;
1619 tulip_select_media(dev, 2);
1620 dev->if_port = tp->saved_if_port;
1621 break;
1622 }
1623 }
1624
1625 /* Find the connected MII xcvrs.
1626 Doing this in open() would allow detecting external xcvrs
1627 later, but takes much time. */
1628 tulip_find_mii (dev, board_idx);
1629 }
1630
1631 /* The Tulip-specific entries in the device structure. */
1632 dev->open = tulip_open;
1633 dev->hard_start_xmit = tulip_start_xmit;
1634 dev->tx_timeout = tulip_tx_timeout;
1635 dev->watchdog_timeo = TX_TIMEOUT;
1636 #ifdef CONFIG_TULIP_NAPI
1637 dev->poll = tulip_poll;
1638 dev->weight = 16;
1639 #endif
1640 dev->stop = tulip_close;
1641 dev->get_stats = tulip_get_stats;
1642 dev->do_ioctl = private_ioctl;
1643 dev->set_multicast_list = set_rx_mode;
1644 #ifdef CONFIG_NET_POLL_CONTROLLER
1645 dev->poll_controller = &poll_tulip;
1646 #endif
1647
1648 if (register_netdev(dev))
1649 goto err_out_free_ring;
1650
1651 printk(KERN_INFO "%s: %s rev %d at %#3lx,",
1652 dev->name, chip_name, chip_rev, ioaddr);
1653 pci_set_drvdata(pdev, dev);
1654
1655 if (eeprom_missing)
1656 printk(" EEPROM not present,");
1657 for (i = 0; i < 6; i++)
1658 printk("%c%2.2X", i ? ':' : ' ', dev->dev_addr[i]);
1659 printk(", IRQ %d.\n", irq);
1660
1661 if (tp->chip_id == PNIC2)
1662 tp->link_change = pnic2_lnk_change;
1663 else if (tp->flags & HAS_NWAY)
1664 tp->link_change = t21142_lnk_change;
1665 else if (tp->flags & HAS_PNICNWAY)
1666 tp->link_change = pnic_lnk_change;
1667
1668 /* Reset the xcvr interface and turn on heartbeat. */
1669 switch (chip_idx) {
1670 case DC21140:
1671 case DM910X:
1672 default:
1673 if (tp->mtable)
1674 outl(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1675 break;
1676 case DC21142:
1677 if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
1678 outl(csr6_mask_defstate, ioaddr + CSR6);
1679 outl(0x0000, ioaddr + CSR13);
1680 outl(0x0000, ioaddr + CSR14);
1681 outl(csr6_mask_hdcap, ioaddr + CSR6);
1682 } else
1683 t21142_start_nway(dev);
1684 break;
1685 case PNIC2:
1686 /* just do a reset for sanity sake */
1687 outl(0x0000, ioaddr + CSR13);
1688 outl(0x0000, ioaddr + CSR14);
1689 break;
1690 case LC82C168:
1691 if ( ! tp->mii_cnt) {
1692 tp->nway = 1;
1693 tp->nwayset = 0;
1694 outl(csr6_ttm | csr6_ca, ioaddr + CSR6);
1695 outl(0x30, ioaddr + CSR12);
1696 outl(0x0001F078, ioaddr + CSR6);
1697 outl(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
1698 }
1699 break;
1700 case MX98713:
1701 case COMPEX9881:
1702 outl(0x00000000, ioaddr + CSR6);
1703 outl(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1704 outl(0x00000001, ioaddr + CSR13);
1705 break;
1706 case MX98715:
1707 case MX98725:
1708 outl(0x01a80000, ioaddr + CSR6);
1709 outl(0xFFFFFFFF, ioaddr + CSR14);
1710 outl(0x00001000, ioaddr + CSR12);
1711 break;
1712 case COMET:
1713 /* No initialization necessary. */
1714 break;
1715 }
1716
1717 /* put the chip in snooze mode until opened */
1718 tulip_set_power_state (tp, 0, 1);
1719
1720 return 0;
1721
1722 err_out_free_ring:
1723 pci_free_consistent (pdev,
1724 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1725 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1726 tp->rx_ring, tp->rx_ring_dma);
1727
1728 err_out_mtable:
1729 if (tp->mtable)
1730 kfree (tp->mtable);
1731 #ifndef USE_IO_OPS
1732 iounmap((void *)ioaddr);
1733
1734 err_out_free_res:
1735 #endif
1736 pci_release_regions (pdev);
1737
1738 err_out_free_netdev:
1739 free_netdev (dev);
1740 return -ENODEV;
1741 }
1742
1743
1744 #ifdef CONFIG_PM
1745
1746 static int tulip_suspend (struct pci_dev *pdev, u32 state)
1747 {
1748 struct net_device *dev = pci_get_drvdata(pdev);
1749
1750 if (dev && netif_running (dev) && netif_device_present (dev)) {
1751 netif_device_detach (dev);
1752 tulip_down (dev);
1753 /* pci_power_off(pdev, -1); */
1754 }
1755 return 0;
1756 }
1757
1758
1759 static int tulip_resume(struct pci_dev *pdev)
1760 {
1761 struct net_device *dev = pci_get_drvdata(pdev);
1762
1763 if (dev && netif_running (dev) && !netif_device_present (dev)) {
1764 #if 1
1765 pci_enable_device (pdev);
1766 #endif
1767 /* pci_power_on(pdev); */
1768 tulip_up (dev);
1769 netif_device_attach (dev);
1770 }
1771 return 0;
1772 }
1773
1774 #endif /* CONFIG_PM */
1775
1776
1777 static void __devexit tulip_remove_one (struct pci_dev *pdev)
1778 {
1779 struct net_device *dev = pci_get_drvdata (pdev);
1780 struct tulip_private *tp;
1781
1782 if (!dev)
1783 return;
1784
1785 tp = netdev_priv(dev);
1786 unregister_netdev(dev);
1787 pci_free_consistent (pdev,
1788 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1789 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1790 tp->rx_ring, tp->rx_ring_dma);
1791 if (tp->mtable)
1792 kfree (tp->mtable);
1793 #ifndef USE_IO_OPS
1794 iounmap((void *)dev->base_addr);
1795 #endif
1796 free_netdev (dev);
1797 pci_release_regions (pdev);
1798 pci_set_drvdata (pdev, NULL);
1799
1800 /* pci_power_off (pdev, -1); */
1801 }
1802
1803 #ifdef CONFIG_NET_POLL_CONTROLLER
1804 /*
1805 * Polling 'interrupt' - used by things like netconsole to send skbs
1806 * without having to re-enable interrupts. It's not called while
1807 * the interrupt routine is executing.
1808 */
1809
1810 static void poll_tulip (struct net_device *dev)
1811 {
1812 /* disable_irq here is not very nice, but with the lockless
1813 interrupt handler we have no other choice. */
1814 disable_irq(dev->irq);
1815 tulip_interrupt (dev->irq, dev, NULL);
1816 enable_irq(dev->irq);
1817 }
1818 #endif
1819
1820 static struct pci_driver tulip_driver = {
1821 .name = DRV_NAME,
1822 .id_table = tulip_pci_tbl,
1823 .probe = tulip_init_one,
1824 .remove = __devexit_p(tulip_remove_one),
1825 #ifdef CONFIG_PM
1826 .suspend = tulip_suspend,
1827 .resume = tulip_resume,
1828 #endif /* CONFIG_PM */
1829 };
1830
1831
1832 static int __init tulip_init (void)
1833 {
1834 #ifdef MODULE
1835 printk (KERN_INFO "%s", version);
1836 #endif
1837
1838 /* copy module parms into globals */
1839 tulip_rx_copybreak = rx_copybreak;
1840 tulip_max_interrupt_work = max_interrupt_work;
1841
1842 /* probe for and init boards */
1843 return pci_module_init (&tulip_driver);
1844 }
1845
1846
1847 static void __exit tulip_cleanup (void)
1848 {
1849 pci_unregister_driver (&tulip_driver);
1850 }
1851
1852
1853 module_init(tulip_init);
1854 module_exit(tulip_cleanup);
MOXA 2.6.9 from sdlinux-moxaart.tgz