?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / net / sis900.c
blob1a87a82a83cc4a92b6b3cdb2cb9738f2c1eb1598
1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.06 Sep. 24 2002
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19 http://www.sis.com.tw/support/databook.htm
20
21 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <webvenza@libero.it> add suspend/resume support
22 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
23 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
24 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
25 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
26 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
27 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
28 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
29 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
30 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
31 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
32 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
33 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
34 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
35 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
36 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
37 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
38 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
39 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
40 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
41 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
42 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
43 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
44 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
45 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
46 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
47 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
48 */
49
50 #include <linux/module.h>
51 #include <linux/kernel.h>
52 #include <linux/string.h>
53 #include <linux/timer.h>
54 #include <linux/errno.h>
55 #include <linux/ioport.h>
56 #include <linux/slab.h>
57 #include <linux/interrupt.h>
58 #include <linux/pci.h>
59 #include <linux/netdevice.h>
60 #include <linux/init.h>
61 #include <linux/mii.h>
62 #include <linux/etherdevice.h>
63 #include <linux/skbuff.h>
64 #include <linux/delay.h>
65 #include <linux/ethtool.h>
66 #include <linux/crc32.h>
67
68 #include <asm/processor.h> /* Processor type for cache alignment. */
69 #include <asm/bitops.h>
70 #include <asm/io.h>
71 #include <asm/uaccess.h> /* User space memory access functions */
72
73 #include "sis900.h"
74
75 #define SIS900_MODULE_NAME "sis900"
76 #define SIS900_DRV_VERSION "v1.08.07 11/02/2003"
77
78 static char version[] __devinitdata =
79 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
80
81 static int max_interrupt_work = 40;
82 static int multicast_filter_limit = 128;
83
84 #define sis900_debug debug
85 static int sis900_debug;
86
87 /* Time in jiffies before concluding the transmitter is hung. */
88 #define TX_TIMEOUT (4*HZ)
89 /* SiS 900 is capable of 32 bits BM DMA */
90 #define SIS900_DMA_MASK 0xffffffff
91
92 enum {
93 SIS_900 = 0,
94 SIS_7016
95 };
96 static char * card_names[] = {
97 "SiS 900 PCI Fast Ethernet",
98 "SiS 7016 PCI Fast Ethernet"
99 };
100 static struct pci_device_id sis900_pci_tbl [] = {
101 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
102 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
103 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
104 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
105 {0,}
106 };
107 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
108
109 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
110
111 static struct mii_chip_info {
112 const char * name;
113 u16 phy_id0;
114 u16 phy_id1;
115 u8 phy_types;
116 #define HOME 0x0001
117 #define LAN 0x0002
118 #define MIX 0x0003
119 #define UNKNOWN 0x0
120 } mii_chip_table[] = {
121 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
122 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
123 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
124 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
125 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
126 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
127 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
128 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
129 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
130 {NULL,},
131 };
132
133 struct mii_phy {
134 struct mii_phy * next;
135 int phy_addr;
136 u16 phy_id0;
137 u16 phy_id1;
138 u16 status;
139 u8 phy_types;
140 };
141
142 typedef struct _BufferDesc {
143 u32 link;
144 u32 cmdsts;
145 u32 bufptr;
146 } BufferDesc;
147
148 struct sis900_private {
149 struct net_device_stats stats;
150 struct pci_dev * pci_dev;
151
152 spinlock_t lock;
153
154 struct mii_phy * mii;
155 struct mii_phy * first_mii; /* record the first mii structure */
156 unsigned int cur_phy;
157
158 struct timer_list timer; /* Link status detection timer. */
159 u8 autong_complete; /* 1: auto-negotiate complete */
160
161 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
162 unsigned int cur_tx, dirty_tx;
163
164 /* The saved address of a sent/receive-in-place packet buffer */
165 struct sk_buff *tx_skbuff[NUM_TX_DESC];
166 struct sk_buff *rx_skbuff[NUM_RX_DESC];
167 BufferDesc *tx_ring;
168 BufferDesc *rx_ring;
169
170 dma_addr_t tx_ring_dma;
171 dma_addr_t rx_ring_dma;
172
173 unsigned int tx_full; /* The Tx queue is full. */
174 u8 host_bridge_rev;
175 u32 pci_state[16];
176 };
177
178 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
179 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
180 MODULE_LICENSE("GPL");
181
182 MODULE_PARM(multicast_filter_limit, "i");
183 MODULE_PARM(max_interrupt_work, "i");
184 MODULE_PARM(debug, "i");
185 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
186 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
187 MODULE_PARM_DESC(debug, "SiS 900/7016 debug level (2-4)");
188
189 static int sis900_open(struct net_device *net_dev);
190 static int sis900_mii_probe (struct net_device * net_dev);
191 static void sis900_init_rxfilter (struct net_device * net_dev);
192 static u16 read_eeprom(long ioaddr, int location);
193 static u16 mdio_read(struct net_device *net_dev, int phy_id, int location);
194 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
195 static void sis900_timer(unsigned long data);
196 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
197 static void sis900_tx_timeout(struct net_device *net_dev);
198 static void sis900_init_tx_ring(struct net_device *net_dev);
199 static void sis900_init_rx_ring(struct net_device *net_dev);
200 static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
201 static int sis900_rx(struct net_device *net_dev);
202 static void sis900_finish_xmit (struct net_device *net_dev);
203 static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
204 static int sis900_close(struct net_device *net_dev);
205 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
206 static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
207 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
208 static void set_rx_mode(struct net_device *net_dev);
209 static void sis900_reset(struct net_device *net_dev);
210 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
211 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
212 static u16 sis900_default_phy(struct net_device * net_dev);
213 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
214 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
215 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
216 static void sis900_set_mode (long ioaddr, int speed, int duplex);
217 static struct ethtool_ops sis900_ethtool_ops;
218
219 /**
220 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
221 * @pci_dev: the sis900 pci device
222 * @net_dev: the net device to get address for
223 *
224 * Older SiS900 and friends, use EEPROM to store MAC address.
225 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
226 */
227
228 static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
229 {
230 long ioaddr = pci_resource_start(pci_dev, 0);
231 u16 signature;
232 int i;
233
234 /* check to see if we have sane EEPROM */
235 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
236 if (signature == 0xffff || signature == 0x0000) {
237 printk (KERN_INFO "%s: Error EERPOM read %x\n",
238 net_dev->name, signature);
239 return 0;
240 }
241
242 /* get MAC address from EEPROM */
243 for (i = 0; i < 3; i++)
244 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
245
246 return 1;
247 }
248
249 /**
250 * sis630e_get_mac_addr - Get MAC address for SiS630E model
251 * @pci_dev: the sis900 pci device
252 * @net_dev: the net device to get address for
253 *
254 * SiS630E model, use APC CMOS RAM to store MAC address.
255 * APC CMOS RAM is accessed through ISA bridge.
256 * MAC address is read into @net_dev->dev_addr.
257 */
258
259 static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
260 {
261 struct pci_dev *isa_bridge = NULL;
262 u8 reg;
263 int i;
264
265 isa_bridge = pci_find_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
266 if (!isa_bridge) {
267 isa_bridge = pci_find_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
268 if (!isa_bridge) {
269 printk("%s: Can not find ISA bridge\n", net_dev->name);
270 return 0;
271 }
272 }
273 pci_read_config_byte(isa_bridge, 0x48, &reg);
274 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
275
276 for (i = 0; i < 6; i++) {
277 outb(0x09 + i, 0x70);
278 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
279 }
280 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
281
282 return 1;
283 }
284
285
286 /**
287 * sis635_get_mac_addr - Get MAC address for SIS635 model
288 * @pci_dev: the sis900 pci device
289 * @net_dev: the net device to get address for
290 *
291 * SiS635 model, set MAC Reload Bit to load Mac address from APC
292 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
293 * @net_dev->dev_addr.
294 */
295
296 static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
297 {
298 long ioaddr = net_dev->base_addr;
299 u32 rfcrSave;
300 u32 i;
301
302 rfcrSave = inl(rfcr + ioaddr);
303
304 outl(rfcrSave | RELOAD, ioaddr + cr);
305 outl(0, ioaddr + cr);
306
307 /* disable packet filtering before setting filter */
308 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
309
310 /* load MAC addr to filter data register */
311 for (i = 0 ; i < 3 ; i++) {
312 outl((i << RFADDR_shift), ioaddr + rfcr);
313 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
314 }
315
316 /* enable packet filtering */
317 outl(rfcrSave | RFEN, rfcr + ioaddr);
318
319 return 1;
320 }
321
322 /**
323 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
324 * @pci_dev: the sis900 pci device
325 * @net_dev: the net device to get address for
326 *
327 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
328 * is shared by
329 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
330 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
331 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
332 * EEDONE signal to refuse EEPROM access by LAN.
333 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
334 * The signature field in SiS962 or SiS963 spec is meaningless.
335 * MAC address is read into @net_dev->dev_addr.
336 */
337
338 static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
339 {
340 long ioaddr = net_dev->base_addr;
341 long ee_addr = ioaddr + mear;
342 u32 waittime = 0;
343 int i;
344
345 outl(EEREQ, ee_addr);
346 while(waittime < 2000) {
347 if(inl(ee_addr) & EEGNT) {
348
349 /* get MAC address from EEPROM */
350 for (i = 0; i < 3; i++)
351 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
352
353 outl(EEDONE, ee_addr);
354 return 1;
355 } else {
356 udelay(1);
357 waittime ++;
358 }
359 }
360 outl(EEDONE, ee_addr);
361 return 0;
362 }
363
364 /**
365 * sis900_probe - Probe for sis900 device
366 * @pci_dev: the sis900 pci device
367 * @pci_id: the pci device ID
368 *
369 * Check and probe sis900 net device for @pci_dev.
370 * Get mac address according to the chip revision,
371 * and assign SiS900-specific entries in the device structure.
372 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
373 */
374
375 static int __devinit sis900_probe (struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
376 {
377 struct sis900_private *sis_priv;
378 struct net_device *net_dev;
379 struct pci_dev *dev;
380 dma_addr_t ring_dma;
381 void *ring_space;
382 long ioaddr;
383 int i, ret;
384 u8 revision;
385 char *card_name = card_names[pci_id->driver_data];
386
387 /* when built into the kernel, we only print version if device is found */
388 #ifndef MODULE
389 static int printed_version;
390 if (!printed_version++)
391 printk(version);
392 #endif
393
394 /* setup various bits in PCI command register */
395 ret = pci_enable_device(pci_dev);
396 if(ret) return ret;
397
398 i = pci_set_dma_mask(pci_dev, SIS900_DMA_MASK);
399 if(i){
400 printk(KERN_ERR "sis900.c: architecture does not support"
401 "32bit PCI busmaster DMA\n");
402 return i;
403 }
404
405 pci_set_master(pci_dev);
406
407 net_dev = alloc_etherdev(sizeof(struct sis900_private));
408 if (!net_dev)
409 return -ENOMEM;
410 SET_MODULE_OWNER(net_dev);
411 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
412
413 /* We do a request_region() to register /proc/ioports info. */
414 ioaddr = pci_resource_start(pci_dev, 0);
415 ret = pci_request_regions(pci_dev, "sis900");
416 if (ret)
417 goto err_out;
418
419 sis_priv = net_dev->priv;
420 net_dev->base_addr = ioaddr;
421 net_dev->irq = pci_dev->irq;
422 sis_priv->pci_dev = pci_dev;
423 spin_lock_init(&sis_priv->lock);
424
425 pci_set_drvdata(pci_dev, net_dev);
426
427 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
428 if (!ring_space) {
429 ret = -ENOMEM;
430 goto err_out_cleardev;
431 }
432 sis_priv->tx_ring = (BufferDesc *)ring_space;
433 sis_priv->tx_ring_dma = ring_dma;
434
435 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
436 if (!ring_space) {
437 ret = -ENOMEM;
438 goto err_unmap_tx;
439 }
440 sis_priv->rx_ring = (BufferDesc *)ring_space;
441 sis_priv->rx_ring_dma = ring_dma;
442
443 /* The SiS900-specific entries in the device structure. */
444 net_dev->open = &sis900_open;
445 net_dev->hard_start_xmit = &sis900_start_xmit;
446 net_dev->stop = &sis900_close;
447 net_dev->get_stats = &sis900_get_stats;
448 net_dev->set_config = &sis900_set_config;
449 net_dev->set_multicast_list = &set_rx_mode;
450 net_dev->do_ioctl = &mii_ioctl;
451 net_dev->tx_timeout = sis900_tx_timeout;
452 net_dev->watchdog_timeo = TX_TIMEOUT;
453 net_dev->ethtool_ops = &sis900_ethtool_ops;
454
455 ret = register_netdev(net_dev);
456 if (ret)
457 goto err_unmap_rx;
458
459 /* Get Mac address according to the chip revision */
460 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision);
461 ret = 0;
462
463 if (revision == SIS630E_900_REV)
464 ret = sis630e_get_mac_addr(pci_dev, net_dev);
465 else if ((revision > 0x81) && (revision <= 0x90) )
466 ret = sis635_get_mac_addr(pci_dev, net_dev);
467 else if (revision == SIS96x_900_REV)
468 ret = sis96x_get_mac_addr(pci_dev, net_dev);
469 else
470 ret = sis900_get_mac_addr(pci_dev, net_dev);
471
472 if (ret == 0) {
473 ret = -ENODEV;
474 goto err_out_unregister;
475 }
476
477 /* 630ET : set the mii access mode as software-mode */
478 if (revision == SIS630ET_900_REV)
479 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
480
481 /* probe for mii transceiver */
482 if (sis900_mii_probe(net_dev) == 0) {
483 ret = -ENODEV;
484 goto err_out_unregister;
485 }
486
487 /* save our host bridge revision */
488 dev = pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
489 if (dev)
490 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
491
492 /* print some information about our NIC */
493 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
494 card_name, ioaddr, net_dev->irq);
495 for (i = 0; i < 5; i++)
496 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
497 printk("%2.2x.\n", net_dev->dev_addr[i]);
498
499 return 0;
500
501 err_out_unregister:
502 unregister_netdev(net_dev);
503 err_unmap_rx:
504 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
505 sis_priv->rx_ring_dma);
506 err_unmap_tx:
507 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
508 sis_priv->tx_ring_dma);
509 err_out_cleardev:
510 pci_set_drvdata(pci_dev, NULL);
511 pci_release_regions(pci_dev);
512 err_out:
513 free_netdev(net_dev);
514 return ret;
515 }
516
517 /**
518 * sis900_mii_probe - Probe MII PHY for sis900
519 * @net_dev: the net device to probe for
520 *
521 * Search for total of 32 possible mii phy addresses.
522 * Identify and set current phy if found one,
523 * return error if it failed to found.
524 */
525
526 static int __init sis900_mii_probe (struct net_device * net_dev)
527 {
528 struct sis900_private * sis_priv = net_dev->priv;
529 u16 poll_bit = MII_STAT_LINK, status = 0;
530 unsigned long timeout = jiffies + 5 * HZ;
531 int phy_addr;
532 u8 revision;
533
534 sis_priv->mii = NULL;
535
536 /* search for total of 32 possible mii phy addresses */
537 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
538 struct mii_phy * mii_phy = NULL;
539 u16 mii_status;
540 int i;
541
542 mii_phy = NULL;
543 for(i = 0; i < 2; i++)
544 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
545
546 if (mii_status == 0xffff || mii_status == 0x0000)
547 /* the mii is not accessible, try next one */
548 continue;
549
550 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
551 printk(KERN_INFO "Cannot allocate mem for struct mii_phy\n");
552 mii_phy = sis_priv->first_mii;
553 while (mii_phy) {
554 struct mii_phy *phy;
555 phy = mii_phy;
556 mii_phy = mii_phy->next;
557 kfree(phy);
558 }
559 return 0;
560 }
561
562 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
563 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
564 mii_phy->phy_addr = phy_addr;
565 mii_phy->status = mii_status;
566 mii_phy->next = sis_priv->mii;
567 sis_priv->mii = mii_phy;
568 sis_priv->first_mii = mii_phy;
569
570 for (i = 0; mii_chip_table[i].phy_id1; i++)
571 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
572 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
573 mii_phy->phy_types = mii_chip_table[i].phy_types;
574 if (mii_chip_table[i].phy_types == MIX)
575 mii_phy->phy_types =
576 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
577 printk(KERN_INFO "%s: %s transceiver found at address %d.\n",
578 net_dev->name, mii_chip_table[i].name, phy_addr);
579 break;
580 }
581
582 if( !mii_chip_table[i].phy_id1 ) {
583 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
584 net_dev->name, phy_addr);
585 mii_phy->phy_types = UNKNOWN;
586 }
587 }
588
589 if (sis_priv->mii == NULL) {
590 printk(KERN_INFO "%s: No MII transceivers found!\n",
591 net_dev->name);
592 return 0;
593 }
594
595 /* select default PHY for mac */
596 sis_priv->mii = NULL;
597 sis900_default_phy( net_dev );
598
599 /* Reset phy if default phy is internal sis900 */
600 if ((sis_priv->mii->phy_id0 == 0x001D) &&
601 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
602 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
603
604 /* workaround for ICS1893 PHY */
605 if ((sis_priv->mii->phy_id0 == 0x0015) &&
606 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
607 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
608
609 if(status & MII_STAT_LINK){
610 while (poll_bit) {
611 yield();
612
613 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
614 if (time_after_eq(jiffies, timeout)) {
615 printk(KERN_WARNING "%s: reset phy and link down now\n", net_dev->name);
616 return -ETIME;
617 }
618 }
619 }
620
621 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
622 if (revision == SIS630E_900_REV) {
623 /* SiS 630E has some bugs on default value of PHY registers */
624 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
625 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
626 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
627 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
628 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
629 }
630
631 if (sis_priv->mii->status & MII_STAT_LINK)
632 netif_carrier_on(net_dev);
633 else
634 netif_carrier_off(net_dev);
635
636 return 1;
637 }
638
639 /**
640 * sis900_default_phy - Select default PHY for sis900 mac.
641 * @net_dev: the net device to probe for
642 *
643 * Select first detected PHY with link as default.
644 * If no one is link on, select PHY whose types is HOME as default.
645 * If HOME doesn't exist, select LAN.
646 */
647
648 static u16 sis900_default_phy(struct net_device * net_dev)
649 {
650 struct sis900_private * sis_priv = net_dev->priv;
651 struct mii_phy *phy = NULL, *phy_home = NULL, *default_phy = NULL, *phy_lan = NULL;
652 u16 status;
653
654 for( phy=sis_priv->first_mii; phy; phy=phy->next ){
655 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
656 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
657
658 /* Link ON & Not select default PHY & not ghost PHY */
659 if ( (status & MII_STAT_LINK) && !default_phy && (phy->phy_types != UNKNOWN) )
660 default_phy = phy;
661 else{
662 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
663 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
664 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
665 if( phy->phy_types == HOME )
666 phy_home = phy;
667 else if (phy->phy_types == LAN)
668 phy_lan = phy;
669 }
670 }
671
672 if( !default_phy && phy_home )
673 default_phy = phy_home;
674 else if( !default_phy && phy_lan )
675 default_phy = phy_lan;
676 else if ( !default_phy )
677 default_phy = sis_priv->first_mii;
678
679 if( sis_priv->mii != default_phy ){
680 sis_priv->mii = default_phy;
681 sis_priv->cur_phy = default_phy->phy_addr;
682 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", net_dev->name,sis_priv->cur_phy);
683 }
684
685 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
686 status &= (~MII_CNTL_ISOLATE);
687
688 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
689 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
690 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
691
692 return status;
693 }
694
695
696 /**
697 * sis900_set_capability - set the media capability of network adapter.
698 * @net_dev : the net device to probe for
699 * @phy : default PHY
700 *
701 * Set the media capability of network adapter according to
702 * mii status register. It's necessary before auto-negotiate.
703 */
704
705 static void sis900_set_capability( struct net_device *net_dev , struct mii_phy *phy )
706 {
707 u16 cap;
708 u16 status;
709
710 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
711 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
712
713 cap = MII_NWAY_CSMA_CD |
714 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
715 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
716 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
717 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
718
719 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
720 }
721
722
723 /* Delay between EEPROM clock transitions. */
724 #define eeprom_delay() inl(ee_addr)
725
726 /**
727 * read_eeprom - Read Serial EEPROM
728 * @ioaddr: base i/o address
729 * @location: the EEPROM location to read
730 *
731 * Read Serial EEPROM through EEPROM Access Register.
732 * Note that location is in word (16 bits) unit
733 */
734
735 static u16 __devinit read_eeprom(long ioaddr, int location)
736 {
737 int i;
738 u16 retval = 0;
739 long ee_addr = ioaddr + mear;
740 u32 read_cmd = location | EEread;
741
742 outl(0, ee_addr);
743 eeprom_delay();
744 outl(EECS, ee_addr);
745 eeprom_delay();
746
747 /* Shift the read command (9) bits out. */
748 for (i = 8; i >= 0; i--) {
749 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
750 outl(dataval, ee_addr);
751 eeprom_delay();
752 outl(dataval | EECLK, ee_addr);
753 eeprom_delay();
754 }
755 outl(EECS, ee_addr);
756 eeprom_delay();
757
758 /* read the 16-bits data in */
759 for (i = 16; i > 0; i--) {
760 outl(EECS, ee_addr);
761 eeprom_delay();
762 outl(EECS | EECLK, ee_addr);
763 eeprom_delay();
764 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
765 eeprom_delay();
766 }
767
768 /* Terminate the EEPROM access. */
769 outl(0, ee_addr);
770 eeprom_delay();
771
772 return (retval);
773 }
774
775 /* Read and write the MII management registers using software-generated
776 serial MDIO protocol. Note that the command bits and data bits are
777 send out separately */
778 #define mdio_delay() inl(mdio_addr)
779
780 static void mdio_idle(long mdio_addr)
781 {
782 outl(MDIO | MDDIR, mdio_addr);
783 mdio_delay();
784 outl(MDIO | MDDIR | MDC, mdio_addr);
785 }
786
787 /* Syncronize the MII management interface by shifting 32 one bits out. */
788 static void mdio_reset(long mdio_addr)
789 {
790 int i;
791
792 for (i = 31; i >= 0; i--) {
793 outl(MDDIR | MDIO, mdio_addr);
794 mdio_delay();
795 outl(MDDIR | MDIO | MDC, mdio_addr);
796 mdio_delay();
797 }
798 return;
799 }
800
801 /**
802 * mdio_read - read MII PHY register
803 * @net_dev: the net device to read
804 * @phy_id: the phy address to read
805 * @location: the phy regiester id to read
806 *
807 * Read MII registers through MDIO and MDC
808 * using MDIO management frame structure and protocol(defined by ISO/IEC).
809 * Please see SiS7014 or ICS spec
810 */
811
812 static u16 mdio_read(struct net_device *net_dev, int phy_id, int location)
813 {
814 long mdio_addr = net_dev->base_addr + mear;
815 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
816 u16 retval = 0;
817 int i;
818
819 mdio_reset(mdio_addr);
820 mdio_idle(mdio_addr);
821
822 for (i = 15; i >= 0; i--) {
823 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
824 outl(dataval, mdio_addr);
825 mdio_delay();
826 outl(dataval | MDC, mdio_addr);
827 mdio_delay();
828 }
829
830 /* Read the 16 data bits. */
831 for (i = 16; i > 0; i--) {
832 outl(0, mdio_addr);
833 mdio_delay();
834 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
835 outl(MDC, mdio_addr);
836 mdio_delay();
837 }
838 outl(0x00, mdio_addr);
839
840 return retval;
841 }
842
843 /**
844 * mdio_write - write MII PHY register
845 * @net_dev: the net device to write
846 * @phy_id: the phy address to write
847 * @location: the phy regiester id to write
848 * @value: the register value to write with
849 *
850 * Write MII registers with @value through MDIO and MDC
851 * using MDIO management frame structure and protocol(defined by ISO/IEC)
852 * please see SiS7014 or ICS spec
853 */
854
855 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int value)
856 {
857 long mdio_addr = net_dev->base_addr + mear;
858 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
859 int i;
860
861 mdio_reset(mdio_addr);
862 mdio_idle(mdio_addr);
863
864 /* Shift the command bits out. */
865 for (i = 15; i >= 0; i--) {
866 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
867 outb(dataval, mdio_addr);
868 mdio_delay();
869 outb(dataval | MDC, mdio_addr);
870 mdio_delay();
871 }
872 mdio_delay();
873
874 /* Shift the value bits out. */
875 for (i = 15; i >= 0; i--) {
876 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
877 outl(dataval, mdio_addr);
878 mdio_delay();
879 outl(dataval | MDC, mdio_addr);
880 mdio_delay();
881 }
882 mdio_delay();
883
884 /* Clear out extra bits. */
885 for (i = 2; i > 0; i--) {
886 outb(0, mdio_addr);
887 mdio_delay();
888 outb(MDC, mdio_addr);
889 mdio_delay();
890 }
891 outl(0x00, mdio_addr);
892
893 return;
894 }
895
896
897 /**
898 * sis900_reset_phy - reset sis900 mii phy.
899 * @net_dev: the net device to write
900 * @phy_addr: default phy address
901 *
902 * Some specific phy can't work properly without reset.
903 * This function will be called during initialization and
904 * link status change from ON to DOWN.
905 */
906
907 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
908 {
909 int i = 0;
910 u16 status;
911
912 while (i++ < 2)
913 status = mdio_read(net_dev, phy_addr, MII_STATUS);
914
915 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
916
917 return status;
918 }
919
920 /**
921 * sis900_open - open sis900 device
922 * @net_dev: the net device to open
923 *
924 * Do some initialization and start net interface.
925 * enable interrupts and set sis900 timer.
926 */
927
928 static int
929 sis900_open(struct net_device *net_dev)
930 {
931 struct sis900_private *sis_priv = net_dev->priv;
932 long ioaddr = net_dev->base_addr;
933 u8 revision;
934 int ret;
935
936 /* Soft reset the chip. */
937 sis900_reset(net_dev);
938
939 /* Equalizer workaround Rule */
940 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
941 sis630_set_eq(net_dev, revision);
942
943 ret = request_irq(net_dev->irq, &sis900_interrupt, SA_SHIRQ, net_dev->name, net_dev);
944 if (ret)
945 return ret;
946
947 sis900_init_rxfilter(net_dev);
948
949 sis900_init_tx_ring(net_dev);
950 sis900_init_rx_ring(net_dev);
951
952 set_rx_mode(net_dev);
953
954 netif_start_queue(net_dev);
955
956 /* Workaround for EDB */
957 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
958
959 /* Enable all known interrupts by setting the interrupt mask. */
960 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
961 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
962 outl(IE, ioaddr + ier);
963
964 sis900_check_mode(net_dev, sis_priv->mii);
965
966 /* Set the timer to switch to check for link beat and perhaps switch
967 to an alternate media type. */
968 init_timer(&sis_priv->timer);
969 sis_priv->timer.expires = jiffies + HZ;
970 sis_priv->timer.data = (unsigned long)net_dev;
971 sis_priv->timer.function = &sis900_timer;
972 add_timer(&sis_priv->timer);
973
974 return 0;
975 }
976
977 /**
978 * sis900_init_rxfilter - Initialize the Rx filter
979 * @net_dev: the net device to initialize for
980 *
981 * Set receive filter address to our MAC address
982 * and enable packet filtering.
983 */
984
985 static void
986 sis900_init_rxfilter (struct net_device * net_dev)
987 {
988 long ioaddr = net_dev->base_addr;
989 u32 rfcrSave;
990 u32 i;
991
992 rfcrSave = inl(rfcr + ioaddr);
993
994 /* disable packet filtering before setting filter */
995 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
996
997 /* load MAC addr to filter data register */
998 for (i = 0 ; i < 3 ; i++) {
999 u32 w;
1000
1001 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1002 outl((i << RFADDR_shift), ioaddr + rfcr);
1003 outl(w, ioaddr + rfdr);
1004
1005 if (sis900_debug > 2) {
1006 printk(KERN_INFO "%s: Receive Filter Addrss[%d]=%x\n",
1007 net_dev->name, i, inl(ioaddr + rfdr));
1008 }
1009 }
1010
1011 /* enable packet filtering */
1012 outl(rfcrSave | RFEN, rfcr + ioaddr);
1013 }
1014
1015 /**
1016 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1017 * @net_dev: the net device to initialize for
1018 *
1019 * Initialize the Tx descriptor ring,
1020 */
1021
1022 static void
1023 sis900_init_tx_ring(struct net_device *net_dev)
1024 {
1025 struct sis900_private *sis_priv = net_dev->priv;
1026 long ioaddr = net_dev->base_addr;
1027 int i;
1028
1029 sis_priv->tx_full = 0;
1030 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1031
1032 for (i = 0; i < NUM_TX_DESC; i++) {
1033 sis_priv->tx_skbuff[i] = NULL;
1034
1035 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1036 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1037 sis_priv->tx_ring[i].cmdsts = 0;
1038 sis_priv->tx_ring[i].bufptr = 0;
1039 }
1040
1041 /* load Transmit Descriptor Register */
1042 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1043 if (sis900_debug > 2)
1044 printk(KERN_INFO "%s: TX descriptor register loaded with: %8.8x\n",
1045 net_dev->name, inl(ioaddr + txdp));
1046 }
1047
1048 /**
1049 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1050 * @net_dev: the net device to initialize for
1051 *
1052 * Initialize the Rx descriptor ring,
1053 * and pre-allocate recevie buffers (socket buffer)
1054 */
1055
1056 static void
1057 sis900_init_rx_ring(struct net_device *net_dev)
1058 {
1059 struct sis900_private *sis_priv = net_dev->priv;
1060 long ioaddr = net_dev->base_addr;
1061 int i;
1062
1063 sis_priv->cur_rx = 0;
1064 sis_priv->dirty_rx = 0;
1065
1066 /* init RX descriptor */
1067 for (i = 0; i < NUM_RX_DESC; i++) {
1068 sis_priv->rx_skbuff[i] = NULL;
1069
1070 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1071 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1072 sis_priv->rx_ring[i].cmdsts = 0;
1073 sis_priv->rx_ring[i].bufptr = 0;
1074 }
1075
1076 /* allocate sock buffers */
1077 for (i = 0; i < NUM_RX_DESC; i++) {
1078 struct sk_buff *skb;
1079
1080 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1081 /* not enough memory for skbuff, this makes a "hole"
1082 on the buffer ring, it is not clear how the
1083 hardware will react to this kind of degenerated
1084 buffer */
1085 break;
1086 }
1087 skb->dev = net_dev;
1088 sis_priv->rx_skbuff[i] = skb;
1089 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1090 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1091 skb->tail, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1092 }
1093 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1094
1095 /* load Receive Descriptor Register */
1096 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1097 if (sis900_debug > 2)
1098 printk(KERN_INFO "%s: RX descriptor register loaded with: %8.8x\n",
1099 net_dev->name, inl(ioaddr + rxdp));
1100 }
1101
1102 /**
1103 * sis630_set_eq - set phy equalizer value for 630 LAN
1104 * @net_dev: the net device to set equalizer value
1105 * @revision: 630 LAN revision number
1106 *
1107 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1108 * PHY register 14h(Test)
1109 * Bit 14: 0 -- Automatically dectect (default)
1110 * 1 -- Manually set Equalizer filter
1111 * Bit 13: 0 -- (Default)
1112 * 1 -- Speed up convergence of equalizer setting
1113 * Bit 9 : 0 -- (Default)
1114 * 1 -- Disable Baseline Wander
1115 * Bit 3~7 -- Equalizer filter setting
1116 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1117 * Then calculate equalizer value
1118 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1119 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1120 * Calculate Equalizer value:
1121 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1122 * When the equalizer is stable, this value is not a fixed value. It will be within
1123 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1124 * 0 <= max <= 4 --> set equalizer to max
1125 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1126 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1127 */
1128
1129 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1130 {
1131 struct sis900_private *sis_priv = net_dev->priv;
1132 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1133 int i, maxcount=10;
1134
1135 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1136 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1137 return;
1138
1139 if (netif_carrier_ok(net_dev)) {
1140 reg14h=mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1141 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, (0x2200 | reg14h) & 0xBFFF);
1142 for (i=0; i < maxcount; i++) {
1143 eq_value=(0x00F8 & mdio_read(net_dev, sis_priv->cur_phy, MII_RESV)) >> 3;
1144 if (i == 0)
1145 max_value=min_value=eq_value;
1146 max_value=(eq_value > max_value) ? eq_value : max_value;
1147 min_value=(eq_value < min_value) ? eq_value : min_value;
1148 }
1149 /* 630E rule to determine the equalizer value */
1150 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1151 revision == SIS630ET_900_REV) {
1152 if (max_value < 5)
1153 eq_value=max_value;
1154 else if (max_value >= 5 && max_value < 15)
1155 eq_value=(max_value == min_value) ? max_value+2 : max_value+1;
1156 else if (max_value >= 15)
1157 eq_value=(max_value == min_value) ? max_value+6 : max_value+5;
1158 }
1159 /* 630B0&B1 rule to determine the equalizer value */
1160 if (revision == SIS630A_900_REV &&
1161 (sis_priv->host_bridge_rev == SIS630B0 ||
1162 sis_priv->host_bridge_rev == SIS630B1)) {
1163 if (max_value == 0)
1164 eq_value=3;
1165 else
1166 eq_value=(max_value+min_value+1)/2;
1167 }
1168 /* write equalizer value and setting */
1169 reg14h=mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1170 reg14h=(reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1171 reg14h=(reg14h | 0x6000) & 0xFDFF;
1172 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1173 }
1174 else {
1175 reg14h=mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1176 if (revision == SIS630A_900_REV &&
1177 (sis_priv->host_bridge_rev == SIS630B0 ||
1178 sis_priv->host_bridge_rev == SIS630B1))
1179 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, (reg14h | 0x2200) & 0xBFFF);
1180 else
1181 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, (reg14h | 0x2000) & 0xBFFF);
1182 }
1183 return;
1184 }
1185
1186 /**
1187 * sis900_timer - sis900 timer routine
1188 * @data: pointer to sis900 net device
1189 *
1190 * On each timer ticks we check two things,
1191 * link status (ON/OFF) and link mode (10/100/Full/Half)
1192 */
1193
1194 static void sis900_timer(unsigned long data)
1195 {
1196 struct net_device *net_dev = (struct net_device *)data;
1197 struct sis900_private *sis_priv = net_dev->priv;
1198 struct mii_phy *mii_phy = sis_priv->mii;
1199 static int next_tick = 5*HZ;
1200 u16 status;
1201 u8 revision;
1202
1203 if (!sis_priv->autong_complete){
1204 int speed, duplex = 0;
1205
1206 sis900_read_mode(net_dev, &speed, &duplex);
1207 if (duplex){
1208 sis900_set_mode(net_dev->base_addr, speed, duplex);
1209 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
1210 sis630_set_eq(net_dev, revision);
1211 netif_start_queue(net_dev);
1212 }
1213
1214 sis_priv->timer.expires = jiffies + HZ;
1215 add_timer(&sis_priv->timer);
1216 return;
1217 }
1218
1219 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1220 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1221
1222 /* Link OFF -> ON */
1223 if (!netif_carrier_ok(net_dev)) {
1224 LookForLink:
1225 /* Search for new PHY */
1226 status = sis900_default_phy(net_dev);
1227 mii_phy = sis_priv->mii;
1228
1229 if (status & MII_STAT_LINK){
1230 sis900_check_mode(net_dev, mii_phy);
1231 netif_carrier_on(net_dev);
1232 }
1233 }
1234 /* Link ON -> OFF */
1235 else {
1236 if (!(status & MII_STAT_LINK)){
1237 netif_carrier_off(net_dev);
1238 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1239
1240 /* Change mode issue */
1241 if ((mii_phy->phy_id0 == 0x001D) &&
1242 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1243 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1244
1245 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
1246 sis630_set_eq(net_dev, revision);
1247
1248 goto LookForLink;
1249 }
1250 }
1251
1252 sis_priv->timer.expires = jiffies + next_tick;
1253 add_timer(&sis_priv->timer);
1254 }
1255
1256 /**
1257 * sis900_check_mode - check the media mode for sis900
1258 * @net_dev: the net device to be checked
1259 * @mii_phy: the mii phy
1260 *
1261 * Older driver gets the media mode from mii status output
1262 * register. Now we set our media capability and auto-negotiate
1263 * to get the upper bound of speed and duplex between two ends.
1264 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1265 * and autong_complete should be set to 1.
1266 */
1267
1268 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy)
1269 {
1270 struct sis900_private *sis_priv = net_dev->priv;
1271 long ioaddr = net_dev->base_addr;
1272 int speed, duplex;
1273
1274 if( mii_phy->phy_types == LAN ){
1275 outl( ~EXD & inl( ioaddr + cfg ), ioaddr + cfg);
1276 sis900_set_capability(net_dev , mii_phy);
1277 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1278 }else{
1279 outl(EXD | inl( ioaddr + cfg ), ioaddr + cfg);
1280 speed = HW_SPEED_HOME;
1281 duplex = FDX_CAPABLE_HALF_SELECTED;
1282 sis900_set_mode(ioaddr, speed, duplex);
1283 sis_priv->autong_complete = 1;
1284 }
1285 }
1286
1287 /**
1288 * sis900_set_mode - Set the media mode of mac register.
1289 * @ioaddr: the address of the device
1290 * @speed : the transmit speed to be determined
1291 * @duplex: the duplex mode to be determined
1292 *
1293 * Set the media mode of mac register txcfg/rxcfg according to
1294 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1295 * bus is used instead of PCI bus. When this bit is set 1, the
1296 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1297 * double words.
1298 */
1299
1300 static void sis900_set_mode (long ioaddr, int speed, int duplex)
1301 {
1302 u32 tx_flags = 0, rx_flags = 0;
1303
1304 if( inl(ioaddr + cfg) & EDB_MASTER_EN ){
1305 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | (TX_FILL_THRESH << TxFILLT_shift);
1306 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1307 }
1308 else{
1309 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | (TX_FILL_THRESH << TxFILLT_shift);
1310 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1311 }
1312
1313 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS ) {
1314 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1315 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1316 }
1317 else {
1318 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1319 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1320 }
1321
1322 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1323 tx_flags |= (TxCSI | TxHBI);
1324 rx_flags |= RxATX;
1325 }
1326
1327 outl (tx_flags, ioaddr + txcfg);
1328 outl (rx_flags, ioaddr + rxcfg);
1329 }
1330
1331 /**
1332 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1333 * @net_dev: the net device to read mode for
1334 * @phy_addr: mii phy address
1335 *
1336 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1337 * autong_complete should be set to 0 when starting auto-negotiation.
1338 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1339 * sis900_timer will wait for link on again if autong_complete = 0.
1340 */
1341
1342 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1343 {
1344 struct sis900_private *sis_priv = net_dev->priv;
1345 int i = 0;
1346 u32 status;
1347
1348 while (i++ < 2)
1349 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1350
1351 if (!(status & MII_STAT_LINK)){
1352 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1353 sis_priv->autong_complete = 1;
1354 netif_carrier_off(net_dev);
1355 return;
1356 }
1357
1358 /* (Re)start AutoNegotiate */
1359 mdio_write(net_dev, phy_addr, MII_CONTROL,
1360 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1361 sis_priv->autong_complete = 0;
1362 }
1363
1364
1365 /**
1366 * sis900_read_mode - read media mode for sis900 internal phy
1367 * @net_dev: the net device to read mode for
1368 * @speed : the transmit speed to be determined
1369 * @duplex : the duplex mode to be determined
1370 *
1371 * The capability of remote end will be put in mii register autorec
1372 * after auto-negotiation. Use AND operation to get the upper bound
1373 * of speed and duplex between two ends.
1374 */
1375
1376 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1377 {
1378 struct sis900_private *sis_priv = net_dev->priv;
1379 struct mii_phy *phy = sis_priv->mii;
1380 int phy_addr = sis_priv->cur_phy;
1381 u32 status;
1382 u16 autoadv, autorec;
1383 int i = 0;
1384
1385 while (i++ < 2)
1386 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1387
1388 if (!(status & MII_STAT_LINK))
1389 return;
1390
1391 /* AutoNegotiate completed */
1392 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1393 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1394 status = autoadv & autorec;
1395
1396 *speed = HW_SPEED_10_MBPS;
1397 *duplex = FDX_CAPABLE_HALF_SELECTED;
1398
1399 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1400 *speed = HW_SPEED_100_MBPS;
1401 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1402 *duplex = FDX_CAPABLE_FULL_SELECTED;
1403
1404 sis_priv->autong_complete = 1;
1405
1406 /* Workaround for Realtek RTL8201 PHY issue */
1407 if((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)){
1408 if(mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1409 *duplex = FDX_CAPABLE_FULL_SELECTED;
1410 if(mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1411 *speed = HW_SPEED_100_MBPS;
1412 }
1413
1414 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1415 net_dev->name,
1416 *speed == HW_SPEED_100_MBPS ?
1417 "100mbps" : "10mbps",
1418 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1419 "full" : "half");
1420 }
1421
1422 /**
1423 * sis900_tx_timeout - sis900 transmit timeout routine
1424 * @net_dev: the net device to transmit
1425 *
1426 * print transmit timeout status
1427 * disable interrupts and do some tasks
1428 */
1429
1430 static void sis900_tx_timeout(struct net_device *net_dev)
1431 {
1432 struct sis900_private *sis_priv = net_dev->priv;
1433 long ioaddr = net_dev->base_addr;
1434 unsigned long flags;
1435 int i;
1436
1437 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1438 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1439
1440 /* Disable interrupts by clearing the interrupt mask. */
1441 outl(0x0000, ioaddr + imr);
1442
1443 /* use spinlock to prevent interrupt handler accessing buffer ring */
1444 spin_lock_irqsave(&sis_priv->lock, flags);
1445
1446 /* discard unsent packets */
1447 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1448 for (i = 0; i < NUM_TX_DESC; i++) {
1449 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1450
1451 if (skb) {
1452 pci_unmap_single(sis_priv->pci_dev,
1453 sis_priv->tx_ring[i].bufptr, skb->len,
1454 PCI_DMA_TODEVICE);
1455 dev_kfree_skb_irq(skb);
1456 sis_priv->tx_skbuff[i] = NULL;
1457 sis_priv->tx_ring[i].cmdsts = 0;
1458 sis_priv->tx_ring[i].bufptr = 0;
1459 sis_priv->stats.tx_dropped++;
1460 }
1461 }
1462 sis_priv->tx_full = 0;
1463 netif_wake_queue(net_dev);
1464
1465 spin_unlock_irqrestore(&sis_priv->lock, flags);
1466
1467 net_dev->trans_start = jiffies;
1468
1469 /* load Transmit Descriptor Register */
1470 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1471
1472 /* Enable all known interrupts by setting the interrupt mask. */
1473 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1474 return;
1475 }
1476
1477 /**
1478 * sis900_start_xmit - sis900 start transmit routine
1479 * @skb: socket buffer pointer to put the data being transmitted
1480 * @net_dev: the net device to transmit with
1481 *
1482 * Set the transmit buffer descriptor,
1483 * and write TxENA to enable transmit state machine.
1484 * tell upper layer if the buffer is full
1485 */
1486
1487 static int
1488 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1489 {
1490 struct sis900_private *sis_priv = net_dev->priv;
1491 long ioaddr = net_dev->base_addr;
1492 unsigned int entry;
1493 unsigned long flags;
1494 unsigned int index_cur_tx, index_dirty_tx;
1495 unsigned int count_dirty_tx;
1496
1497 /* Don't transmit data before the complete of auto-negotiation */
1498 if(!sis_priv->autong_complete){
1499 netif_stop_queue(net_dev);
1500 return 1;
1501 }
1502
1503 spin_lock_irqsave(&sis_priv->lock, flags);
1504
1505 /* Calculate the next Tx descriptor entry. */
1506 entry = sis_priv->cur_tx % NUM_TX_DESC;
1507 sis_priv->tx_skbuff[entry] = skb;
1508
1509 /* set the transmit buffer descriptor and enable Transmit State Machine */
1510 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1511 skb->data, skb->len, PCI_DMA_TODEVICE);
1512 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1513 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1514
1515 sis_priv->cur_tx ++;
1516 index_cur_tx = sis_priv->cur_tx;
1517 index_dirty_tx = sis_priv->dirty_tx;
1518
1519 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1520 count_dirty_tx ++;
1521
1522 if (index_cur_tx == index_dirty_tx) {
1523 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1524 sis_priv->tx_full = 1;
1525 netif_stop_queue(net_dev);
1526 } else if (count_dirty_tx < NUM_TX_DESC) {
1527 /* Typical path, tell upper layer that more transmission is possible */
1528 netif_start_queue(net_dev);
1529 } else {
1530 /* buffer full, tell upper layer no more transmission */
1531 sis_priv->tx_full = 1;
1532 netif_stop_queue(net_dev);
1533 }
1534
1535 spin_unlock_irqrestore(&sis_priv->lock, flags);
1536
1537 net_dev->trans_start = jiffies;
1538
1539 if (sis900_debug > 3)
1540 printk(KERN_INFO "%s: Queued Tx packet at %p size %d "
1541 "to slot %d.\n",
1542 net_dev->name, skb->data, (int)skb->len, entry);
1543
1544 return 0;
1545 }
1546
1547 /**
1548 * sis900_interrupt - sis900 interrupt handler
1549 * @irq: the irq number
1550 * @dev_instance: the client data object
1551 * @regs: snapshot of processor context
1552 *
1553 * The interrupt handler does all of the Rx thread work,
1554 * and cleans up after the Tx thread
1555 */
1556
1557 static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1558 {
1559 struct net_device *net_dev = dev_instance;
1560 struct sis900_private *sis_priv = net_dev->priv;
1561 int boguscnt = max_interrupt_work;
1562 long ioaddr = net_dev->base_addr;
1563 u32 status;
1564 unsigned int handled = 0;
1565
1566 spin_lock (&sis_priv->lock);
1567
1568 do {
1569 status = inl(ioaddr + isr);
1570
1571 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1572 /* nothing intresting happened */
1573 break;
1574 handled = 1;
1575
1576 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1577 if (status & (RxORN | RxERR | RxOK))
1578 /* Rx interrupt */
1579 sis900_rx(net_dev);
1580
1581 if (status & (TxURN | TxERR | TxIDLE))
1582 /* Tx interrupt */
1583 sis900_finish_xmit(net_dev);
1584
1585 /* something strange happened !!! */
1586 if (status & HIBERR) {
1587 printk(KERN_INFO "%s: Abnormal interrupt,"
1588 "status %#8.8x.\n", net_dev->name, status);
1589 break;
1590 }
1591 if (--boguscnt < 0) {
1592 printk(KERN_INFO "%s: Too much work at interrupt, "
1593 "interrupt status = %#8.8x.\n",
1594 net_dev->name, status);
1595 break;
1596 }
1597 } while (1);
1598
1599 if (sis900_debug > 3)
1600 printk(KERN_INFO "%s: exiting interrupt, "
1601 "interrupt status = 0x%#8.8x.\n",
1602 net_dev->name, inl(ioaddr + isr));
1603
1604 spin_unlock (&sis_priv->lock);
1605 return IRQ_RETVAL(handled);
1606 }
1607
1608 /**
1609 * sis900_rx - sis900 receive routine
1610 * @net_dev: the net device which receives data
1611 *
1612 * Process receive interrupt events,
1613 * put buffer to higher layer and refill buffer pool
1614 * Note: This fucntion is called by interrupt handler,
1615 * don't do "too much" work here
1616 */
1617
1618 static int sis900_rx(struct net_device *net_dev)
1619 {
1620 struct sis900_private *sis_priv = net_dev->priv;
1621 long ioaddr = net_dev->base_addr;
1622 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1623 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1624
1625 if (sis900_debug > 3)
1626 printk(KERN_INFO "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1627 "status:0x%8.8x\n",
1628 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1629
1630 while (rx_status & OWN) {
1631 unsigned int rx_size;
1632
1633 rx_size = (rx_status & DSIZE) - CRC_SIZE;
1634
1635 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1636 /* corrupted packet received */
1637 if (sis900_debug > 3)
1638 printk(KERN_INFO "%s: Corrupted packet "
1639 "received, buffer status = 0x%8.8x.\n",
1640 net_dev->name, rx_status);
1641 sis_priv->stats.rx_errors++;
1642 if (rx_status & OVERRUN)
1643 sis_priv->stats.rx_over_errors++;
1644 if (rx_status & (TOOLONG|RUNT))
1645 sis_priv->stats.rx_length_errors++;
1646 if (rx_status & (RXISERR | FAERR))
1647 sis_priv->stats.rx_frame_errors++;
1648 if (rx_status & CRCERR)
1649 sis_priv->stats.rx_crc_errors++;
1650 /* reset buffer descriptor state */
1651 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1652 } else {
1653 struct sk_buff * skb;
1654
1655 /* This situation should never happen, but due to
1656 some unknow bugs, it is possible that
1657 we are working on NULL sk_buff :-( */
1658 if (sis_priv->rx_skbuff[entry] == NULL) {
1659 printk(KERN_INFO "%s: NULL pointer "
1660 "encountered in Rx ring, skipping\n",
1661 net_dev->name);
1662 break;
1663 }
1664
1665 pci_unmap_single(sis_priv->pci_dev,
1666 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1667 PCI_DMA_FROMDEVICE);
1668 /* give the socket buffer to upper layers */
1669 skb = sis_priv->rx_skbuff[entry];
1670 skb_put(skb, rx_size);
1671 skb->protocol = eth_type_trans(skb, net_dev);
1672 netif_rx(skb);
1673
1674 /* some network statistics */
1675 if ((rx_status & BCAST) == MCAST)
1676 sis_priv->stats.multicast++;
1677 net_dev->last_rx = jiffies;
1678 sis_priv->stats.rx_bytes += rx_size;
1679 sis_priv->stats.rx_packets++;
1680
1681 /* refill the Rx buffer, what if there is not enought memory for
1682 new socket buffer ?? */
1683 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1684 /* not enough memory for skbuff, this makes a "hole"
1685 on the buffer ring, it is not clear how the
1686 hardware will react to this kind of degenerated
1687 buffer */
1688 printk(KERN_INFO "%s: Memory squeeze,"
1689 "deferring packet.\n",
1690 net_dev->name);
1691 sis_priv->rx_skbuff[entry] = NULL;
1692 /* reset buffer descriptor state */
1693 sis_priv->rx_ring[entry].cmdsts = 0;
1694 sis_priv->rx_ring[entry].bufptr = 0;
1695 sis_priv->stats.rx_dropped++;
1696 break;
1697 }
1698 skb->dev = net_dev;
1699 sis_priv->rx_skbuff[entry] = skb;
1700 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1701 sis_priv->rx_ring[entry].bufptr =
1702 pci_map_single(sis_priv->pci_dev, skb->tail,
1703 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1704 sis_priv->dirty_rx++;
1705 }
1706 sis_priv->cur_rx++;
1707 entry = sis_priv->cur_rx % NUM_RX_DESC;
1708 rx_status = sis_priv->rx_ring[entry].cmdsts;
1709 } // while
1710
1711 /* refill the Rx buffer, what if the rate of refilling is slower than
1712 consuming ?? */
1713 for (;sis_priv->cur_rx - sis_priv->dirty_rx > 0; sis_priv->dirty_rx++) {
1714 struct sk_buff *skb;
1715
1716 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1717
1718 if (sis_priv->rx_skbuff[entry] == NULL) {
1719 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1720 /* not enough memory for skbuff, this makes a "hole"
1721 on the buffer ring, it is not clear how the
1722 hardware will react to this kind of degenerated
1723 buffer */
1724 printk(KERN_INFO "%s: Memory squeeze,"
1725 "deferring packet.\n",
1726 net_dev->name);
1727 sis_priv->stats.rx_dropped++;
1728 break;
1729 }
1730 skb->dev = net_dev;
1731 sis_priv->rx_skbuff[entry] = skb;
1732 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1733 sis_priv->rx_ring[entry].bufptr =
1734 pci_map_single(sis_priv->pci_dev, skb->tail,
1735 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1736 }
1737 }
1738 /* re-enable the potentially idle receive state matchine */
1739 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1740
1741 return 0;
1742 }
1743
1744 /**
1745 * sis900_finish_xmit - finish up transmission of packets
1746 * @net_dev: the net device to be transmitted on
1747 *
1748 * Check for error condition and free socket buffer etc
1749 * schedule for more transmission as needed
1750 * Note: This fucntion is called by interrupt handler,
1751 * don't do "too much" work here
1752 */
1753
1754 static void sis900_finish_xmit (struct net_device *net_dev)
1755 {
1756 struct sis900_private *sis_priv = net_dev->priv;
1757
1758 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1759 struct sk_buff *skb;
1760 unsigned int entry;
1761 u32 tx_status;
1762
1763 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1764 tx_status = sis_priv->tx_ring[entry].cmdsts;
1765
1766 if (tx_status & OWN) {
1767 /* The packet is not transmitted yet (owned by hardware) !
1768 Note: the interrupt is generated only when Tx Machine
1769 is idle, so this is an almost impossible case */
1770 break;
1771 }
1772
1773 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1774 /* packet unsuccessfully transmitted */
1775 if (sis900_debug > 3)
1776 printk(KERN_INFO "%s: Transmit "
1777 "error, Tx status %8.8x.\n",
1778 net_dev->name, tx_status);
1779 sis_priv->stats.tx_errors++;
1780 if (tx_status & UNDERRUN)
1781 sis_priv->stats.tx_fifo_errors++;
1782 if (tx_status & ABORT)
1783 sis_priv->stats.tx_aborted_errors++;
1784 if (tx_status & NOCARRIER)
1785 sis_priv->stats.tx_carrier_errors++;
1786 if (tx_status & OWCOLL)
1787 sis_priv->stats.tx_window_errors++;
1788 } else {
1789 /* packet successfully transmitted */
1790 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1791 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1792 sis_priv->stats.tx_packets++;
1793 }
1794 /* Free the original skb. */
1795 skb = sis_priv->tx_skbuff[entry];
1796 pci_unmap_single(sis_priv->pci_dev,
1797 sis_priv->tx_ring[entry].bufptr, skb->len,
1798 PCI_DMA_TODEVICE);
1799 dev_kfree_skb_irq(skb);
1800 sis_priv->tx_skbuff[entry] = NULL;
1801 sis_priv->tx_ring[entry].bufptr = 0;
1802 sis_priv->tx_ring[entry].cmdsts = 0;
1803 }
1804
1805 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1806 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1807 /* The ring is no longer full, clear tx_full and schedule more transmission
1808 by netif_wake_queue(net_dev) */
1809 sis_priv->tx_full = 0;
1810 netif_wake_queue (net_dev);
1811 }
1812 }
1813
1814 /**
1815 * sis900_close - close sis900 device
1816 * @net_dev: the net device to be closed
1817 *
1818 * Disable interrupts, stop the Tx and Rx Status Machine
1819 * free Tx and RX socket buffer
1820 */
1821
1822 static int
1823 sis900_close(struct net_device *net_dev)
1824 {
1825 long ioaddr = net_dev->base_addr;
1826 struct sis900_private *sis_priv = net_dev->priv;
1827 struct sk_buff *skb;
1828 int i;
1829
1830 netif_stop_queue(net_dev);
1831
1832 /* Disable interrupts by clearing the interrupt mask. */
1833 outl(0x0000, ioaddr + imr);
1834 outl(0x0000, ioaddr + ier);
1835
1836 /* Stop the chip's Tx and Rx Status Machine */
1837 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1838
1839 del_timer(&sis_priv->timer);
1840
1841 free_irq(net_dev->irq, net_dev);
1842
1843 /* Free Tx and RX skbuff */
1844 for (i = 0; i < NUM_RX_DESC; i++) {
1845 skb = sis_priv->rx_skbuff[i];
1846 if (skb) {
1847 pci_unmap_single(sis_priv->pci_dev,
1848 sis_priv->rx_ring[i].bufptr,
1849 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1850 dev_kfree_skb(skb);
1851 sis_priv->rx_skbuff[i] = NULL;
1852 }
1853 }
1854 for (i = 0; i < NUM_TX_DESC; i++) {
1855 skb = sis_priv->tx_skbuff[i];
1856 if (skb) {
1857 pci_unmap_single(sis_priv->pci_dev,
1858 sis_priv->tx_ring[i].bufptr, skb->len,
1859 PCI_DMA_TODEVICE);
1860 dev_kfree_skb(skb);
1861 sis_priv->tx_skbuff[i] = NULL;
1862 }
1863 }
1864
1865 /* Green! Put the chip in low-power mode. */
1866
1867 return 0;
1868 }
1869
1870 /**
1871 * sis900_get_drvinfo - Return information about driver
1872 * @net_dev: the net device to probe
1873 * @info: container for info returned
1874 *
1875 * Process ethtool command such as "ehtool -i" to show information
1876 */
1877
1878 static void sis900_get_drvinfo(struct net_device *net_dev,
1879 struct ethtool_drvinfo *info)
1880 {
1881 struct sis900_private *sis_priv = net_dev->priv;
1882
1883 strcpy (info->driver, SIS900_MODULE_NAME);
1884 strcpy (info->version, SIS900_DRV_VERSION);
1885 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1886 }
1887
1888 static struct ethtool_ops sis900_ethtool_ops = {
1889 .get_drvinfo = sis900_get_drvinfo,
1890 };
1891
1892 /**
1893 * mii_ioctl - process MII i/o control command
1894 * @net_dev: the net device to command for
1895 * @rq: parameter for command
1896 * @cmd: the i/o command
1897 *
1898 * Process MII command like read/write MII register
1899 */
1900
1901 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
1902 {
1903 struct sis900_private *sis_priv = net_dev->priv;
1904 struct mii_ioctl_data *data = if_mii(rq);
1905
1906 switch(cmd) {
1907 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
1908 data->phy_id = sis_priv->mii->phy_addr;
1909 /* Fall Through */
1910
1911 case SIOCGMIIREG: /* Read MII PHY register. */
1912 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
1913 return 0;
1914
1915 case SIOCSMIIREG: /* Write MII PHY register. */
1916 if (!capable(CAP_NET_ADMIN))
1917 return -EPERM;
1918 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1919 return 0;
1920 default:
1921 return -EOPNOTSUPP;
1922 }
1923 }
1924
1925 /**
1926 * sis900_get_stats - Get sis900 read/write statistics
1927 * @net_dev: the net device to get statistics for
1928 *
1929 * get tx/rx statistics for sis900
1930 */
1931
1932 static struct net_device_stats *
1933 sis900_get_stats(struct net_device *net_dev)
1934 {
1935 struct sis900_private *sis_priv = net_dev->priv;
1936
1937 return &sis_priv->stats;
1938 }
1939
1940 /**
1941 * sis900_set_config - Set media type by net_device.set_config
1942 * @dev: the net device for media type change
1943 * @map: ifmap passed by ifconfig
1944 *
1945 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
1946 * we support only port changes. All other runtime configuration
1947 * changes will be ignored
1948 */
1949
1950 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
1951 {
1952 struct sis900_private *sis_priv = dev->priv;
1953 struct mii_phy *mii_phy = sis_priv->mii;
1954
1955 u16 status;
1956
1957 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1958 /* we switch on the ifmap->port field. I couldn't find anything
1959 like a definition or standard for the values of that field.
1960 I think the meaning of those values is device specific. But
1961 since I would like to change the media type via the ifconfig
1962 command I use the definition from linux/netdevice.h
1963 (which seems to be different from the ifport(pcmcia) definition)
1964 */
1965 switch(map->port){
1966 case IF_PORT_UNKNOWN: /* use auto here */
1967 dev->if_port = map->port;
1968 /* we are going to change the media type, so the Link will
1969 be temporary down and we need to reflect that here. When
1970 the Link comes up again, it will be sensed by the sis_timer
1971 procedure, which also does all the rest for us */
1972 netif_carrier_off(dev);
1973
1974 /* read current state */
1975 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
1976
1977 /* enable auto negotiation and reset the negotioation
1978 (I don't really know what the auto negatiotiation reset
1979 really means, but it sounds for me right to do one here)*/
1980 mdio_write(dev, mii_phy->phy_addr,
1981 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1982
1983 break;
1984
1985 case IF_PORT_10BASET: /* 10BaseT */
1986 dev->if_port = map->port;
1987
1988 /* we are going to change the media type, so the Link will
1989 be temporary down and we need to reflect that here. When
1990 the Link comes up again, it will be sensed by the sis_timer
1991 procedure, which also does all the rest for us */
1992 netif_carrier_off(dev);
1993
1994 /* set Speed to 10Mbps */
1995 /* read current state */
1996 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
1997
1998 /* disable auto negotiation and force 10MBit mode*/
1999 mdio_write(dev, mii_phy->phy_addr,
2000 MII_CONTROL, status & ~(MII_CNTL_SPEED | MII_CNTL_AUTO));
2001 break;
2002
2003 case IF_PORT_100BASET: /* 100BaseT */
2004 case IF_PORT_100BASETX: /* 100BaseTx */
2005 dev->if_port = map->port;
2006
2007 /* we are going to change the media type, so the Link will
2008 be temporary down and we need to reflect that here. When
2009 the Link comes up again, it will be sensed by the sis_timer
2010 procedure, which also does all the rest for us */
2011 netif_carrier_off(dev);
2012
2013 /* set Speed to 100Mbps */
2014 /* disable auto negotiation and enable 100MBit Mode */
2015 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2016 mdio_write(dev, mii_phy->phy_addr,
2017 MII_CONTROL, (status & ~MII_CNTL_SPEED) | MII_CNTL_SPEED);
2018
2019 break;
2020
2021 case IF_PORT_10BASE2: /* 10Base2 */
2022 case IF_PORT_AUI: /* AUI */
2023 case IF_PORT_100BASEFX: /* 100BaseFx */
2024 /* These Modes are not supported (are they?)*/
2025 printk(KERN_INFO "Not supported");
2026 return -EOPNOTSUPP;
2027 break;
2028
2029 default:
2030 printk(KERN_INFO "Invalid");
2031 return -EINVAL;
2032 }
2033 }
2034 return 0;
2035 }
2036
2037 /**
2038 * sis900_mcast_bitnr - compute hashtable index
2039 * @addr: multicast address
2040 * @revision: revision id of chip
2041 *
2042 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2043 * hash table, which makes this function a little bit different from other drivers
2044 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2045 * multicast hash table.
2046 */
2047
2048 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2049 {
2050
2051 u32 crc = ether_crc(6, addr);
2052
2053 /* leave 8 or 7 most siginifant bits */
2054 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2055 return ((int)(crc >> 24));
2056 else
2057 return ((int)(crc >> 25));
2058 }
2059
2060 /**
2061 * set_rx_mode - Set SiS900 receive mode
2062 * @net_dev: the net device to be set
2063 *
2064 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2065 * And set the appropriate multicast filter.
2066 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2067 */
2068
2069 static void set_rx_mode(struct net_device *net_dev)
2070 {
2071 long ioaddr = net_dev->base_addr;
2072 struct sis900_private * sis_priv = net_dev->priv;
2073 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2074 int i, table_entries;
2075 u32 rx_mode;
2076 u8 revision;
2077
2078 /* 635 Hash Table entires = 256(2^16) */
2079 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
2080 if((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2081 table_entries = 16;
2082 else
2083 table_entries = 8;
2084
2085 if (net_dev->flags & IFF_PROMISC) {
2086 /* Accept any kinds of packets */
2087 rx_mode = RFPromiscuous;
2088 for (i = 0; i < table_entries; i++)
2089 mc_filter[i] = 0xffff;
2090 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2091 (net_dev->flags & IFF_ALLMULTI)) {
2092 /* too many multicast addresses or accept all multicast packet */
2093 rx_mode = RFAAB | RFAAM;
2094 for (i = 0; i < table_entries; i++)
2095 mc_filter[i] = 0xffff;
2096 } else {
2097 /* Accept Broadcast packet, destination address matchs our MAC address,
2098 use Receive Filter to reject unwanted MCAST packet */
2099 struct dev_mc_list *mclist;
2100 rx_mode = RFAAB;
2101 for (i = 0, mclist = net_dev->mc_list; mclist && i < net_dev->mc_count;
2102 i++, mclist = mclist->next) {
2103 unsigned int bit_nr =
2104 sis900_mcast_bitnr(mclist->dmi_addr, revision);
2105 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2106 }
2107 }
2108
2109 /* update Multicast Hash Table in Receive Filter */
2110 for (i = 0; i < table_entries; i++) {
2111 /* why plus 0x04 ??, That makes the correct value for hash table. */
2112 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2113 outl(mc_filter[i], ioaddr + rfdr);
2114 }
2115
2116 outl(RFEN | rx_mode, ioaddr + rfcr);
2117
2118 /* sis900 is capatable of looping back packet at MAC level for debugging purpose */
2119 if (net_dev->flags & IFF_LOOPBACK) {
2120 u32 cr_saved;
2121 /* We must disable Tx/Rx before setting loopback mode */
2122 cr_saved = inl(ioaddr + cr);
2123 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2124 /* enable loopback */
2125 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2126 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2127 /* restore cr */
2128 outl(cr_saved, ioaddr + cr);
2129 }
2130
2131 return;
2132 }
2133
2134 /**
2135 * sis900_reset - Reset sis900 MAC
2136 * @net_dev: the net device to reset
2137 *
2138 * reset sis900 MAC and wait until finished
2139 * reset through command register
2140 * change backoff algorithm for 900B0 & 635 M/B
2141 */
2142
2143 static void sis900_reset(struct net_device *net_dev)
2144 {
2145 struct sis900_private * sis_priv = net_dev->priv;
2146 long ioaddr = net_dev->base_addr;
2147 int i = 0;
2148 u32 status = TxRCMP | RxRCMP;
2149 u8 revision;
2150
2151 outl(0, ioaddr + ier);
2152 outl(0, ioaddr + imr);
2153 outl(0, ioaddr + rfcr);
2154
2155 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2156
2157 /* Check that the chip has finished the reset. */
2158 while (status && (i++ < 1000)) {
2159 status ^= (inl(isr + ioaddr) & status);
2160 }
2161
2162 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
2163 if( (revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV) )
2164 outl(PESEL | RND_CNT, ioaddr + cfg);
2165 else
2166 outl(PESEL, ioaddr + cfg);
2167 }
2168
2169 /**
2170 * sis900_remove - Remove sis900 device
2171 * @pci_dev: the pci device to be removed
2172 *
2173 * remove and release SiS900 net device
2174 */
2175
2176 static void __devexit sis900_remove(struct pci_dev *pci_dev)
2177 {
2178 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2179 struct sis900_private * sis_priv = net_dev->priv;
2180 struct mii_phy *phy = NULL;
2181
2182 while (sis_priv->first_mii) {
2183 phy = sis_priv->first_mii;
2184 sis_priv->first_mii = phy->next;
2185 kfree(phy);
2186 }
2187
2188 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2189 sis_priv->rx_ring_dma);
2190 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2191 sis_priv->tx_ring_dma);
2192 unregister_netdev(net_dev);
2193 free_netdev(net_dev);
2194 pci_release_regions(pci_dev);
2195 pci_set_drvdata(pci_dev, NULL);
2196 }
2197
2198 #ifdef CONFIG_PM
2199
2200 static int sis900_suspend(struct pci_dev *pci_dev, u32 state)
2201 {
2202 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2203 struct sis900_private *sis_priv = net_dev->priv;
2204 long ioaddr = net_dev->base_addr;
2205
2206 if(!netif_running(net_dev))
2207 return 0;
2208
2209 netif_stop_queue(net_dev);
2210 netif_device_detach(net_dev);
2211
2212 /* Stop the chip's Tx and Rx Status Machine */
2213 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2214
2215 pci_set_power_state(pci_dev, 3);
2216 pci_save_state(pci_dev, sis_priv->pci_state);
2217
2218 return 0;
2219 }
2220
2221 static int sis900_resume(struct pci_dev *pci_dev)
2222 {
2223 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2224 struct sis900_private *sis_priv = net_dev->priv;
2225 long ioaddr = net_dev->base_addr;
2226
2227 if(!netif_running(net_dev))
2228 return 0;
2229 pci_restore_state(pci_dev, sis_priv->pci_state);
2230 pci_set_power_state(pci_dev, 0);
2231
2232 sis900_init_rxfilter(net_dev);
2233
2234 sis900_init_tx_ring(net_dev);
2235 sis900_init_rx_ring(net_dev);
2236
2237 set_rx_mode(net_dev);
2238
2239 netif_device_attach(net_dev);
2240 netif_start_queue(net_dev);
2241
2242 /* Workaround for EDB */
2243 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2244
2245 /* Enable all known interrupts by setting the interrupt mask. */
2246 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2247 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2248 outl(IE, ioaddr + ier);
2249
2250 sis900_check_mode(net_dev, sis_priv->mii);
2251
2252 return 0;
2253 }
2254 #endif /* CONFIG_PM */
2255
2256 static struct pci_driver sis900_pci_driver = {
2257 .name = SIS900_MODULE_NAME,
2258 .id_table = sis900_pci_tbl,
2259 .probe = sis900_probe,
2260 .remove = __devexit_p(sis900_remove),
2261 #ifdef CONFIG_PM
2262 .suspend = sis900_suspend,
2263 .resume = sis900_resume,
2264 #endif /* CONFIG_PM */
2265 };
2266
2267 static int __init sis900_init_module(void)
2268 {
2269 /* when a module, this is printed whether or not devices are found in probe */
2270 #ifdef MODULE
2271 printk(version);
2272 #endif
2273
2274 return pci_module_init(&sis900_pci_driver);
2275 }
2276
2277 static void __exit sis900_cleanup_module(void)
2278 {
2279 pci_unregister_driver(&sis900_pci_driver);
2280 }
2281
2282 module_init(sis900_init_module);
2283 module_exit(sis900_cleanup_module);
2284
MOXA 2.6.9 from sdlinux-moxaart.tgz