1 /*******************************************************
2 2002-11-29: lmc83 modified from smc91111.h (2002-11-29)
3 2004/8/26 19:29: ivan wang modified
4 *******************************************************/
8 #define ISR_REG 0x00 // interrups status register
9 #define IMR_REG 0x04 // interrupt maks register
10 #define MAC_MADR_REG 0x08 // MAC address (Most significant)
11 #define MAC_LADR_REG 0x0c // MAC address (Least significant)
13 #define MAHT0_REG 0x10 // Multicast Address Hash Table 0 register
14 #define MAHT1_REG 0x14 // Multicast Address Hash Table 1 register
15 #define TXPD_REG 0x18 // Transmit Poll Demand register
16 #define RXPD_REG 0x1c // Receive Poll Demand register
17 #define TXR_BADR_REG 0x20 // Transmit Ring Base Address register
18 #define RXR_BADR_REG 0x24 // Receive Ring Base Address register
19 #define ITC_REG 0x28 // interrupt timer control register
20 #define APTC_REG 0x2c // Automatic Polling Timer control register
21 #define DBLAC_REG 0x30 // DMA Burst Length and Arbitration control register
25 #define MACCR_REG 0x88 // MAC control register
26 #define MACSR_REG 0x8c // MAC status register
27 #define PHYCR_REG 0x90 // PHY control register
28 #define PHYWDATA_REG 0x94 // PHY Write Data register
29 #define FCR_REG 0x98 // Flow Control register
30 #define BPR_REG 0x9c // back pressure register
31 #define WOLCR_REG 0xa0 // Wake-On-Lan control register
32 #define WOLSR_REG 0xa4 // Wake-On-Lan status register
33 #define WFCRC_REG 0xa8 // Wake-up Frame CRC register
34 #define WFBM1_REG 0xb0 // wake-up frame byte mask 1st double word register
35 #define WFBM2_REG 0xb4 // wake-up frame byte mask 2nd double word register
36 #define WFBM3_REG 0xb8 // wake-up frame byte mask 3rd double word register
37 #define WFBM4_REG 0xbc // wake-up frame byte mask 4th double word register
38 #define TM_REG 0xcc // test mode register
40 #define PHYSTS_CHG_bit (1UL<<9)
41 #define AHB_ERR_bit (1UL<<8)
42 #define RPKT_LOST_bit (1UL<<7)
43 #define RPKT_SAV_bit (1UL<<6)
44 #define XPKT_LOST_bit (1UL<<5)
45 #define XPKT_OK_bit (1UL<<4)
46 #define NOTXBUF_bit (1UL<<3)
47 #define XPKT_FINISH_bit (1UL<<2)
48 #define NORXBUF_bit (1UL<<1)
49 #define RPKT_FINISH_bit (1UL<<0)
54 unsigned int RXPOLL_CNT
:4;
55 unsigned int RXPOLL_TIME_SEL
:1;
56 unsigned int Reserved1
:3;
57 unsigned int TXPOLL_CNT
:4;
58 unsigned int TXPOLL_TIME_SEL
:1;
59 unsigned int Reserved2
:19;
60 }FTMAC100_APTCR_Status
;
63 #define RX_BROADPKT_bit (1UL<<17) // Receiving broadcast packet
64 #define RX_MULTIPKT_bit (1UL<<16) // receiving multicast packet
65 #define FULLDUP_bit (1UL<<15) // full duplex
66 #define CRC_APD_bit (1UL<<14) // append crc to transmit packet
67 #define MDC_SEL_bit (1UL<<13) // set MDC as TX_CK/10
68 #define RCV_ALL_bit (1UL<<12) // not check incoming packet's destination address
69 #define RX_FTL_bit (1UL<<11) // Store incoming packet even its length is great than 1518 byte
70 #define RX_RUNT_bit (1UL<<10) // Store incoming packet even its length is les than 64 byte
71 #define HT_MULTI_EN_bit (1UL<<9)
72 #define RCV_EN_bit (1UL<<8) // receiver enable
73 #define XMT_EN_bit (1UL<<5) // transmitter enable
74 #define CRC_DIS_bit (1UL<<4)
75 #define LOOP_EN_bit (1UL<<3) // Internal loop-back
76 #define SW_RST_bit (1UL<<2) // software reset/
77 #define RDMA_EN_bit (1UL<<1) // enable DMA receiving channel
78 #define XDMA_EN_bit (1UL<<0) // enable DMA transmitting channel
81 // --------------------------------------------------------------------
82 // Receive Ring descriptor structure
83 // --------------------------------------------------------------------
87 unsigned int ReceiveFrameLength
:11;//0~10
88 unsigned int Reserved1
:5; //11~15
89 unsigned int MULTICAST
:1; //16
90 unsigned int BROARDCAST
:1; //17
91 unsigned int RX_ERR
:1; //18
92 unsigned int CRC_ERR
:1; //19
95 unsigned int RX_ODD_NB
:1;
96 unsigned int Reserved2
:5;
99 unsigned int Reserved3
:1;
100 unsigned int RXDMA_OWN
:1; // 1 ==> owned by FTMAC100, 0 ==> owned by software
103 unsigned int RXBUF_Size
:11;
104 unsigned int Reserved
:20;
105 unsigned int EDOTR
:1;
108 unsigned int RXBUF_BADR
;
110 unsigned int VIR_RXBUF_BADR
; // not defined, §ÚÌ®³¨Ó©ñ receive buffer ªº virtual address
118 unsigned int TXPKT_LATECOL
:1;
119 unsigned int TXPKT_EXSCOL
:1;
120 unsigned int Reserved1
:29;
121 unsigned int TXDMA_OWN
:1;
124 unsigned int TXBUF_Size
:11;
125 unsigned int Reserved2
:16;
128 unsigned int TX2FIC
:1;
130 unsigned int EDOTR
:1;
133 unsigned int TXBUF_BADR
;
134 unsigned int VIR_TXBUF_BADR
;
142 #define OWNBY_SOFTWARE 0
143 #define OWNBY_FTMAC100 1
145 // --------------------------------------------------------------------
146 // driver related definition
147 // --------------------------------------------------------------------
148 #define RXDES_NUM 128
149 #define RX_BUF_SIZE 512
151 #define TX_BUF_SIZE 2048
154 struct ftmac100_local
156 // these are things that the kernel wants me to keep, so users
157 // can find out semi-useless statistics of how well the card is
159 struct net_device_stats stats
;
161 // Set to true during the auto-negotiation sequence
164 // Address of our PHY port
165 unsigned int phyaddr
;
168 unsigned int phytype
;
170 // Last contents of PHY Register 18
171 unsigned int lastPhy18
;
174 volatile RX_DESC
*rx_descs
; // receive ring base address
175 unsigned int rx_descs_dma
; // receive ring physical base address
176 char *rx_buf
; // receive buffer cpu address
177 int rx_buf_dma
; // receive buffer physical address
178 int rx_idx
; // receive descriptor
179 volatile TX_DESC
*tx_descs
;
180 unsigned int tx_descs_dma
;
186 struct tq_struct rcv_tq
; //john, queue rcv task
189 int __init
ftmac100_init(struct net_device
*dev
,u32 irq
, u32 base_addr
);
190 void ftmac100_destructor(struct net_device
*dev
);
191 static int ftmac100_open(struct net_device
*dev
);
192 static void ftmac100_timeout (struct net_device
*dev
);
193 static int ftmac100_close(struct net_device
*dev
);
194 static struct net_device_stats
* ftmac100_query_statistics( struct net_device
*dev
);
195 static void ftmac100_set_multicast_list(struct net_device
*dev
);
196 static void ftmac100_phy_configure(struct net_device
* dev
);
197 static void ftmac100_interrupt(int irq
, void *, struct pt_regs
*regs
);
198 static void ftmac100_rcv(void *dev
);
199 static int ftmac100_probe(struct net_device
*dev
, unsigned int ioaddr
);
200 static void ftmac100_reset( struct net_device
* dev
);
201 static void ftmac100_enable( struct net_device
*dev
);
202 //static word ftmac100_read_phy_register(unsigned int ioaddr, unsigned char phyaddr, unsigned char phyreg);
203 //static void ftmac100_write_phy_register(unsigned int ioaddr, unsigned char phyaddr, unsigned char phyreg, word phydata);