2 * linux/arch/arm/lib/copypage-fa.S
4 * Copyright (C) 2005 Faraday Corp.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * ASM optimised string functions
11 * 05/18/2005 : Luke Lee created, modified from copypage-v4wb.S
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/constants.h>
19 * ARMv4 optimised copy_user_page for Faraday processors
21 * We flush the destination cache lines just before we write the data into the
22 * corresponding address. Since the Dcache is read-allocate, this removes the
23 * Dcache aliasing issue. The writes will be forwarded to the write buffer,
24 * and merged as appropriate.
26 * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
27 * instruction. If your processor does not supply this, you have to write your
28 * own copy_user_page that does the right thing.
30 * copy_user_page(to,from,vaddr)
33 ENTRY(fa_copy_user_page)
34 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
36 stmfd sp!, {r4, lr} @ 2
37 mov r2, #PAGE_SZ/32 @ 1
39 ldmia r1!, {r3, r4, ip, lr} @ 4
40 1: stmia r0!, {r3, r4, ip, lr} @ 4
41 ldmia r1!, {r3, r4, ip, lr} @ 4+1
43 stmia r0!, {r3, r4, ip, lr} @ 4
44 ldmneia r1!, {r3, r4, ip, lr} @ 4
47 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache
48 ldmfd sp!, {r4, pc} @ 3
51 stmfd sp!, {r4, lr} @ 2
52 mov r2, #PAGE_SZ/32 @ 1
54 1: ldmia r1!, {r3, r4, ip, lr} @ 4
55 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
56 stmia r0!, {r3, r4, ip, lr} @ 4
57 ldmia r1!, {r3, r4, ip, lr} @ 4
58 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
59 stmia r0!, {r3, r4, ip, lr} @ 4
62 mcr p15, 0, r2, c7, c10, 4 @ 1 drain WB
63 ldmfd sp!, {r4, pc} @ 3
67 * ARMv4 optimised clear_user_page
69 * Same story as above.
72 ENTRY(fa_clear_user_page)
74 mov r1, #PAGE_SZ/32 @ 1
79 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
81 1: stmia r0!, {r2, r3, ip, lr} @ 4
82 stmia r0!, {r2, r3, ip, lr} @ 4
86 mcr p15, 0, r1, c7, c7, 0 @ flush ID cache
90 1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
91 stmia r0!, {r2, r3, ip, lr} @ 4
92 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
93 stmia r0!, {r2, r3, ip, lr} @ 4
96 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB
102 .type fa_user_fns, #object
104 .long fa_clear_user_page
105 .long fa_copy_user_page
106 .size fa_user_fns, . - fa_user_fns