backport/i2c-i801-smb/05-i2c-i801-doc.patch

   1 From ae7b0497b8280ad5ecfe7bd045c5106f35950c8a Mon Sep 17 00:00:00 2001
   2 From: Jean Delvare <khali@linux-fr.org>
   3 Date: Sun, 27 Jan 2008 18:14:49 +0100
   4 Subject: [PATCH] i2c-i801: Document which chip support what feature
   5
   6 Provide a clearer documentation of which additional features each
   7 ICH chip support, and which of these the driver supports.
   8
   9 Signed-off-by: Jean Delvare <khali@linux-fr.org>
  10
  11 diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
  12 index ac27e5f..8f16a47 100644
  13 --- a/drivers/i2c/busses/i2c-i801.c
  14 +++ b/drivers/i2c/busses/i2c-i801.c
  15 @@ -21,25 +21,34 @@
  16  */
  17
  18  /*
  19 -    SUPPORTED DEVICES  PCI ID
  20 -    82801AA            2413
  21 -    82801AB            2423
  22 -    82801BA            2443
  23 -    82801CA/CAM                2483
  24 -    82801DB            24C3   (HW PEC supported)
  25 -    82801EB            24D3   (HW PEC supported)
  26 -    6300ESB            25A4
  27 -    ICH6               266A
  28 -    ICH7               27DA
  29 -    ESB2               269B
  30 -    ICH8               283E
  31 -    ICH9               2930
  32 -    Tolapai            5032
  33 -    This driver supports several versions of Intel's I/O Controller Hubs (ICH).
  34 -    For SMBus support, they are similar to the PIIX4 and are part
  35 -    of Intel's '810' and other chipsets.
  36 -    See the file Documentation/i2c/busses/i2c-i801 for details.
  37 -    I2C Block Read and Process Call are not supported.
  38 +  Supports the following Intel I/O Controller Hubs (ICH):
  39 +
  40 +                                  I/O                     Block   I2C
  41 +                                  region  SMBus   Block   proc.   block
  42 +  Chip name             PCI ID    size    PEC     buffer  call    read
  43 +  ----------------------------------------------------------------------
  44 +  82801AA  (ICH)        0x2413     16      no      no      no      no
  45 +  82801AB  (ICH0)       0x2423     16      no      no      no      no
  46 +  82801BA  (ICH2)       0x2443     16      no      no      no      no
  47 +  82801CA  (ICH3)       0x2483     32     soft     no      no      no
  48 +  82801DB  (ICH4)       0x24c3     32     hard     yes     no      no
  49 +  82801E   (ICH5)       0x24d3     32     hard     yes     yes     yes
  50 +  6300ESB               0x25a4     32     hard     yes     yes     yes
  51 +  82801F   (ICH6)       0x266a     32     hard     yes     yes     yes
  52 +  6310ESB/6320ESB       0x269b     32     hard     yes     yes     yes
  53 +  82801G   (ICH7)       0x27da     32     hard     yes     yes     yes
  54 +  82801H   (ICH8)       0x283e     32     hard     yes     yes     yes
  55 +  82801I   (ICH9)       0x2930     32     hard     yes     yes     yes
  56 +  Tolapai               0x5032     32     hard     yes     ?       ?
  57 +
  58 +  Features supported by this driver:
  59 +  Software PEC                     no
  60 +  Hardware PEC                     yes
  61 +  Block buffer                     yes
  62 +  Block process call transaction   no
  63 +  I2C block read transaction       no
  64 +
  65 +  See the file Documentation/i2c/busses/i2c-i801 for details.
  66  */
  67
  68  /* Note: we assume there can only be one I801, with one SMBus interface */
  69 @@ -62,9 +71,9 @@
  70  #define SMBHSTDAT0     (5 + i801_smba)
  71  #define SMBHSTDAT1     (6 + i801_smba)
  72  #define SMBBLKDAT      (7 + i801_smba)
  73 -#define SMBPEC         (8 + i801_smba) /* ICH4 only */
  74 -#define SMBAUXSTS      (12 + i801_smba)        /* ICH4 only */
  75 -#define SMBAUXCTL      (13 + i801_smba)        /* ICH4 only */
  76 +#define SMBPEC         (8 + i801_smba)         /* ICH3 and later */
  77 +#define SMBAUXSTS      (12 + i801_smba)        /* ICH4 and later */
  78 +#define SMBAUXCTL      (13 + i801_smba)        /* ICH4 and later */
  79
  80  /* PCI Address Constants */
  81  #define SMBBAR         4
  82 @@ -91,13 +100,13 @@
  83  #define I801_BYTE              0x04
  84  #define I801_BYTE_DATA         0x08
  85  #define I801_WORD_DATA         0x0C
  86 -#define I801_PROC_CALL         0x10    /* later chips only, unimplemented */
  87 +#define I801_PROC_CALL         0x10    /* unimplemented */
  88  #define I801_BLOCK_DATA                0x14
  89  #define I801_I2C_BLOCK_DATA    0x18    /* unimplemented */
  90  #define I801_BLOCK_LAST                0x34
  91  #define I801_I2C_BLOCK_LAST    0x38    /* unimplemented */
  92  #define I801_START             0x40
  93 -#define I801_PEC_EN            0x80    /* ICH4 only */
  94 +#define I801_PEC_EN            0x80    /* ICH3 and later */
  95
  96  /* I801 Hosts Status register bits */
  97  #define SMBHSTSTS_BYTE_DONE    0x80