include/asm-m68knommu/DS1305RTC.h

   1 /***************************************************************************
   2                           DS1305RTC.h  -
   3               Real time clock control functions .
   4               These functions rely on the SPI module for communication.
   5                              -------------------
   6     begin                : Tue Oct 14 2003
   7     email                : ngustavson@emacinc.com
   8  ***************************************************************************/
   9
  10 /***************************************************************************
  11  *
  12  *   This program is free software; you can redistribute it and/or modify
  13  *   it under the terms of the GNU General Public License as published by
  14  *   the Free Software Foundation; either version 2 of the License, or
  15  *   (at your option) any later version.
  16  *
  17  ***************************************************************************/
  18 #ifndef DS1305RTC_H
  19 #define DS1305RTC_H
  20 #include <asm/coldfire.h>
  21 #include <asm/mcf_qspi.h>
  22 #include <linux/rtc.h>
  23
  24
  25 #define WRITE_OFFSET 0x80
  26 enum registers { SEC,MIN,HOURS,DAY,DATE,MONTH,YEAR,
  27 SEC_ALARM0,MIN_ALARM0,HOUR_ALARM0,DAY_ALARM0, //alarm0
  28 SEC_ALARM1,MIN_ALARM1,HOUR_ALARM1,DAY_ALARM1, //alarm1
  29 CONTROL,STATUS,TRICKLE_CHARGER};
  30
  31
  32 #define DSNAME "ds1305rtc"
  33 #define DS_DRIVER_V "1.0"
  34 #define DSMAJORNUM 0
  35
  36 /*CONTROL bits*/
  37 #define EOSC 0x80
  38 #define WP     0x40
  39 #define INTCN 4
  40 #define AIE1   2
  41 #define AIE0   1
  42
  43 #define INT0  0x04
  44 #define INT1  0x08
  45
  46 #define DDQS   *(volatile u8 *)(MCF_MBAR + 0x100021)
  47 #define SETQS   *(volatile u8 *)(MCF_MBAR + 0x100035)
  48 #define CLEARQS   *(volatile u8 *)(MCF_MBAR + 0x100049)
  49
  50 #define RTC_CS_MASK 0x40
  51 #define RTC_CE_SETUP() DDQS|=RTC_CS_MASK
  52 #define RTC_CE_ON()  qspi_mutex_down();SETQS=RTC_CS_MASK;
  53 #define RTC_CE_OFF() CLEARQS=~RTC_CS_MASK;qspi_mutex_up();
  54
  55
  56 typedef struct rtc_qspi_device{
  57 qspi_dev *qspi;
  58 }rtc_qspi_device;
  59
  60 #define SUCCESS 1
  61
  62 #define TIME2RTC(data) (((data/10)<<4)+(data%10))
  63 #define RTC2TIME(data) (((data>>4)*10)+(data&0x0f))
  64
  65 #define RTC_SECONDS(dev)    RTC_Read_Register(dev,SEC)
  66 #define RTC_MINUTES(dev)      RTC_Read_Register(dev,MIN)
  67 #define RTC_HOURS(dev)         RTC_Read_Register(dev,HOURS)
  68 #define RTC_DAY(dev)                    RTC_Read_Register(dev,DAY)
  69 #define RTC_DATE(dev)                   RTC_Read_Register(dev,DATE)
  70 #define RTC_MONTH(dev)        RTC_Read_Register(dev,MONTH)
  71 #define RTC_YEAR(dev)                   RTC_Read_Register(dev,YEAR)
  72
  73
  74 #define RTC_SET_SECONDS(dev,data)   RTC_Write_Register(dev,SEC,TIME2RTC(data))
  75 #define RTC_SET_MINUTES(dev,data)     RTC_Write_Register(dev,MIN,TIME2RTC(data))
  76 #define RTC_SET_HOURS(dev,data)        RTC_Write_Register(dev,HOURS,TIME2RTC(data))
  77 #define RTC_SET_DAY(dev,data)            RTC_Write_Register(dev,DAY,TIME2RTC(data))
  78 #define RTC_SET_DATE(dev,data)          RTC_Write_Register(dev,DATE,TIME2RTC(data))
  79 #define RTC_SET_MONTH(dev,data)       RTC_Write_Register(dev,MONTH,TIME2RTC(data))
  80 #define RTC_SET_YEAR(dev,data)          RTC_Write_Register(dev,YEAR,TIME2RTC(data))
  81
  82 #endif /*DS1305RTC_H*/