include/asm-arm/arch-p2001/hardware.h

   1 /*
   2  * linux/include/asm-arm/arch-p2001/hardware.h
   3  *
   4  *  Copyright (C) 2004 Tobias Lorenz
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #ifndef __ASM_ARCH_HARDWARE_H
  12 #define __ASM_ARCH_HARDWARE_H
  13
  14 #include <asm/sizes.h>
  15
  16 #ifndef __ASSEMBLY__
  17
  18 /* DMA descriptor */
  19 typedef struct {
  20         u32     stat;                   /* status: own, start, end, offset, status */
  21         u32     cntl;                   /* control: loop, int, type, channel, length */
  22         char    *buf;                   /* buffer */
  23         void    *next;                  /* nextdsc */
  24 } DMA_DSC;
  25
  26
  27 /* The address definitions are from asic_bf.h */
  28 typedef struct {                                        // 0x00100000U
  29         volatile unsigned int reserved1[0x3];
  30         volatile unsigned int ArmDmaPri;                // 0x0000000CU
  31         volatile unsigned int SDRAM_Ctrl;               // 0x00000010U
  32         volatile unsigned int ExtMem_Ctrl;              // 0x00000014U
  33         volatile unsigned int WaitState_Ext;            // 0x00000018U
  34         volatile unsigned int WaitState_Asic;           // 0x0000001CU
  35         volatile unsigned int TOP;                      // 0x00000020U
  36         volatile unsigned int reserved2[0x3];
  37         volatile unsigned int Adr1_EQ_30Bit;            // 0x00000030U
  38         volatile unsigned int Adr2_EQ_30Bit;            // 0x00000034U
  39         volatile unsigned int Adr3_EQ_30Bit;            // 0x00000038U
  40         volatile unsigned int Dat3_EQ_32Bit;            // 0x0000003CU
  41         volatile unsigned int Adr4_HE_20Bit;            // 0x00000040U
  42         volatile unsigned int Adr4_LT_20Bit;            // 0x00000044U
  43         volatile unsigned int Adr5_HE_20Bit;            // 0x00000048U
  44         volatile unsigned int Adr5_LT_20Bit;            // 0x0000004CU
  45         volatile unsigned int Adr_Control;              // 0x00000050U
  46         volatile unsigned int ABORT_IA_32Bit;           // 0x00000054U
  47 } *P2001_SYS_regs_ptr;
  48 #define P2001_SYS ((volatile P2001_SYS_regs_ptr) 0x00100000UL)
  49
  50 typedef struct {                                        // 0x00110000U
  51         volatile unsigned int Timer1;                   // 0x00000000U
  52         volatile unsigned int Timer2;                   // 0x00000004U
  53         volatile unsigned int TIMER_PRELOAD;            // 0x00000008U
  54         volatile unsigned int Timer12_PreDiv;           // 0x0000000CU
  55         volatile unsigned int TIMER_INT;                // 0x00000010U
  56         volatile unsigned int Freerun_Timer;            // 0x00000014U
  57         volatile unsigned int WatchDog_Timer;           // 0x00000018U
  58         volatile unsigned int reserved1[0x1];
  59         volatile unsigned int PWM_CNT;                  // 0x00000020U
  60         volatile unsigned int PWM_CNT2;                 // 0x00000024U
  61         volatile unsigned int reserved2[0x2];
  62         volatile unsigned int PLL_12000_config;         // 0x00000030U
  63         volatile unsigned int PLL_12288_config;         // 0x00000034U
  64         volatile unsigned int DIV_12288_config;         // 0x00000038U
  65         volatile unsigned int MOD_CNT_768;              // 0x0000003CU
  66         volatile unsigned int FSC_IRQ_STATUS;           // 0x00000040U
  67         volatile unsigned int FSC_CONFIG;               // 0x00000044U
  68         volatile unsigned int FSC_CONSTRUCT;            // 0x00000048U
  69         volatile unsigned int FSC_base_clk_reg;         // 0x0000004CU
  70         volatile unsigned int SYSCLK_SHAPE;             // 0x00000050U
  71         volatile unsigned int SDRAMCLK_SHAPE;           // 0x00000054U
  72         volatile unsigned int RING_OSZI;                // 0x00000058U
  73 } *P2001_TIMER_regs_ptr;
  74 #define P2001_TIMER ((volatile P2001_TIMER_regs_ptr) 0x00110000UL)
  75
  76 typedef struct {                                        // 0x00120000U
  77         volatile unsigned int reserved1[0x5];
  78         volatile unsigned int GPIO_Config;              // 0x00000014U
  79         volatile unsigned int GPIO_INT;                 // 0x00000018U
  80         volatile unsigned int GPIO_Out;                 // 0x0000001CU
  81         volatile unsigned int GPIO_IN;                  // 0x00000020U
  82         volatile unsigned int GPIO_En;                  // 0x00000024U
  83         volatile unsigned int PIN_MUX;                  // 0x00000028U
  84         volatile unsigned int NRES_OUT;                 // 0x0000002CU
  85         volatile unsigned int GPIO2_Out;                // 0x00000030U
  86         volatile unsigned int GPIO2_IN;                 // 0x00000034U
  87         volatile unsigned int GPIO2_En;                 // 0x00000038U
  88         volatile unsigned int GPIO_INT_SEL;             // 0x0000003CU
  89         volatile unsigned int GPI3_IN;                  // 0x00000040U
  90         volatile unsigned int GPO4_OUT;                 // 0x00000044U
  91 } *P2001_GPIO_regs_ptr;
  92 #define P2001_GPIO ((volatile P2001_GPIO_regs_ptr) 0x00120000UL)
  93
  94 typedef struct {                                        // 0x00130000U
  95         volatile unsigned int Main_NFIQ_Int_Ctrl;       // 0x00000000U
  96         volatile unsigned int Main_NIRQ_Int_Ctrl;       // 0x00000004U
  97         volatile unsigned int Status_NFIQ;              // 0x00000008U
  98         volatile unsigned int Status_NIRQ;              // 0x0000000CU
  99 } *P2001_INT_CTRL_regs_ptr;
 100 #define P2001_INT_CTRL ((volatile P2001_INT_CTRL_regs_ptr) 0x00130000UL)
 101
 102 typedef struct {                                        // 0x00130000U
 103         volatile unsigned int IRQ_STATUS;               // 0x00000000U
 104         volatile unsigned int FIQ_STATUS;               // 0x00000004U
 105         volatile unsigned int RAW_INTR;                 // 0x00000008U
 106         volatile unsigned int INT_SELECT;               // 0x0000000CU
 107         volatile unsigned int INT_ENABLE;               // 0x00000010U
 108         volatile unsigned int INT_ENCLEAR;              // 0x00000014U
 109         volatile unsigned int SOFTINT;                  // 0x00000018U
 110         volatile unsigned int SOFTINT_CLEAR;            // 0x0000001CU
 111         volatile unsigned int PROTECTION;               // 0x00000020U
 112         volatile unsigned int reserved1[0x3];
 113         volatile unsigned int CUR_VECT_ADDR;            // 0x00000030U
 114         volatile unsigned int DEF_VECT_ADDR;            // 0x00000034U
 115         volatile unsigned int reserved2[0x32];
 116         volatile unsigned int VECT_ADDR[16];            // 0x00000100U - 0x013CU
 117         volatile unsigned int reserved3[0x30];
 118         volatile unsigned int VECT_CNTL[16];            // 0x00000200U - 0x023CU
 119 } *P2001_LPEC_VIC_regs_ptr;
 120 #define P2001_LPEC_VIC ((volatile P2001_LPEC_VIC_regs_ptr) 0x00130000UL)
 121
 122 typedef union {                                         // 0x00140000U
 123         struct {        // write
 124                 volatile unsigned int TX[4];            // 0x00000000U-0x000CU
 125                 volatile unsigned int Baudrate;         // 0x00000010U
 126                 volatile unsigned int reserved1[0x3];
 127                 volatile unsigned int Config;           // 0x00000020U
 128                 volatile unsigned int Clear;            // 0x00000024U
 129                 volatile unsigned int Echo_EN;          // 0x00000028U
 130                 volatile unsigned int IRQ_Status;       // 0x0000002CU
 131         } w;            // write
 132
 133         struct {        // read
 134                 volatile unsigned int RX[4];            // 0x00000000U-0x000CU
 135                 volatile unsigned int reserved1[0x4];
 136                 volatile unsigned int PRE_STATUS;       // 0x00000020U
 137                 volatile unsigned int STATUS;           // 0x00000024U
 138                 volatile unsigned int reserved2[0x1];
 139                 volatile unsigned int IRQ_Status;       // 0x0000002CU
 140         } r;            // read
 141 } *P2001_UART_regs_ptr;
 142 #define P2001_UART ((volatile P2001_UART_regs_ptr) 0x00140000UL)
 143
 144 typedef struct {                                        // 0x00150000U
 145         struct {
 146                 volatile unsigned char S[0x100];        // 0x00000000U
 147                 volatile unsigned char H[0x100];        // 0x00000100U
 148         } BASE[8];
 149         struct {
 150                 volatile unsigned char S[0x100];        // 0x00001000U
 151                 volatile unsigned char H[0x100];        // 0x00001100U
 152         } HDLC;
 153         struct {
 154                 volatile unsigned char S[0x100];        // 0x00001200U
 155                 volatile unsigned char H[0x100];        // 0x00001300U
 156         } DTMF;
 157         volatile unsigned int reserved1[0x300];
 158         struct {
 159                 volatile unsigned int Control;          // 0x00002000U
 160                 volatile unsigned int Timeslot_Enable;  // 0x00002004U
 161                 volatile unsigned int Status;           // 0x00002008U
 162                 volatile unsigned int reserved1[0x1];
 163         } CTS[8];
 164         struct {
 165                 volatile unsigned int Control;          // 0x00002080U
 166                 volatile unsigned int Status;           // 0x00002084U
 167                 volatile unsigned int reserved1[0x2];
 168         } HDLC_WB;
 169         struct {
 170                 volatile unsigned int Control;          // 0x00002080U
 171                 volatile unsigned int Status;           // 0x00002084U
 172                 volatile unsigned int reserved1[0x2];
 173         } DTMF_WB;
 174         volatile unsigned int Peripheral_Frame_Sync[4]; // 0x000020A0U - 0x20ACU
 175         volatile unsigned int BSCK_FSC_Select;          // 0x000020B0U
 176 } *P2001_PCM_HW_regs_ptr;
 177 #define P2001_PCM_HW ((volatile P2001_PCM_HW_regs_ptr) 0x00150000UL)
 178
 179 typedef struct {                                        // 0x00160000U
 180         volatile unsigned int COEF_1394_697;            // 0x00000000U
 181         volatile unsigned int COEF_1540_770;            // 0x00000004U
 182         volatile unsigned int COEF_1704_852;            // 0x00000008U
 183         volatile unsigned int COEF_1882_941;            // 0x0000000CU
 184         volatile unsigned int COEF_2418_1209;           // 0x00000010U
 185         volatile unsigned int COEF_2672_1336;           // 0x00000014U
 186         volatile unsigned int COEF_2954_1477;           // 0x00000018U
 187         volatile unsigned int COEF_3266_1633;           // 0x0000001CU
 188         volatile unsigned int COEF_SIGNS;               // 0x00000020U
 189         volatile unsigned int RECURSION_COUNTER;        // 0x00000024U
 190         volatile unsigned int LAW_SCALE;                // 0x00000028U
 191         volatile unsigned int reserved1[0x3];
 192         volatile unsigned int MAC_TABLE_LO_N;           // 0x00000038U
 193         volatile unsigned int MAC_TABLE_HI_N;           // 0x0000003CU
 194         volatile unsigned int MAG_TONE[8];              // 0x00000040U
 195         volatile unsigned int MAG_OVERTONE[8];          // 0x00000060U
 196         /* Basetone T = 0:697Hz / 1:770Hz / ... / 7:1633Hz */
 197         struct {
 198                 volatile unsigned int TAP1;             // 0x00000080U
 199                 volatile unsigned int TAP2;             // 0x00000084U
 200         } TONE[8];
 201         /* Overtone OT= 0:1394Hz / 1:1540Hz / ... / 7:3266Hz */
 202         struct {
 203                 volatile unsigned int TAP1;             // 0x000000C0U
 204                 volatile unsigned int TAP2;             // 0x000000C4U
 205         } OVERTONE[8];
 206 } *P2001_DTMF_COEF_regs_ptr;
 207 #define P2001_DTMF_COEF(x) ((volatile P2001_DTMF_COEF_regs_ptr) ((unsigned int) 0x00160000UL+(0x100UL*(x)))) /* x = 0..31 */
 208
 209 typedef struct {                                        // 0x00162000U
 210         volatile unsigned int ENA_REG;                  // 0x00000000U
 211         volatile unsigned int IRQ_STAT_REG;             // 0x00000004U
 212 } *P2001_DTMF_regs_ptr;
 213 #define P2001_DTMF ((volatile P2001_DTMF_regs_ptr) 0x00162000UL)
 214
 215 typedef struct {                                        // 0x00164000U
 216         volatile unsigned int VAL_LO;                   // 0x00000000U
 217         volatile unsigned int VAL_HI;                   // 0x00000004U
 218         volatile unsigned int RES;                      // 0x00000008U
 219 } *P2001_MAC_CMP_regs_ptr;
 220 #define P2001_MAC_CMP ((volatile P2001_MAC_CMP_regs_ptr) 0x00164000UL)
 221
 222 typedef struct {                                        // 0x00170_00U _=0,4
 223         volatile unsigned int B1_REC;                   // 0x00000000U
 224         volatile unsigned int B1_SEND;                  // 0x00000004U
 225         volatile unsigned int B2_REC;                   // 0x00000008U
 226         volatile unsigned int B2_SEND;                  // 0x0000000CU
 227         volatile unsigned int D_REC;                    // 0x00000010U
 228         volatile unsigned int D_SEND;                   // 0x00000014U
 229         volatile unsigned int E_REC;                    // 0x00000018U
 230         volatile unsigned int CTRL;                     // 0x0000001CU
 231         volatile unsigned int INT_EN;                   // 0x00000020U
 232         volatile unsigned int INT_STATUS;               // 0x00000024U
 233         volatile unsigned int FSC_PHASE;                // 0x00000028U
 234         volatile unsigned int reserved1[0x25];
 235         /* HFC-S+ Registers */
 236         volatile unsigned int STATES;                   // 0x000000C0U (HFC-S+ Adr 30)
 237         volatile unsigned int SCTRL;                    // 0x000000C4U (HFC-S+ Adr 31)
 238         volatile unsigned int SCTRL_E;                  // 0x000000C8U (HFC-S+ Adr 32)
 239         volatile unsigned int SCTRL_R;                  // 0x000000CCU (HFC-S+ Adr 33)
 240         volatile unsigned int SQ_REC_SEND;              // 0x000000D0U (HFC-S+ Adr 34)
 241         volatile unsigned int reserved2[0x2];
 242         volatile unsigned int CLKDEL;                   // 0x000000DCU (HFC-S+ Adr 37)
 243 } *P2001_S0_regs_ptr;
 244 #define P2001_S0(x) ((volatile P2001_S0_regs_ptr) ((unsigned int) 0x00170000UL+(0x400UL*(x)))) /* x = 0..1 */
 245
 246 typedef struct {                                        // 0x0018_000U _=0,1,2,3
 247         volatile DMA_DSC *    RMAC_DMA_DESC;            // 0x00000000U
 248         volatile unsigned int RMAC_DMA_CNTL;            // 0x00000004U
 249         volatile unsigned int RMAC_DMA_STAT;            // 0x00000008U
 250         volatile unsigned int RMAC_DMA_EN;              // 0x0000000CU
 251         volatile unsigned int RMAC_CNTL;                // 0x00000010U
 252         volatile unsigned int RMAC_TLEN;                // 0x00000014U
 253         volatile unsigned int RMAC_PHYU;                // 0x00000018U
 254         volatile unsigned int RMAC_PHYL;                // 0x0000001CU
 255         volatile unsigned int RMAC_PFM[8];              // 0x00000020U-0x003CU
 256         volatile unsigned int RMAC_MIB[6];              // 0x00000040U-0x0054U
 257         volatile unsigned int reserved1[0x1e8];
 258         volatile unsigned int RMAC_DMA_DATA;            // 0x000007F8U
 259         volatile unsigned int RMAC_DMA_ADR;             // 0x000007FCU
 260         volatile DMA_DSC *    TMAC_DMA_DESC;            // 0x00000800U
 261         volatile unsigned int TMAC_DMA_CNTL;            // 0x00000804U
 262         volatile unsigned int TMAC_DMA_STAT;            // 0x00000808U
 263         volatile unsigned int TMAC_DMA_EN;              // 0x0000080CU
 264         volatile unsigned int TMAC_CNTL;                // 0x00000810U
 265         volatile unsigned int TMAC_MIB[2];              // 0x00000814U-0x0818U
 266         volatile unsigned int reserved2[0x1];
 267         volatile unsigned int MU_CNTL;                  // 0x00000820U
 268         volatile unsigned int MU_DATA;                  // 0x00000824U
 269         volatile unsigned int MU_DIV;                   // 0x00000828U
 270         volatile unsigned int CONF_RMII;                // 0x0000082CU
 271         volatile unsigned int reserved3[0x1f2];
 272         volatile unsigned int TMAC_DMA_DATA;            // 0x00000FF8U
 273         volatile unsigned int TMAC_DMA_ADR;             // 0x00000FFCU
 274 } *P2001_ETH_regs_ptr;
 275 #define P2001_EU(x) ((volatile P2001_ETH_regs_ptr) ((unsigned int) 0x00180000UL+(0x1000UL*(x)))) /* x = 0..3 */
 276 #define P2001_MU  P2001_EU(0)
 277
 278 typedef struct {                                // 0x00184__0U _=00,...7C
 279         volatile unsigned int v_tx_dma_desc;    // 0x00000000U
 280         volatile unsigned int reserved1[0x1];
 281         volatile unsigned int v_tx_dma_stat;    // 0x00000008U
 282         volatile unsigned int v_tx_dma_en;      // 0x0000000CU
 283         volatile unsigned int v_rx_dma_desc;    // 0x00000010U
 284         volatile unsigned int v_rx_dma_cntl;    // 0x00000014U
 285         volatile unsigned int v_rx_dma_stat;    // 0x00000018U
 286         volatile unsigned int v_rx_dma_en;      // 0x0000001CU
 287         volatile unsigned int v_mode;           // 0x00000020U
 288         volatile unsigned int v_es_reg;         // 0x00000024U
 289         volatile unsigned int v_es_stat;        // 0x00000028U
 290         volatile unsigned int reserved2[0x5];
 291 } *P2001_HDLC_DMA_regs_ptr[32];
 292 #define P2001_HDLC_DMA ((volatile P2001_HDLC_regs_ptr) 0x00184000UL)
 293
 294 typedef struct {                                // 0x001847F0U
 295         volatile unsigned int reserved1[0x2];
 296         volatile unsigned int rx_data;          // 0x000007F8U
 297         volatile unsigned int rx_adr;           // 0x000007FCU
 298         volatile unsigned int mts_tsa_base;     // 0x00000800U
 299         volatile unsigned int reserved2[0x183];
 300         volatile unsigned int pcm_cntl;         // 0x00000E10U
 301         volatile unsigned int reserved3[0x1];
 302         volatile unsigned int frame_end;        // 0x00000E18U
 303         volatile unsigned int v_data_stat;      // 0x00000E1CU
 304         volatile unsigned int v_err_stat;       // 0x00000E20U
 305         volatile unsigned int reserved4[0x75];
 306         volatile unsigned int tx_data;          // 0x00000FF8U
 307         volatile unsigned int tx_adr;           // 0x00000FFCU
 308 } *P2001_HDLC_regs_ptr;
 309 #define P2001_HDLC ((volatile P2001_HDLC_regs_ptr) 0x001847F0UL)
 310
 311 typedef struct {                                        // 0x00190000U
 312         volatile unsigned int FUNC_ADDR;                // 0x00000000U
 313         volatile unsigned int MODE_CTRL;                // 0x00000004U
 314         volatile unsigned int CTRL;                     // 0x00000008U
 315         volatile unsigned int MAIN_EVENT;               // 0x0000000CU
 316         volatile unsigned int MAIN_EVENT_MSK;           // 0x00000010U
 317         volatile unsigned int STATIC_EVENT;             // 0x00000014U
 318         volatile unsigned int STATIC_EVENT_MSK;         // 0x00000018U
 319         volatile unsigned int FRM_TIMER;                // 0x0000001CU
 320         volatile unsigned int OUT_EP_SEL;               // 0x00000020U
 321         volatile unsigned int OUT_DATA;                 // 0x00000024U
 322         volatile unsigned int OUT_CMD;                  // 0x00000028U
 323         volatile unsigned int OUT_STAT;                 // 0x0000002CU
 324         volatile unsigned int IN_EP_SEL;                // 0x00000030U
 325         volatile unsigned int IN_DATA;                  // 0x00000034U
 326         volatile unsigned int IN_CMD;                   // 0x00000038U
 327         volatile unsigned int reserved1[0x1];
 328         volatile unsigned int OEP_ENA;                  // 0x00000040U
 329         volatile unsigned int IEP_ENA;                  // 0x00000044U
 330         volatile unsigned int OEP_STALL;                // 0x00000048U
 331         volatile unsigned int IEP_STALL;                // 0x0000004CU
 332         volatile unsigned int OUT_EVENT;                // 0x00000050U
 333         volatile unsigned int OUT_EVENT_MSK;            // 0x00000054U
 334         volatile unsigned int IN_EVENT;                 // 0x00000058U
 335         volatile unsigned int IN_EVENT_MSK;             // 0x0000005CU
 336         volatile unsigned int IN_ISO_CONF_REG;          // 0x00000060U
 337         volatile unsigned int OUT_ISO_CONF_REG;         // 0x00000064U
 338         volatile unsigned int IN_PTR_REG;               // 0x00000068U
 339         volatile unsigned int OUT_PTR_REG;              // 0x0000006CU
 340         volatile unsigned int reserved2[0x3];
 341         volatile unsigned int CTRL_REG;                 // 0x0000007CU
 342 } *P2001_USB_regs_ptr;
 343 #define P2001_USB ((volatile P2001_USB_regs_ptr) 0x00190000UL)
 344
 345 typedef volatile unsigned char *P2001_USB_FIFO_ptr[64];
 346 #define P2001_USB_EPxIN(x)  ((volatile P2001_USB_FIFO_ptr) ((unsigned int) 0x001A0000UL+(0x40UL*(x)))) /* x = 0..5 */
 347 #define P2001_USB_EPxOUT(x) ((volatile P2001_USB_FIFO_ptr) ((unsigned int) 0x001A0180UL+(0x40UL*(x)))) /* x = 0..5 */
 348
 349 #endif
 350
 351 #endif  /* _ASM_ARCH_HARDWARE_H */