1 /******************************************************************************
4 ******************************************************************************/
6 #ifndef __ALTERA_AVALON_SPI_REGS_H__
7 #define __ALTERA_AVALON_SPI_REGS_H__
9 #define CONFIG_MTD_EPCS_DEBUG 0
10 #define EPCS_DEBUG1 (CONFIG_MTD_EPCS_DEBUG >= 1)
11 #define EPCS_DEBUG2 (CONFIG_MTD_EPCS_DEBUG >= 2)
12 #define EPCS_DEBUG3 (CONFIG_MTD_EPCS_DEBUG >= 3)
15 #define EPCS_SIG_1MBIT 0x10
16 #define EPCS_SIZE_1MBIT ((1 << 20)/8)
18 #define EPCS_SIG_4MBIT 0x12
19 #define EPCS_SIZE_4MBIT (EPCS_SIZE_1MBIT*4)
21 #define EPCS_SIG_16MBIT 0x14
22 #define EPCS_SIZE_16MBIT (EPCS_SIZE_4MBIT*4)
25 #define EPCS_SIG_64MBIT 0x16
26 #define EPCS_SIZE_64MBIT (EPCS_SIZE_16MBIT*4)
28 #define EPCS_SECSIZE_64KB ((1<<10)*64)
29 #define EPCS_SECSIZE_32KB ((1<<10)*32)
31 #define EPCS_PAGESIZE 256
33 /*------------------------------------------------------------------------
34 * SPI (http://www.altera.com/literature/ds/ds_nios_spi.pdf)
35 *----------------------------------------------------------------------*/
36 typedef volatile struct nios_spi_t
{
37 u_int rxdata
; /* Rx data reg */
38 u_int txdata
; /* Tx data reg */
39 u_int status
; /* Status reg */
40 u_int control
; /* Control reg */
41 u_int reserved
; /* (master only) */
42 u_int slaveselect
; /* SPI slave select mask (master only) */
46 #define NIOS_SPI_ROE (1 << 3) /* rx overrun */
47 #define NIOS_SPI_TOE (1 << 4) /* tx overrun */
48 #define NIOS_SPI_TMT (1 << 5) /* tx empty */
49 #define NIOS_SPI_TRDY (1 << 6) /* tx ready */
50 #define NIOS_SPI_RRDY (1 << 7) /* rx ready */
51 #define NIOS_SPI_E (1 << 8) /* exception */
53 /* control register */
54 #define NIOS_SPI_IROE (1 << 3) /* rx overrun int ena */
55 #define NIOS_SPI_ITOE (1 << 4) /* tx overrun int ena */
56 #define NIOS_SPI_ITRDY (1 << 6) /* tx ready int ena */
57 #define NIOS_SPI_IRRDY (1 << 7) /* rx ready int ena */
58 #define NIOS_SPI_IE (1 << 8) /* exception int ena */
59 #define NIOS_SPI_SSO (1 << 10) /* override SS_n output */
61 typedef struct epcs_devinfo_t
{
62 const char *name
; /* Device name */
63 u_char id
; /* Device silicon id */
64 u_char size
; /* Total size log2(bytes)*/
65 u_char num_sects
; /* Number of sectors */
66 u_char sz_sect
; /* Sector size log2(bytes) */
67 u_char sz_page
; /* Page size log2(bytes) */
68 u_char prot_mask
; /* Protection mask */
72 u_char
epcs_dev_find (void);
73 int epcs_reset (void);
74 int epcs_buf_read (u_char
*dst
, u_int off
, u_int cnt
);
75 int epcs_buf_write (const u_char
*addr
, u_int off
, u_int cnt
);
76 u_int
epcs_buf_erase (u_int off
, u_int len
, u_int sz
);
77 void epcs_print_regs(void);
79 #endif /* __ALTERA_AVALON_SPI_REGS_H__ */