arch/arm/mach-s3c3410/irq.c

   1 /*
   2  *  linux/arch/arm/mach-s5c7375/irq.c
   3  *
   4  *  Copyright (C) 2003 SAMSUNG ELECTRONICS
   5  *            Hyok S. Choi (hyok.choi@samsung.com)
   6  * based the codes by
   7  *     2003 Thomas Eschenbacher <thomas.eschenbacher@gmx.de>
   8  *
   9  */
  10 #include <linux/types.h>
  11 #include <linux/sched.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/types.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/list.h>
  17 #include <linux/device.h>
  18 #include <linux/slab.h>
  19 #include <linux/string.h>
  20 #include <linux/sysdev.h>
  21
  22 #include <asm/hardware.h>
  23 #include <asm/io.h>
  24 #include <asm/irq.h>
  25 #include <asm/setup.h>
  26 #include <asm/mach-types.h>
  27
  28 #include <asm/mach/arch.h>
  29 #include <asm/mach/irq.h>
  30 #include <asm/mach/map.h>
  31
  32 void __inline__ s3c3410_mask_irq(unsigned int irq)
  33 {
  34         outl( inl(S3C3410X_INTMSK) & ~( 1 << irq ), S3C3410X_INTMSK);
  35 }
  36
  37 void __inline__ s3c3410_unmask_irq(unsigned int irq)
  38 {
  39         outl( inl(S3C3410X_INTMSK) | ( 1 << irq ), S3C3410X_INTMSK);
  40 }
  41
  42 void __inline__ s3c3410_mask_ack_irq(unsigned int irq)
  43 {
  44         s3c3410_mask_irq(irq);
  45 }
  46
  47 /* Clear pending bit */
  48 void __inline__ s3c3410_clear_pb(unsigned int irq)
  49 {
  50      outl( ~(1 << irq), S3C3410X_INTPND);}
  51
  52
  53 /* YOU CAN CHANGE THIS ROUTINE FOR SPEED UP */
  54 __inline__ unsigned int fixup_irq (int irq )
  55 {
  56         s3c3410_clear_pb(irq);
  57         return(irq);
  58 }
  59
  60 static struct irqchip s3c3410_chip = {
  61         .ack    = s3c3410_clear_pb,
  62         .mask   = s3c3410_mask_irq,
  63         .unmask = s3c3410_unmask_irq,
  64 };
  65
  66 #ifdef CONFIG_PM
  67 static unsigned long ic_irq_enable;
  68
  69 static int irq_suspend(struct sys_device *dev, u32 state)
  70 {
  71         return 0;
  72 }
  73
  74 static int irq_resume(struct sys_device *dev)
  75 {
  76         /* disable all irq sources */
  77         return 0;
  78 }
  79 #else
  80 #define irq_suspend NULL
  81 #define irq_resume NULL
  82 #endif
  83
  84 static struct sysdev_class irq_class = {
  85         set_kset_name("irq"),
  86         .suspend        = irq_suspend,
  87         .resume         = irq_resume,
  88 };
  89
  90 static struct sys_device irq_device = {
  91         .id     = 0,
  92         .cls    = &irq_class,
  93 };
  94
  95 static int __init irq_init_sysfs(void)
  96 {
  97         int ret = sysdev_class_register(&irq_class);
  98         if (ret == 0)
  99                 ret = sysdev_register(&irq_device);
 100         return ret;
 101 }
 102
 103 device_initcall(irq_init_sysfs);
 104
 105 void __init s3c3410_init_irq(void)
 106 {
 107         int irq;
 108
 109         for (irq = 0; irq < NR_IRQS; irq++) {
 110                 set_irq_chip(irq, &s3c3410_chip);
 111                 set_irq_handler(irq, do_level_IRQ);
 112                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 113         }
 114
 115         /* mask and disable all further interrupts */
 116         outl(0x00000000, S3C3410X_INTMSK);
 117
 118         /* set all to IRQ mode, not FIQ */
 119         outl(0x00000000, S3C3410X_INTMOD);
 120
 121         /* Clear Intrerrupt pending register    */
 122         outl(0x00000000, S3C3410X_INTPND);
 123
 124         /*
 125          * enable the gloabal interrupt flag, this should be
 126          * safe now, all sources are masked out and acknowledged
 127          */
 128         outb(inb(S3C3410X_SYSCON) | S3C3410X_SYSCON_GIE, S3C3410X_SYSCON);
 129 }
 130