include/asm-m68knommu/mcfqspi.h

   1 #if !defined(MCFQSPI_H)
   2 #define MCFQSPI_H
   3
   4 #include <linux/types.h>
   5
   6
   7 #define QSPIIOCS_DOUT_HIZ       1       /* QMR[DOHIE] set hi-z dout between transfers */
   8 #define QSPIIOCS_BITS           2       /* QMR[BITS] set transfer size */
   9 #define QSPIIOCG_BITS           3       /* QMR[BITS] get transfer size */
  10 #define QSPIIOCS_CPOL           4       /* QMR[CPOL] set SCK inactive state */
  11 #define QSPIIOCS_CPHA           5       /* QMR[CPHA] set SCK phase, 1=rising edge */
  12 #define QSPIIOCS_BAUD           6       /* QMR[BAUD] set SCK baud rate divider */
  13 #define QSPIIOCS_QCD            7       /* QDLYR[QCD] set start delay */
  14 #define QSPIIOCS_DTL            8       /* QDLYR[DTL] set after delay */
  15 #define QSPIIOCS_CONT           9       /* continuous CS asserted during transfer */
  16 #define QSPIIOCS_READDATA       10      /* set data send during read */
  17 #define QSPIIOCS_ODD_MOD        11      /* if length of buffer is a odd number, 16-bit transfers */
  18                                         /* are finalized with a 8-bit transfer */
  19 #define QSPIIOCS_DSP_MOD        12      /* transfers are bounded to 15/30 bytes (a multiple of 3 bytes = 1 DSP word) */
  20 #define QSPIIOCS_POLL_MOD       13      /* driver uses polling instead of interrupts */
  21
  22
  23 typedef struct qspi_read_data {
  24         __u32 length;
  25         __u8 *buf;                   /* data to send during read */
  26         unsigned int loop : 1;
  27 } qspi_read_data;
  28
  29
  30 #endif  /* MCFQSPI_H */