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[linux-2.6.19-moxart.git] / include / asm-arm / arch-s3c24a0 / ide.h
blob0de43cca0a4448482828b53e7851c10ff5d34360
1 /*
2 * include/asm-arm/arch-s3c24a0/ide.h
5 * Originally based upon linux/include/asm-arm/arch-sa1100/ide.h
7 * Changes
9 * 2004/06/10 <heechul.yun@samsung.com> SPJ CPLD IDE support
10 * 2004/06/13 <heechul.yun@samsung.com> CPLD IDE and USB csupport for SPJ
14 #include <asm/irq.h>
15 #include <asm/hardware.h>
16 #include <asm/mach-types.h>
19 #ifndef MAX_HWIFS
20 #define MAX_HWIFS 1
21 #else
22 #undef MAX_HWIFS
23 #define MAX_HWIFS 1
24 #endif
26 #define CPLD_IDE_DEBUG // hcyun
29 * Set up a hw structure for a specified data port, control port and IRQ.
30 * This should follow whatever the default interface uses.
32 static __inline__ void
33 ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
35 ide_ioreg_t reg;
37 memset(hw, 0, sizeof(*hw));
39 reg = (ide_ioreg_t)data_port;
41 /* increasing 8 */
42 hw->io_ports[IDE_DATA_OFFSET] = reg + 0;
43 hw->io_ports[IDE_ERROR_OFFSET] = reg + (1 << 3);
44 hw->io_ports[IDE_NSECTOR_OFFSET] = reg + (2 << 3);
45 hw->io_ports[IDE_SECTOR_OFFSET] = reg + (3 << 3);
46 hw->io_ports[IDE_LCYL_OFFSET] = reg + (4 << 3);
47 hw->io_ports[IDE_HCYL_OFFSET] = reg + (5 << 3);
48 hw->io_ports[IDE_SELECT_OFFSET] = reg + (6 << 3);
49 hw->io_ports[IDE_STATUS_OFFSET] = reg + (7 << 3);
51 hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
53 if (irq)
54 *irq = 0;
59 * CPLD IDE reset. to reset first assert 0 and then assert 1
62 static __inline__ void ide_set_reset(int on)
64 volatile unsigned char *usb_reset = (unsigned char *)(SMDK_CPLD_USB_VIO+0x00800000);
65 volatile unsigned char *ide_reset = (unsigned char *)(SMDK_CPLD_IDE_VIO+0x00800000);
67 if ( on ) {
68 /* turn CPLD to IDE mode */
69 *ide_reset = 0x02;
71 /* turn on IDE */
72 *ide_reset = 0x03;
74 } else {
75 /* turn off IDE */
76 *ide_reset = 0x02;
78 *ide_reset = 0x02;
82 *ide_reset = 0x1;
83 *usb_reset = 0x0;
84 *usb_reset = 0x1;
91 * Register the standard ports for this architecture with the IDE driver.
93 static __inline__ void
94 ide_init_default_hwifs(void)
97 A7 A6 A5 A4 A3 <-- CPLD address line used
99 CE2 CE1 A2 A1 A0 IORD IOWR
100 ---------------------------------
101 1 0 0 0 0 data port
105 0 1 1 1 0 control port
107 data port = SMDK_CPLD_IDE_VIO + 0x80
108 control port = SMDK_CPLD_IDE_VIO + 0x70
112 /* Nothing to declare... */
114 int ret;
116 hw_regs_t hw;
118 ide_init_hwif_ports(&hw, SMDK_CPLD_IDE_VIO + 0x80, SMDK_CPLD_IDE_VIO + 0x70, NULL);
120 hw.irq = SMDK_CPLD_IDE_IRQ;
122 ide_register_hw(&hw, NULL);
125 #ifdef CPLD_IDE_DEBUG
126 printk("SMDK24A0 : IDE initialize - hcyun \n");
127 printk("!!FIXME!! IDE and cs8900 are controlled by SROM bank1 and need different timing and bus width\n");
128 #endif
130 bank1_set_state(B1_IDE_PIO4);
132 // ide reset
133 ide_set_reset(0);
135 mdelay(250);
137 ide_set_reset(1);
139 mdelay(500); // wait 250ms see ATA spec
141 printk("riging edge interrupt\n");
142 ret = set_external_irq(SMDK_CPLD_IDE_IRQ, EINT_RISING_EDGE, EINT_PULLUP_EN);
144 if (ret)
145 printk("ERROR: irq set failed\n");