2 * linux/arch/armnommu/mach-p2001/entry-macro.S
4 * Copyright (C) 2004 Tobias Lorenz
6 * defines machine dependent entry macros.
7 * included in the arch/armnommu/kernel/entry.S
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <asm/arch/irqs.h>
26 #define Adr_INT_CTRL_BASE 0x00130000
27 #define REL_Adr_Main_NFIQ_Int_Ctrl 0x00
28 #define REL_Adr_Main_NIRQ_Int_Ctrl 0x04
29 #define REL_Adr_Status_NFIQ 0x08
30 #define REL_Adr_Status_NIRQ 0x0c
32 #define NR_IRQS 27 /* 27 Interrupts: INT 0..26 */
41 * get the irq number(at least), and others.
42 * irqnr : The number of the IRQ that you want to raise.
44 * base : The comments suggest this is a prioritization mechanism, but it doesn't appear
45 * to be actually used anywhere. That's why many of the irq_prio_table macros are empty.
46 * flags : This is non-obvious, but you'll notice that every get_irqnr_and_base macro
47 * does a test at the end of the macro. If you don't have a flag (I think it's the Z) set,
48 * then you'll never call do_IRQ. It's basically a check to avoid calling do_IRQ if you had
49 * a spurious interrupt (or one that was masked).
51 /* irqnr=r0 irqstat=r6 base=r5 tmp=lr */
52 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
53 mov \irqstat, #Adr_INT_CTRL_BASE
54 ldr \irqstat, [\irqstat, #REL_Adr_Status_NIRQ]
56 mov \irqnr, #IRQ_EU0_DATA
57 tst \irqstat, #(1<<IRQ_EU0_DATA)
60 mov \irqnr, #IRQ_EU1_DATA
61 tst \irqstat, #(1<<IRQ_EU1_DATA)
64 mov \irqnr, #IRQ_TIMER1
65 tst \irqstat, #(1<<IRQ_TIMER1)
68 mov \irqnr, #IRQ_EU0_ERROR
69 tst \irqstat, #(1<<IRQ_EU0_ERROR)
72 mov \irqnr, #IRQ_EU1_ERROR
73 tst \irqstat, #(1<<IRQ_EU1_ERROR)
77 tst \irqstat, #(1<<IRQ_UART)
81 tst \irqstat, #(1<<IRQ_USB)
85 tst \irqstat, #(1<<IRQ_PWM)
89 tst \irqstat, #(1<<IRQ_FSC)
93 tst \irqstat, #(1<<IRQ_GPIO)
97 tst \irqstat, #(1<<IRQ_PFS0)
100 mov \irqnr, #IRQ_PFS1
101 tst \irqstat, #(1<<IRQ_PFS1)
104 mov \irqnr, #IRQ_PFS2
105 tst \irqstat, #(1<<IRQ_PFS2)
108 mov \irqnr, #IRQ_PFS3
109 tst \irqstat, #(1<<IRQ_PFS3)
113 tst \irqstat, #(1<<IRQ_SO0)
117 tst \irqstat, #(1<<IRQ_SO1)
120 mov \irqnr, #IRQ_DTMF
121 tst \irqstat, #(1<<IRQ_DTMF)
124 mov \irqnr, #IRQ_WATCHDOG
125 tst \irqstat, #(1<<IRQ_WATCHDOG)
128 mov \irqnr, #IRQ_PCMHW
129 tst \irqstat, #(1<<IRQ_PCMHW)
132 mov \irqnr, #IRQ_HDLC_MTS
133 tst \irqstat, #(1<<IRQ_HDLC_MTS)
136 mov \irqnr, #IRQ_HDLC_ERROR
137 tst \irqstat, #(1<<IRQ_HDLC_ERROR)
140 mov \irqnr, #IRQ_HDLC_DATA
141 tst \irqstat, #(1<<IRQ_HDLC_DATA)
144 mov \irqnr, #IRQ_EU2_DATA
145 tst \irqstat, #(1<<IRQ_EU2_DATA)
148 mov \irqnr, #IRQ_EU2_ERROR
149 tst \irqstat, #(1<<IRQ_EU2_ERROR)
152 mov \irqnr, #IRQ_EU3_DATA
153 tst \irqstat, #(1<<IRQ_EU3_DATA)
156 mov \irqnr, #IRQ_EU3_ERROR
157 tst \irqstat, #(1<<IRQ_EU3_ERROR)
160 mov \irqnr, #IRQ_TIMER2
161 tst \irqstat, #(1<<IRQ_TIMER2)
166 /* irq priority table */
167 .macro irq_prio_table