MOXA linux-2.6.x / linux-2.6.19-uc1 from UC-7110-LX-BOOTLOADER-1.9_VERSION-4.2.tgz
[linux-2.6.19-moxart.git] / include / asm-arm / arch-moxart / uncompress.h
blob9d238dab736808019c31e7e8110c9c427f803952
1 #include <asm/arch/moxa.h>
3 static void delayputs(void)
5 volatile unsigned int i=100;
6 while(i--)
9 /*
10 * If we need to do some setup prior to decompression (like initializing the
11 * UART if we want to use puts() above) then we define it here. Punt.
14 #define SERIAL_THR 0x00 /* Transmitter Holding Register(Write).*/
15 #define SERIAL_RBR 0x00 /* Receive Buffer register (Read).*/
16 #define SERIAL_IER 0x04 /* Interrupt Enable register.*/
17 #define SERIAL_IIR 0x08 /* Interrupt Identification register(Read).*/
18 #define SERIAL_FCR 0x08 /* FIFO control register(Write).*/
19 #define SERIAL_EFR 0x08 // ?????????????????????
20 #define SERIAL_LCR 0x0C /* Line Control register.*/
21 #define SERIAL_MCR 0x10 /* Modem Control Register.*/
22 #define SERIAL_LSR 0x14 /* Line status register(Read) .*/
23 #define SERIAL_MSR 0x18 /* Modem Status register (Read).*/
24 #define SERIAL_SPR 0x1C /* Scratch pad register */
25 #define SERIAL_DLL 0x0 /* Divisor Register LSB */
26 #define SERIAL_DLM 0x4 /* Divisor Register MSB */
27 #define SERIAL_PSR 0x8 /* Prescale Divison Factor */
30 /* LSR Register */
31 #define SERIAL_LSR_DR 0x1 /* Data Ready */
32 #define SERIAL_LSR_OE 0x2 /* Overrun Error */
33 #define SERIAL_LSR_PE 0x4 /* Parity Error */
34 #define SERIAL_LSR_FE 0x8 /* Framing Error */
35 #define SERIAL_LSR_BI 0x10 /* Break Interrupt */
36 #define SERIAL_LSR_THRE 0x20 /* THR Empty */
37 #define SERIAL_LSR_TE 0x40 /* Transmitte Empty */
38 #define SERIAL_LSR_DE 0x80 /* FIFO Data Error */
41 #define PUTS_UART_BASE CPE_UART1_BASE
43 #if 0 // mask by Victor Yu. 05-19-2005
44 static void puts(const char *s)
45 #else // add by Victor Yu. 05-19-2005
46 static void putstr(const char *s)
47 #endif
49 while (*s)
51 volatile unsigned int status=0;
54 status = *(unsigned char *)(PUTS_UART_BASE+SERIAL_LSR);
56 while (!((status & SERIAL_LSR_THRE)==SERIAL_LSR_THRE) );
58 *(unsigned char *)(PUTS_UART_BASE+SERIAL_THR) = *s;
60 if (*s == '\n')
65 status = *(unsigned char *)(PUTS_UART_BASE+SERIAL_LSR);
67 while (!((status & SERIAL_LSR_THRE)==SERIAL_LSR_THRE) );
69 *(unsigned char *)(PUTS_UART_BASE+SERIAL_THR) = '\r';
71 s++;
75 #define arch_decomp_setup()
76 #define arch_decomp_wdog()