include/asm-arm/arch-espd_4510b/uncompress.c

   1 /*
   2  * linux/include/asm/arch-samsung/uncompress.c
   3  * 2001 Mac Wang <mac@os.nctu.edu.tw>
   4  *
   5  * linux-2.6.7/include/asm-armnommu/arch-espd_4510b/uncompress.c
   6  * 2004 JS H. <asky@syncom.com.tw
   7  */
   8
   9 #include "hardware.h"
  10
  11 #define VPint   *(volatile unsigned int *)
  12
  13 #ifndef CSR_WRITE
  14 #   define CSR_WRITE(addr,data) (VPint(addr) = (data))
  15 #endif
  16
  17 #ifndef CSR_READ
  18 #   define CSR_READ(addr)       (VPint(addr))
  19 #endif
  20
  21 /** Console UART Port */
  22 #define DEBUG_CONSOLE   (0)
  23
  24 #if (DEBUG_CONSOLE == 0)
  25         #define DEBUG_TX_BUFF_BASE      REG_UART0_TXB
  26         #define DEBUG_RX_BUFF_BASE      REG_UART0_RXB
  27         #define DEBUG_UARTLCON_BASE     REG_UART0_LCON
  28         #define DEBUG_UARTCONT_BASE     REG_UART0_CTRL
  29         #define DEBUG_UARTBRD_BASE      REG_UART0_BAUD_DIV
  30         #define DEBUG_CHK_STAT_BASE     REG_UART0_STAT
  31 #else /* DEBUG_CONSOLE == 1 */
  32         #define DEBUG_TX_BUFF_BASE      REG_UART1_TXB
  33         #define DEBUG_RX_BUFF_BASE      REG_UART1_RXB
  34         #define DEBUG_UARTLCON_BASE     REG_UART1_LCON
  35         #define DEBUG_UARTCONT_BASE     REG_UART1_CTRL
  36         #define DEBUG_UARTBRD_BASE      REG_UART1_BAUD_DIV
  37         #define DEBUG_CHK_STAT_BASE     REG_UART1_STAT
  38 #endif
  39
  40 #define DEBUG_ULCON_REG_VAL     (0x3)
  41 #define DEBUG_UCON_REG_VAL      (0x9)
  42 #define DEBUG_UBRDIV_REG_VAL    (0x500)
  43 #define DEBUG_RX_CHECK_BIT      (0X20)
  44 #define DEBUG_TX_CAN_CHECK_BIT  (0X40)
  45 #define DEBUG_TX_DONE_CHECK_BIT (0X80)
  46
  47 /** Setup console UART as 19200 bps */
  48 static void s3c4510b_decomp_setup(void)
  49 {
  50         CSR_WRITE(DEBUG_UARTLCON_BASE, DEBUG_ULCON_REG_VAL);
  51         CSR_WRITE(DEBUG_UARTCONT_BASE, DEBUG_UCON_REG_VAL);
  52         CSR_WRITE(DEBUG_UARTBRD_BASE,  DEBUG_UBRDIV_REG_VAL);
  53 }
  54
  55 static void s3c4510b_putc(char c)
  56 {
  57         CSR_WRITE(DEBUG_TX_BUFF_BASE, c);
  58         while(!(CSR_READ(DEBUG_CHK_STAT_BASE) & DEBUG_TX_DONE_CHECK_BIT));
  59
  60         if(c == '\n')
  61                 s3c4510b_putc('\r');
  62 }
  63
  64 static void s3c4510b_puts(const char *s)
  65 {
  66         while(*s != '\0')
  67                 s3c4510b_putc(*s++);
  68 }
  69