2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
23 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
27 #include <linux/module.h>
28 #include <linux/moduleparam.h>
29 #include <linux/ioport.h>
30 #include <linux/init.h>
31 #include <linux/console.h>
32 #include <linux/sysrq.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/tty.h>
36 #include <linux/tty_flip.h>
37 #include <linux/serial_reg.h>
38 #include <linux/serial_core.h>
39 #include <linux/serial.h>
40 #include <linux/serial_8250.h>
41 #include <linux/nmi.h>
42 #include <linux/mutex.h>
43 #include <linux/irq.h>
45 #include <linux/ledman.h>
48 #ifdef CONFIG_ARCH_MOXART // add by Victor Yu. 02-08-2007
49 #include <asm/arch/moxa.h>
50 #include <asm/arch/cpe_int.h>
60 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
61 * is unsafe when used on edge-triggered interrupts.
63 static unsigned int share_irqs
= SERIAL8250_SHARE_IRQS
;
65 static unsigned int nr_uarts
= CONFIG_SERIAL_8250_RUNTIME_UARTS
;
71 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
73 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
77 #define DEBUG_INTR(fmt...) printk(fmt)
79 #define DEBUG_INTR(fmt...) do { } while (0)
82 #define PASS_LIMIT 256
85 * We default to IRQ0 for the "no irq" hack. Some
86 * machine types want others as well - they're free
87 * to redefine this in their header file.
89 #define is_real_interrupt(irq) ((irq) != 0)
91 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
92 #define CONFIG_SERIAL_DETECT_IRQ 1
94 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
95 #define CONFIG_SERIAL_MANY_PORTS 1
99 * HUB6 is always on. This will be removed once the header
100 * files have been cleaned.
102 #define CONFIG_HUB6 1
104 #if defined(CONFIG_ARCH_SE4000) || defined(CONFIG_MACH_MONTEJADE) || \
105 defined(CONFIG_MACH_SG560) || defined(CONFIG_MACH_SG565) || \
106 defined(CONFIG_MACH_SG580) || defined(CONFIG_MACH_SG720) || \
107 defined(CONFIG_MACH_ESS710) || defined(CONFIG_MACH_SG8100) || \
108 defined(CONFIG_MACH_SG590)
110 * The XSCALE/IXP425 does not wire out the DCD and DTR lines.
111 * We implement them using GPIO lines on the SnapGear boards.
113 #define CONFIG_IXP4XX_DTR0 0
114 #define CONFIG_IXP4XX_DCD0 1
115 #define CONFIG_IXP4XX_DCD0IRQ IRQ_IXP4XX_GPIO1
118 #include <asm/serial.h>
121 * SERIAL_PORT_DFNS tells us about built-in ports that have no
122 * standard enumeration mechanism. Platforms that can find all
123 * serial ports via mechanisms like ACPI or PCI need not supply it.
125 #ifndef SERIAL_PORT_DFNS
126 #define SERIAL_PORT_DFNS
129 static const struct old_serial_port old_serial_port
[] = {
130 SERIAL_PORT_DFNS
/* defined in asm/serial.h */
133 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
135 #ifdef CONFIG_SERIAL_8250_RSA
137 #define PORT_RSA_MAX 4
138 static unsigned long probe_rsa
[PORT_RSA_MAX
];
139 static unsigned int probe_rsa_count
;
140 #endif /* CONFIG_SERIAL_8250_RSA */
142 struct uart_8250_port
{
143 struct uart_port port
;
144 struct timer_list timer
; /* "no irq" timer */
145 struct list_head list
; /* ports on this IRQ */
146 unsigned short capabilities
; /* port capabilities */
147 unsigned short bugs
; /* port bugs */
148 unsigned int tx_loadsz
; /* transmit fifo load size */
153 unsigned char mcr_mask
; /* mask of user bits */
154 unsigned char mcr_force
; /* mask of forced bits */
155 unsigned char lsr_break_flag
;
158 * We provide a per-port pm hook.
160 void (*pm
)(struct uart_port
*port
,
161 unsigned int state
, unsigned int old
);
166 struct list_head
*head
;
169 static struct irq_info irq_lists
[NR_IRQS
];
172 * Here we define the default xmit fifo size used for each type of UART.
174 static const struct serial8250_config uart_config
[] = {
199 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
200 .flags
= UART_CAP_FIFO
,
211 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
217 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
219 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
225 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
|
227 .flags
= UART_CAP_FIFO
| UART_CAP_SLEEP
| UART_CAP_AFE
,
235 .name
= "16C950/954",
238 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
239 .flags
= UART_CAP_FIFO
,
245 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
247 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
253 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
254 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
260 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_11
,
261 .flags
= UART_CAP_FIFO
,
267 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
268 .flags
= UART_CAP_FIFO
| UART_NATSEMI
,
274 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
275 .flags
= UART_CAP_FIFO
| UART_CAP_UUE
,
279 #ifdef CONFIG_SERIAL_8250_AU1X00
281 /* Au1x00 UART hardware has a weird register layout */
282 static const u8 au_io_in_map
[] = {
292 static const u8 au_io_out_map
[] = {
300 /* sane hardware needs no mapping */
301 static inline int map_8250_in_reg(struct uart_8250_port
*up
, int offset
)
303 if (up
->port
.iotype
!= UPIO_AU
)
305 return au_io_in_map
[offset
];
308 static inline int map_8250_out_reg(struct uart_8250_port
*up
, int offset
)
310 if (up
->port
.iotype
!= UPIO_AU
)
312 return au_io_out_map
[offset
];
317 /* sane hardware needs no mapping */
318 #define map_8250_in_reg(up, offset) (offset)
319 #define map_8250_out_reg(up, offset) (offset)
323 static unsigned int serial_in(struct uart_8250_port
*up
, int offset
)
326 offset
= map_8250_in_reg(up
, offset
) << up
->port
.regshift
;
328 switch (up
->port
.iotype
) {
330 outb(up
->port
.hub6
- 1 + offset
, up
->port
.iobase
);
331 return inb(up
->port
.iobase
+ 1);
334 return readb(up
->port
.membase
+ offset
);
337 return readl(up
->port
.membase
+ offset
);
339 #ifdef CONFIG_SERIAL_8250_AU1X00
341 return __raw_readl(up
->port
.membase
+ offset
);
345 if (offset
== UART_IIR
) {
346 tmp
= readl(up
->port
.membase
+ (UART_IIR
& ~3));
347 return (tmp
>> 16) & 0xff; /* UART_IIR % 4 == 2 */
349 return readb(up
->port
.membase
+ offset
);
352 return inb(up
->port
.iobase
+ offset
);
357 serial_out(struct uart_8250_port
*up
, int offset
, int value
)
359 offset
= map_8250_out_reg(up
, offset
) << up
->port
.regshift
;
361 switch (up
->port
.iotype
) {
363 outb(up
->port
.hub6
- 1 + offset
, up
->port
.iobase
);
364 outb(value
, up
->port
.iobase
+ 1);
368 writeb(value
, up
->port
.membase
+ offset
);
372 writel(value
, up
->port
.membase
+ offset
);
375 #ifdef CONFIG_SERIAL_8250_AU1X00
377 __raw_writel(value
, up
->port
.membase
+ offset
);
381 if (!((offset
== UART_IER
) && (value
& UART_IER_UUE
)))
382 writeb(value
, up
->port
.membase
+ offset
);
386 outb(value
, up
->port
.iobase
+ offset
);
391 * We used to support using pause I/O for certain machines. We
392 * haven't supported this for a while, but just in case it's badly
393 * needed for certain old 386 machines, I've left these #define's
396 #define serial_inp(up, offset) serial_in(up, offset)
397 #define serial_outp(up, offset, value) serial_out(up, offset, value)
399 /* Uart divisor latch read */
400 static inline int _serial_dl_read(struct uart_8250_port
*up
)
402 return serial_inp(up
, UART_DLL
) | serial_inp(up
, UART_DLM
) << 8;
405 /* Uart divisor latch write */
406 static inline void _serial_dl_write(struct uart_8250_port
*up
, int value
)
408 serial_outp(up
, UART_DLL
, value
& 0xff);
409 serial_outp(up
, UART_DLM
, value
>> 8 & 0xff);
412 #ifdef CONFIG_SERIAL_8250_AU1X00
413 /* Au1x00 haven't got a standard divisor latch */
414 static int serial_dl_read(struct uart_8250_port
*up
)
416 if (up
->port
.iotype
== UPIO_AU
)
417 return __raw_readl(up
->port
.membase
+ 0x28);
419 return _serial_dl_read(up
);
422 static void serial_dl_write(struct uart_8250_port
*up
, int value
)
424 if (up
->port
.iotype
== UPIO_AU
)
425 __raw_writel(value
, up
->port
.membase
+ 0x28);
427 _serial_dl_write(up
, value
);
430 #define serial_dl_read(up) _serial_dl_read(up)
431 #define serial_dl_write(up, value) _serial_dl_write(up, value)
437 static void serial_icr_write(struct uart_8250_port
*up
, int offset
, int value
)
439 serial_out(up
, UART_SCR
, offset
);
440 serial_out(up
, UART_ICR
, value
);
443 static unsigned int serial_icr_read(struct uart_8250_port
*up
, int offset
)
447 serial_icr_write(up
, UART_ACR
, up
->acr
| UART_ACR_ICRRD
);
448 serial_out(up
, UART_SCR
, offset
);
449 value
= serial_in(up
, UART_ICR
);
450 serial_icr_write(up
, UART_ACR
, up
->acr
);
458 static inline void serial8250_clear_fifos(struct uart_8250_port
*p
)
460 if (p
->capabilities
& UART_CAP_FIFO
) {
461 serial_outp(p
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
462 serial_outp(p
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
463 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
464 serial_outp(p
, UART_FCR
, 0);
469 * IER sleep support. UARTs which have EFRs need the "extended
470 * capability" bit enabled. Note that on XR16C850s, we need to
471 * reset LCR to write to IER.
473 static inline void serial8250_set_sleep(struct uart_8250_port
*p
, int sleep
)
475 if (p
->capabilities
& UART_CAP_SLEEP
) {
476 if (p
->capabilities
& UART_CAP_EFR
) {
477 serial_outp(p
, UART_LCR
, 0xBF);
478 serial_outp(p
, UART_EFR
, UART_EFR_ECB
);
479 serial_outp(p
, UART_LCR
, 0);
481 serial_outp(p
, UART_IER
, sleep
? UART_IERX_SLEEP
: 0);
482 if (p
->capabilities
& UART_CAP_EFR
) {
483 serial_outp(p
, UART_LCR
, 0xBF);
484 serial_outp(p
, UART_EFR
, 0);
485 serial_outp(p
, UART_LCR
, 0);
490 #ifdef CONFIG_SERIAL_8250_RSA
492 * Attempts to turn on the RSA FIFO. Returns zero on failure.
493 * We set the port uart clock rate if we succeed.
495 static int __enable_rsa(struct uart_8250_port
*up
)
500 mode
= serial_inp(up
, UART_RSA_MSR
);
501 result
= mode
& UART_RSA_MSR_FIFO
;
504 serial_outp(up
, UART_RSA_MSR
, mode
| UART_RSA_MSR_FIFO
);
505 mode
= serial_inp(up
, UART_RSA_MSR
);
506 result
= mode
& UART_RSA_MSR_FIFO
;
510 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE
* 16;
515 static void enable_rsa(struct uart_8250_port
*up
)
517 if (up
->port
.type
== PORT_RSA
) {
518 if (up
->port
.uartclk
!= SERIAL_RSA_BAUD_BASE
* 16) {
519 spin_lock_irq(&up
->port
.lock
);
521 spin_unlock_irq(&up
->port
.lock
);
523 if (up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16)
524 serial_outp(up
, UART_RSA_FRR
, 0);
529 * Attempts to turn off the RSA FIFO. Returns zero on failure.
530 * It is unknown why interrupts were disabled in here. However,
531 * the caller is expected to preserve this behaviour by grabbing
532 * the spinlock before calling this function.
534 static void disable_rsa(struct uart_8250_port
*up
)
539 if (up
->port
.type
== PORT_RSA
&&
540 up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16) {
541 spin_lock_irq(&up
->port
.lock
);
543 mode
= serial_inp(up
, UART_RSA_MSR
);
544 result
= !(mode
& UART_RSA_MSR_FIFO
);
547 serial_outp(up
, UART_RSA_MSR
, mode
& ~UART_RSA_MSR_FIFO
);
548 mode
= serial_inp(up
, UART_RSA_MSR
);
549 result
= !(mode
& UART_RSA_MSR_FIFO
);
553 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE_LO
* 16;
554 spin_unlock_irq(&up
->port
.lock
);
557 #endif /* CONFIG_SERIAL_8250_RSA */
560 * This is a quickie test to see how big the FIFO is.
561 * It doesn't work at all the time, more's the pity.
563 static int size_fifo(struct uart_8250_port
*up
)
565 unsigned char old_fcr
, old_mcr
, old_lcr
;
566 unsigned short old_dl
;
569 old_lcr
= serial_inp(up
, UART_LCR
);
570 serial_outp(up
, UART_LCR
, 0);
571 old_fcr
= serial_inp(up
, UART_FCR
);
572 old_mcr
= serial_inp(up
, UART_MCR
);
573 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
574 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
575 serial_outp(up
, UART_MCR
, UART_MCR_LOOP
);
576 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
577 old_dl
= serial_dl_read(up
);
578 serial_dl_write(up
, 0x0001);
579 serial_outp(up
, UART_LCR
, 0x03);
580 for (count
= 0; count
< 256; count
++)
581 serial_outp(up
, UART_TX
, count
);
582 mdelay(20);/* FIXME - schedule_timeout */
583 for (count
= 0; (serial_inp(up
, UART_LSR
) & UART_LSR_DR
) &&
584 (count
< 256); count
++)
585 serial_inp(up
, UART_RX
);
586 serial_outp(up
, UART_FCR
, old_fcr
);
587 serial_outp(up
, UART_MCR
, old_mcr
);
588 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
589 serial_dl_write(up
, old_dl
);
590 serial_outp(up
, UART_LCR
, old_lcr
);
596 * Read UART ID using the divisor method - set DLL and DLM to zero
597 * and the revision will be in DLL and device type in DLM. We
598 * preserve the device state across this.
600 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port
*p
)
602 unsigned char old_dll
, old_dlm
, old_lcr
;
605 old_lcr
= serial_inp(p
, UART_LCR
);
606 serial_outp(p
, UART_LCR
, UART_LCR_DLAB
);
608 old_dll
= serial_inp(p
, UART_DLL
);
609 old_dlm
= serial_inp(p
, UART_DLM
);
611 serial_outp(p
, UART_DLL
, 0);
612 serial_outp(p
, UART_DLM
, 0);
614 id
= serial_inp(p
, UART_DLL
) | serial_inp(p
, UART_DLM
) << 8;
616 serial_outp(p
, UART_DLL
, old_dll
);
617 serial_outp(p
, UART_DLM
, old_dlm
);
618 serial_outp(p
, UART_LCR
, old_lcr
);
624 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
625 * When this function is called we know it is at least a StarTech
626 * 16650 V2, but it might be one of several StarTech UARTs, or one of
627 * its clones. (We treat the broken original StarTech 16650 V1 as a
628 * 16550, and why not? Startech doesn't seem to even acknowledge its
631 * What evil have men's minds wrought...
633 static void autoconfig_has_efr(struct uart_8250_port
*up
)
635 unsigned int id1
, id2
, id3
, rev
;
638 * Everything with an EFR has SLEEP
640 up
->capabilities
|= UART_CAP_EFR
| UART_CAP_SLEEP
;
643 * First we check to see if it's an Oxford Semiconductor UART.
645 * If we have to do this here because some non-National
646 * Semiconductor clone chips lock up if you try writing to the
647 * LSR register (which serial_icr_read does)
651 * Check for Oxford Semiconductor 16C950.
653 * EFR [4] must be set else this test fails.
655 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
656 * claims that it's needed for 952 dual UART's (which are not
657 * recommended for new designs).
660 serial_out(up
, UART_LCR
, 0xBF);
661 serial_out(up
, UART_EFR
, UART_EFR_ECB
);
662 serial_out(up
, UART_LCR
, 0x00);
663 id1
= serial_icr_read(up
, UART_ID1
);
664 id2
= serial_icr_read(up
, UART_ID2
);
665 id3
= serial_icr_read(up
, UART_ID3
);
666 rev
= serial_icr_read(up
, UART_REV
);
668 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1
, id2
, id3
, rev
);
670 if (id1
== 0x16 && id2
== 0xC9 &&
671 (id3
== 0x50 || id3
== 0x52 || id3
== 0x54)) {
672 up
->port
.type
= PORT_16C950
;
675 * Enable work around for the Oxford Semiconductor 952 rev B
676 * chip which causes it to seriously miscalculate baud rates
679 if (id3
== 0x52 && rev
== 0x01)
680 up
->bugs
|= UART_BUG_QUOT
;
685 * We check for a XR16C850 by setting DLL and DLM to 0, and then
686 * reading back DLL and DLM. The chip type depends on the DLM
688 * 0x10 - XR16C850 and the DLL contains the chip revision.
692 id1
= autoconfig_read_divisor_id(up
);
693 DEBUG_AUTOCONF("850id=%04x ", id1
);
696 if (id2
== 0x10 || id2
== 0x12 || id2
== 0x14) {
697 up
->port
.type
= PORT_16850
;
702 * It wasn't an XR16C850.
704 * We distinguish between the '654 and the '650 by counting
705 * how many bytes are in the FIFO. I'm using this for now,
706 * since that's the technique that was sent to me in the
707 * serial driver update, but I'm not convinced this works.
708 * I've had problems doing this in the past. -TYT
710 if (size_fifo(up
) == 64)
711 up
->port
.type
= PORT_16654
;
713 up
->port
.type
= PORT_16650V2
;
717 * We detected a chip without a FIFO. Only two fall into
718 * this category - the original 8250 and the 16450. The
719 * 16450 has a scratch register (accessible with LCR=0)
721 static void autoconfig_8250(struct uart_8250_port
*up
)
723 unsigned char scratch
, status1
, status2
;
725 up
->port
.type
= PORT_8250
;
727 scratch
= serial_in(up
, UART_SCR
);
728 serial_outp(up
, UART_SCR
, 0xa5);
729 status1
= serial_in(up
, UART_SCR
);
730 serial_outp(up
, UART_SCR
, 0x5a);
731 status2
= serial_in(up
, UART_SCR
);
732 serial_outp(up
, UART_SCR
, scratch
);
734 if (status1
== 0xa5 && status2
== 0x5a)
735 up
->port
.type
= PORT_16450
;
738 static int broken_efr(struct uart_8250_port
*up
)
741 * Exar ST16C2550 "A2" devices incorrectly detect as
742 * having an EFR, and report an ID of 0x0201. See
743 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
745 if (autoconfig_read_divisor_id(up
) == 0x0201 && size_fifo(up
) == 16)
752 * We know that the chip has FIFOs. Does it have an EFR? The
753 * EFR is located in the same register position as the IIR and
754 * we know the top two bits of the IIR are currently set. The
755 * EFR should contain zero. Try to read the EFR.
757 static void autoconfig_16550a(struct uart_8250_port
*up
)
759 unsigned char status1
, status2
;
760 unsigned int iersave
;
762 up
->port
.type
= PORT_16550A
;
763 up
->capabilities
|= UART_CAP_FIFO
;
766 * Check for presence of the EFR when DLAB is set.
767 * Only ST16C650V1 UARTs pass this test.
769 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
770 if (serial_in(up
, UART_EFR
) == 0) {
771 serial_outp(up
, UART_EFR
, 0xA8);
772 if (serial_in(up
, UART_EFR
) != 0) {
773 DEBUG_AUTOCONF("EFRv1 ");
774 up
->port
.type
= PORT_16650
;
775 up
->capabilities
|= UART_CAP_EFR
| UART_CAP_SLEEP
;
777 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
779 serial_outp(up
, UART_EFR
, 0);
784 * Maybe it requires 0xbf to be written to the LCR.
785 * (other ST16C650V2 UARTs, TI16C752A, etc)
787 serial_outp(up
, UART_LCR
, 0xBF);
788 if (serial_in(up
, UART_EFR
) == 0 && !broken_efr(up
)) {
789 DEBUG_AUTOCONF("EFRv2 ");
790 autoconfig_has_efr(up
);
795 * Check for a National Semiconductor SuperIO chip.
796 * Attempt to switch to bank 2, read the value of the LOOP bit
797 * from EXCR1. Switch back to bank 0, change it in MCR. Then
798 * switch back to bank 2, read it from EXCR1 again and check
799 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
801 serial_outp(up
, UART_LCR
, 0);
802 status1
= serial_in(up
, UART_MCR
);
803 serial_outp(up
, UART_LCR
, 0xE0);
804 status2
= serial_in(up
, 0x02); /* EXCR1 */
806 if (!((status2
^ status1
) & UART_MCR_LOOP
)) {
807 serial_outp(up
, UART_LCR
, 0);
808 serial_outp(up
, UART_MCR
, status1
^ UART_MCR_LOOP
);
809 serial_outp(up
, UART_LCR
, 0xE0);
810 status2
= serial_in(up
, 0x02); /* EXCR1 */
811 serial_outp(up
, UART_LCR
, 0);
812 serial_outp(up
, UART_MCR
, status1
);
814 if ((status2
^ status1
) & UART_MCR_LOOP
) {
817 serial_outp(up
, UART_LCR
, 0xE0);
819 quot
= serial_dl_read(up
);
822 status1
= serial_in(up
, 0x04); /* EXCR1 */
823 status1
&= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
824 status1
|= 0x10; /* 1.625 divisor for baud_base --> 921600 */
825 serial_outp(up
, 0x04, status1
);
827 serial_dl_write(up
, quot
);
829 serial_outp(up
, UART_LCR
, 0);
831 up
->port
.uartclk
= 921600*16;
832 up
->port
.type
= PORT_NS16550A
;
833 up
->capabilities
|= UART_NATSEMI
;
839 * No EFR. Try to detect a TI16750, which only sets bit 5 of
840 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
841 * Try setting it with and without DLAB set. Cheap clones
842 * set bit 5 without DLAB set.
844 serial_outp(up
, UART_LCR
, 0);
845 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
846 status1
= serial_in(up
, UART_IIR
) >> 5;
847 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
848 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
849 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
850 status2
= serial_in(up
, UART_IIR
) >> 5;
851 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
852 serial_outp(up
, UART_LCR
, 0);
854 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1
, status2
);
856 if (status1
== 6 && status2
== 7) {
857 up
->port
.type
= PORT_16750
;
858 up
->capabilities
|= UART_CAP_AFE
| UART_CAP_SLEEP
;
863 * Try writing and reading the UART_IER_UUE bit (b6).
864 * If it works, this is probably one of the Xscale platform's
866 * We're going to explicitly set the UUE bit to 0 before
867 * trying to write and read a 1 just to make sure it's not
868 * already a 1 and maybe locked there before we even start start.
870 iersave
= serial_in(up
, UART_IER
);
871 serial_outp(up
, UART_IER
, iersave
& ~UART_IER_UUE
);
872 if (!(serial_in(up
, UART_IER
) & UART_IER_UUE
)) {
874 * OK it's in a known zero state, try writing and reading
875 * without disturbing the current state of the other bits.
877 serial_outp(up
, UART_IER
, iersave
| UART_IER_UUE
);
878 if (serial_in(up
, UART_IER
) & UART_IER_UUE
) {
881 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
883 DEBUG_AUTOCONF("Xscale ");
884 up
->port
.type
= PORT_XSCALE
;
885 up
->capabilities
|= UART_CAP_UUE
;
890 * If we got here we couldn't force the IER_UUE bit to 0.
891 * Log it and continue.
893 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
895 serial_outp(up
, UART_IER
, iersave
);
899 * This routine is called by rs_init() to initialize a specific serial
900 * port. It determines what type of UART chip this serial port is
901 * using: 8250, 16450, 16550, 16550A. The important question is
902 * whether or not this UART is a 16550A or not, since this will
903 * determine whether or not we can use its FIFO features or not.
905 static void autoconfig(struct uart_8250_port
*up
, unsigned int probeflags
)
907 unsigned char status1
, scratch
, scratch2
, scratch3
;
908 unsigned char save_lcr
, save_mcr
;
911 if (!up
->port
.iobase
&& !up
->port
.mapbase
&& !up
->port
.membase
)
914 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
915 up
->port
.line
, up
->port
.iobase
, up
->port
.membase
);
918 * We really do need global IRQs disabled here - we're going to
919 * be frobbing the chips IRQ enable register to see if it exists.
921 spin_lock_irqsave(&up
->port
.lock
, flags
);
922 // save_flags(flags); cli();
924 up
->capabilities
= 0;
927 if (!(up
->port
.flags
& UPF_BUGGY_UART
)) {
929 * Do a simple existence test first; if we fail this,
930 * there's no point trying anything else.
932 * 0x80 is used as a nonsense port to prevent against
933 * false positives due to ISA bus float. The
934 * assumption is that 0x80 is a non-existent port;
935 * which should be safe since include/asm/io.h also
936 * makes this assumption.
938 * Note: this is safe as long as MCR bit 4 is clear
939 * and the device is in "PC" mode.
941 scratch
= serial_inp(up
, UART_IER
);
942 serial_outp(up
, UART_IER
, 0);
946 scratch2
= serial_inp(up
, UART_IER
);
947 serial_outp(up
, UART_IER
, 0x0F);
951 scratch3
= serial_inp(up
, UART_IER
);
952 serial_outp(up
, UART_IER
, scratch
);
953 #ifdef CONFIG_ARCH_LPC22xx
954 if (scratch2
!= 0 || scratch3
&0x07 != 0x07) {
956 if (scratch2
!= 0 || scratch3
!= 0x0F) {
959 * We failed; there's nothing here
961 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
967 save_mcr
= serial_in(up
, UART_MCR
);
968 save_lcr
= serial_in(up
, UART_LCR
);
971 * Check to see if a UART is really there. Certain broken
972 * internal modems based on the Rockwell chipset fail this
973 * test, because they apparently don't implement the loopback
974 * test mode. So this test is skipped on the COM 1 through
975 * COM 4 ports. This *should* be safe, since no board
976 * manufacturer would be stupid enough to design a board
977 * that conflicts with COM 1-4 --- we hope!
979 if (!(up
->port
.flags
& UPF_SKIP_TEST
)) {
980 serial_outp(up
, UART_MCR
, UART_MCR_LOOP
| 0x0A);
981 status1
= serial_inp(up
, UART_MSR
) & 0xF0;
982 serial_outp(up
, UART_MCR
, save_mcr
);
983 if (status1
!= 0x90) {
984 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
991 * We're pretty sure there's a port here. Lets find out what
992 * type of port it is. The IIR top two bits allows us to find
993 * out if it's 8250 or 16450, 16550, 16550A or later. This
994 * determines what we test for next.
996 * We also initialise the EFR (if any) to zero for later. The
997 * EFR occupies the same register location as the FCR and IIR.
999 serial_outp(up
, UART_LCR
, 0xBF);
1000 serial_outp(up
, UART_EFR
, 0);
1001 serial_outp(up
, UART_LCR
, 0);
1003 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
1004 scratch
= serial_in(up
, UART_IIR
) >> 6;
1006 DEBUG_AUTOCONF("iir=%d ", scratch
);
1010 autoconfig_8250(up
);
1013 up
->port
.type
= PORT_UNKNOWN
;
1016 up
->port
.type
= PORT_16550
;
1019 autoconfig_16550a(up
);
1023 #ifdef CONFIG_SERIAL_8250_RSA
1025 * Only probe for RSA ports if we got the region.
1027 if (up
->port
.type
== PORT_16550A
&& probeflags
& PROBE_RSA
) {
1030 for (i
= 0 ; i
< probe_rsa_count
; ++i
) {
1031 if (probe_rsa
[i
] == up
->port
.iobase
&&
1033 up
->port
.type
= PORT_RSA
;
1040 #ifdef CONFIG_SERIAL_8250_AU1X00
1041 /* if access method is AU, it is a 16550 with a quirk */
1042 if (up
->port
.type
== PORT_16550A
&& up
->port
.iotype
== UPIO_AU
)
1043 up
->bugs
|= UART_BUG_NOMSR
;
1046 serial_outp(up
, UART_LCR
, save_lcr
);
1048 if (up
->capabilities
!= uart_config
[up
->port
.type
].flags
) {
1050 "ttyS%d: detected caps %08x should be %08x\n",
1051 up
->port
.line
, up
->capabilities
,
1052 uart_config
[up
->port
.type
].flags
);
1055 up
->port
.fifosize
= uart_config
[up
->port
.type
].fifo_size
;
1056 up
->capabilities
= uart_config
[up
->port
.type
].flags
;
1057 up
->tx_loadsz
= uart_config
[up
->port
.type
].tx_loadsz
;
1059 if (up
->port
.type
== PORT_UNKNOWN
)
1065 #ifdef CONFIG_SERIAL_8250_RSA
1066 if (up
->port
.type
== PORT_RSA
)
1067 serial_outp(up
, UART_RSA_FRR
, 0);
1069 serial_outp(up
, UART_MCR
, save_mcr
);
1070 serial8250_clear_fifos(up
);
1071 (void)serial_in(up
, UART_RX
);
1072 if (up
->capabilities
& UART_CAP_UUE
)
1073 serial_outp(up
, UART_IER
, UART_IER_UUE
);
1075 serial_outp(up
, UART_IER
, 0);
1078 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1079 // restore_flags(flags);
1080 DEBUG_AUTOCONF("type=%s\n", uart_config
[up
->port
.type
].name
);
1083 static void autoconfig_irq(struct uart_8250_port
*up
)
1085 unsigned char save_mcr
, save_ier
;
1086 unsigned char save_ICP
= 0;
1087 unsigned int ICP
= 0;
1091 if (up
->port
.flags
& UPF_FOURPORT
) {
1092 ICP
= (up
->port
.iobase
& 0xfe0) | 0x1f;
1093 save_ICP
= inb_p(ICP
);
1098 /* forget possible initially masked and pending IRQ */
1099 probe_irq_off(probe_irq_on());
1100 save_mcr
= serial_inp(up
, UART_MCR
);
1101 save_ier
= serial_inp(up
, UART_IER
);
1102 serial_outp(up
, UART_MCR
, UART_MCR_OUT1
| UART_MCR_OUT2
);
1104 irqs
= probe_irq_on();
1105 serial_outp(up
, UART_MCR
, 0);
1107 if (up
->port
.flags
& UPF_FOURPORT
) {
1108 serial_outp(up
, UART_MCR
,
1109 UART_MCR_DTR
| UART_MCR_RTS
);
1111 serial_outp(up
, UART_MCR
,
1112 UART_MCR_DTR
| UART_MCR_RTS
| UART_MCR_OUT2
);
1114 serial_outp(up
, UART_IER
, 0x0f); /* enable all intrs */
1115 (void)serial_inp(up
, UART_LSR
);
1116 (void)serial_inp(up
, UART_RX
);
1117 (void)serial_inp(up
, UART_IIR
);
1118 (void)serial_inp(up
, UART_MSR
);
1119 serial_outp(up
, UART_TX
, 0xFF);
1121 irq
= probe_irq_off(irqs
);
1123 serial_outp(up
, UART_MCR
, save_mcr
);
1124 serial_outp(up
, UART_IER
, save_ier
);
1126 if (up
->port
.flags
& UPF_FOURPORT
)
1127 outb_p(save_ICP
, ICP
);
1129 up
->port
.irq
= (irq
> 0) ? irq
: 0;
1132 static inline void __stop_tx(struct uart_8250_port
*p
)
1134 if (p
->ier
& UART_IER_THRI
) {
1135 p
->ier
&= ~UART_IER_THRI
;
1136 serial_out(p
, UART_IER
, p
->ier
);
1140 static void serial8250_stop_tx(struct uart_port
*port
)
1142 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1147 * We really want to stop the transmitter from sending.
1149 if (up
->port
.type
== PORT_16C950
) {
1150 up
->acr
|= UART_ACR_TXDIS
;
1151 serial_icr_write(up
, UART_ACR
, up
->acr
);
1155 static void transmit_chars(struct uart_8250_port
*up
);
1157 static void serial8250_start_tx(struct uart_port
*port
)
1159 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1161 if (!(up
->ier
& UART_IER_THRI
)) {
1162 up
->ier
|= UART_IER_THRI
;
1163 serial_out(up
, UART_IER
, up
->ier
);
1165 if (up
->bugs
& UART_BUG_TXEN
) {
1166 unsigned char lsr
, iir
;
1167 lsr
= serial_in(up
, UART_LSR
);
1168 iir
= serial_in(up
, UART_IIR
);
1169 if (lsr
& UART_LSR_TEMT
&& iir
& UART_IIR_NO_INT
)
1175 * Re-enable the transmitter if we disabled it.
1177 if (up
->port
.type
== PORT_16C950
&& up
->acr
& UART_ACR_TXDIS
) {
1178 up
->acr
&= ~UART_ACR_TXDIS
;
1179 serial_icr_write(up
, UART_ACR
, up
->acr
);
1183 static void serial8250_stop_rx(struct uart_port
*port
)
1185 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1187 up
->ier
&= ~UART_IER_RLSI
;
1188 up
->port
.read_status_mask
&= ~UART_LSR_DR
;
1189 serial_out(up
, UART_IER
, up
->ier
);
1192 static void serial8250_enable_ms(struct uart_port
*port
)
1194 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1196 /* no MSR capabilities */
1197 if (up
->bugs
& UART_BUG_NOMSR
)
1200 up
->ier
|= UART_IER_MSI
;
1201 serial_out(up
, UART_IER
, up
->ier
);
1205 receive_chars(struct uart_8250_port
*up
, int *status
)
1207 struct tty_struct
*tty
= up
->port
.info
->tty
;
1208 unsigned char ch
, lsr
= *status
;
1209 int max_count
= 256;
1212 #ifdef CONFIG_LEDMAN
1213 ledman_cmd(LEDMAN_CMD_SET
,
1214 (up
->port
.line
== 0) ? LEDMAN_COM1_RX
: LEDMAN_COM2_RX
);
1218 ch
= serial_inp(up
, UART_RX
);
1220 up
->port
.icount
.rx
++;
1222 #ifdef CONFIG_SERIAL_8250_CONSOLE
1224 * Recover the break flag from console xmit
1226 if (up
->port
.line
== up
->port
.cons
->index
) {
1227 lsr
|= up
->lsr_break_flag
;
1228 up
->lsr_break_flag
= 0;
1232 if (unlikely(lsr
& (UART_LSR_BI
| UART_LSR_PE
|
1233 UART_LSR_FE
| UART_LSR_OE
))) {
1235 * For statistics only
1237 if (lsr
& UART_LSR_BI
) {
1238 lsr
&= ~(UART_LSR_FE
| UART_LSR_PE
);
1239 up
->port
.icount
.brk
++;
1241 * We do the SysRQ and SAK checking
1242 * here because otherwise the break
1243 * may get masked by ignore_status_mask
1244 * or read_status_mask.
1246 if (uart_handle_break(&up
->port
))
1248 } else if (lsr
& UART_LSR_PE
)
1249 up
->port
.icount
.parity
++;
1250 else if (lsr
& UART_LSR_FE
)
1251 up
->port
.icount
.frame
++;
1252 if (lsr
& UART_LSR_OE
)
1253 up
->port
.icount
.overrun
++;
1256 * Mask off conditions which should be ignored.
1258 lsr
&= up
->port
.read_status_mask
;
1260 if (lsr
& UART_LSR_BI
) {
1261 DEBUG_INTR("handling break....");
1263 } else if (lsr
& UART_LSR_PE
)
1265 else if (lsr
& UART_LSR_FE
)
1268 if (uart_handle_sysrq_char(&up
->port
, ch
))
1271 uart_insert_char(&up
->port
, lsr
, UART_LSR_OE
, ch
, flag
);
1274 lsr
= serial_inp(up
, UART_LSR
);
1275 } while ((lsr
& UART_LSR_DR
) && (max_count
-- > 0));
1276 spin_unlock(&up
->port
.lock
);
1277 tty_flip_buffer_push(tty
);
1278 spin_lock(&up
->port
.lock
);
1282 static void transmit_chars(struct uart_8250_port
*up
)
1284 struct circ_buf
*xmit
= &up
->port
.info
->xmit
;
1287 #ifdef CONFIG_LEDMAN
1288 ledman_cmd(LEDMAN_CMD_SET
,
1289 (up
->port
.line
== 0) ? LEDMAN_COM1_TX
: LEDMAN_COM2_TX
);
1292 if (up
->port
.x_char
) {
1293 serial_outp(up
, UART_TX
, up
->port
.x_char
);
1294 up
->port
.icount
.tx
++;
1295 up
->port
.x_char
= 0;
1298 if (uart_tx_stopped(&up
->port
)) {
1299 serial8250_stop_tx(&up
->port
);
1302 if (uart_circ_empty(xmit
)) {
1307 count
= up
->tx_loadsz
;
1309 serial_out(up
, UART_TX
, xmit
->buf
[xmit
->tail
]);
1310 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
1311 up
->port
.icount
.tx
++;
1312 if (uart_circ_empty(xmit
))
1314 } while (--count
> 0);
1316 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
1317 uart_write_wakeup(&up
->port
);
1319 DEBUG_INTR("THRE...");
1321 if (uart_circ_empty(xmit
))
1325 static unsigned int check_modem_status(struct uart_8250_port
*up
)
1327 unsigned int status
= serial_in(up
, UART_MSR
);
1329 if (status
& UART_MSR_ANY_DELTA
&& up
->ier
& UART_IER_MSI
) {
1330 if (status
& UART_MSR_TERI
)
1331 up
->port
.icount
.rng
++;
1332 if (status
& UART_MSR_DDSR
)
1333 up
->port
.icount
.dsr
++;
1334 if (status
& UART_MSR_DDCD
)
1335 uart_handle_dcd_change(&up
->port
, status
& UART_MSR_DCD
);
1336 if (status
& UART_MSR_DCTS
)
1337 uart_handle_cts_change(&up
->port
, status
& UART_MSR_CTS
);
1339 wake_up_interruptible(&up
->port
.info
->delta_msr_wait
);
1346 * This handles the interrupt from one port.
1349 serial8250_handle_port(struct uart_8250_port
*up
)
1351 unsigned int status
;
1353 spin_lock(&up
->port
.lock
);
1355 status
= serial_inp(up
, UART_LSR
);
1357 DEBUG_INTR("status = %x...", status
);
1359 if (status
& UART_LSR_DR
)
1360 receive_chars(up
, &status
);
1361 check_modem_status(up
);
1362 if (status
& UART_LSR_THRE
)
1365 spin_unlock(&up
->port
.lock
);
1369 * This is the serial driver's interrupt routine.
1371 * Arjan thinks the old way was overly complex, so it got simplified.
1372 * Alan disagrees, saying that need the complexity to handle the weird
1373 * nature of ISA shared interrupts. (This is a special exception.)
1375 * In order to handle ISA shared interrupts properly, we need to check
1376 * that all ports have been serviced, and therefore the ISA interrupt
1377 * line has been de-asserted.
1379 * This means we need to loop through all ports. checking that they
1380 * don't have an interrupt pending.
1382 static irqreturn_t
serial8250_interrupt(int irq
, void *dev_id
)
1384 struct irq_info
*i
= dev_id
;
1385 struct list_head
*l
, *end
= NULL
;
1386 int pass_counter
= 0, handled
= 0;
1388 DEBUG_INTR("serial8250_interrupt(%d)...", irq
);
1390 spin_lock(&i
->lock
);
1394 struct uart_8250_port
*up
;
1397 up
= list_entry(l
, struct uart_8250_port
, list
);
1399 iir
= serial_in(up
, UART_IIR
);
1400 if (!(iir
& UART_IIR_NO_INT
)) {
1401 serial8250_handle_port(up
);
1406 } else if (end
== NULL
)
1411 if (l
== i
->head
&& pass_counter
++ > PASS_LIMIT
) {
1412 /* If we hit this, we're dead. */
1413 printk(KERN_ERR
"serial8250: too much work for "
1419 spin_unlock(&i
->lock
);
1421 DEBUG_INTR("end.\n");
1423 return IRQ_RETVAL(handled
);
1427 * To support ISA shared interrupts, we need to have one interrupt
1428 * handler that ensures that the IRQ line has been deasserted
1429 * before returning. Failing to do this will result in the IRQ
1430 * line being stuck active, and, since ISA irqs are edge triggered,
1431 * no more IRQs will be seen.
1433 static void serial_do_unlink(struct irq_info
*i
, struct uart_8250_port
*up
)
1435 spin_lock_irq(&i
->lock
);
1437 if (!list_empty(i
->head
)) {
1438 if (i
->head
== &up
->list
)
1439 i
->head
= i
->head
->next
;
1440 list_del(&up
->list
);
1442 BUG_ON(i
->head
!= &up
->list
);
1446 spin_unlock_irq(&i
->lock
);
1449 static int serial_link_irq_chain(struct uart_8250_port
*up
)
1451 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
1452 int ret
, irq_flags
= up
->port
.flags
& UPF_SHARE_IRQ
? IRQF_SHARED
: 0;
1454 spin_lock_irq(&i
->lock
);
1457 list_add(&up
->list
, i
->head
);
1458 spin_unlock_irq(&i
->lock
);
1462 INIT_LIST_HEAD(&up
->list
);
1463 i
->head
= &up
->list
;
1464 spin_unlock_irq(&i
->lock
);
1466 #ifdef CONFIG_ARCH_MOXART // add by Victor Yu. 02-08-2007
1467 cpe_int_set_irq(up
->port
.irq
, LEVEL
, H_ACTIVE
);
1469 ret
= request_irq(up
->port
.irq
, serial8250_interrupt
,
1470 irq_flags
, "serial", i
);
1471 #ifdef CONFIG_IXP4XX_DCD0
1473 static irqreturn_t
serial8250_interrupt_dcd(int irq
, void *dev_id
);
1474 request_irq(7, serial8250_interrupt_dcd
, SA_SHIRQ
,
1479 serial_do_unlink(i
, up
);
1485 static void serial_unlink_irq_chain(struct uart_8250_port
*up
)
1487 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
1489 BUG_ON(i
->head
== NULL
);
1491 if (list_empty(i
->head
))
1492 free_irq(up
->port
.irq
, i
);
1494 serial_do_unlink(i
, up
);
1498 * This function is used to handle ports that do not have an
1499 * interrupt. This doesn't work very well for 16450's, but gives
1500 * barely passable results for a 16550A. (Although at the expense
1501 * of much CPU overhead).
1503 static void serial8250_timeout(unsigned long data
)
1505 struct uart_8250_port
*up
= (struct uart_8250_port
*)data
;
1506 unsigned int timeout
;
1509 iir
= serial_in(up
, UART_IIR
);
1510 if (!(iir
& UART_IIR_NO_INT
))
1511 serial8250_handle_port(up
);
1513 timeout
= up
->port
.timeout
;
1514 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
1515 mod_timer(&up
->timer
, jiffies
+ timeout
);
1518 static unsigned int serial8250_tx_empty(struct uart_port
*port
)
1520 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1521 unsigned long flags
;
1524 spin_lock_irqsave(&up
->port
.lock
, flags
);
1525 ret
= serial_in(up
, UART_LSR
) & UART_LSR_TEMT
? TIOCSER_TEMT
: 0;
1526 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1531 static unsigned int serial8250_get_mctrl(struct uart_port
*port
)
1533 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1534 unsigned int status
;
1537 status
= check_modem_status(up
);
1539 #ifdef CONFIG_IXP4XX_DCD0
1540 if (port
->line
== 0) {
1542 gpio_line_get(CONFIG_IXP4XX_DCD0
, &val
);
1543 status
&= ~(UART_MSR_RI
| UART_MSR_DCD
);
1544 status
|= (val
? 0 : UART_MSR_DCD
);
1549 if (status
& UART_MSR_DCD
)
1551 if (status
& UART_MSR_RI
)
1553 if (status
& UART_MSR_DSR
)
1555 if (status
& UART_MSR_CTS
)
1560 static void serial8250_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
1562 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1563 unsigned char mcr
= 0;
1565 if (mctrl
& TIOCM_RTS
)
1566 mcr
|= UART_MCR_RTS
;
1567 if (mctrl
& TIOCM_DTR
)
1568 mcr
|= UART_MCR_DTR
;
1569 if (mctrl
& TIOCM_OUT1
)
1570 mcr
|= UART_MCR_OUT1
;
1571 if (mctrl
& TIOCM_OUT2
)
1572 mcr
|= UART_MCR_OUT2
;
1573 if (mctrl
& TIOCM_LOOP
)
1574 mcr
|= UART_MCR_LOOP
;
1576 mcr
= (mcr
& up
->mcr_mask
) | up
->mcr_force
| up
->mcr
;
1578 serial_out(up
, UART_MCR
, mcr
);
1580 #ifdef CONFIG_IXP4XX_DTR0
1581 if (port
->line
== 0) {
1582 if (mcr
& UART_MCR_DTR
)
1583 gpio_line_set(CONFIG_IXP4XX_DTR0
, 0);
1585 gpio_line_set(CONFIG_IXP4XX_DTR0
, 1);
1590 #ifdef CONFIG_IXP4XX_DTR0
1591 static void __init
serial8250_initgpio(void)
1593 gpio_line_config(CONFIG_IXP4XX_DTR0
, IXP4XX_GPIO_OUT
);
1594 gpio_line_config(CONFIG_IXP4XX_DCD0
, IXP4XX_GPIO_IN
);
1595 set_irq_type(CONFIG_IXP4XX_DCD0IRQ
, IRQT_BOTHEDGE
);
1598 #define serial8250_initgpio() do { } while (0)
1601 #ifdef CONFIG_IXP4XX_DCD0
1602 static irqreturn_t
serial8250_interrupt_dcd(int irq
, void *dev_id
)
1604 struct uart_8250_port
*up
= dev_id
;
1605 unsigned int status
;
1607 DEBUG_INTR("serial8250_interrupt_dcd(%d)...", irq
);
1609 status
= serial8250_get_mctrl((struct uart_port
*) up
);
1610 uart_handle_dcd_change(&up
->port
, (status
& TIOCM_CD
) ? UART_MSR_DCD
: 0);
1611 wake_up_interruptible(&up
->port
.info
->delta_msr_wait
);
1613 DEBUG_INTR("end.\n");
1617 #endif /* CONFIG_IXP4XX_DCD0 */
1619 static void serial8250_break_ctl(struct uart_port
*port
, int break_state
)
1621 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1622 unsigned long flags
;
1624 spin_lock_irqsave(&up
->port
.lock
, flags
);
1625 if (break_state
== -1)
1626 up
->lcr
|= UART_LCR_SBC
;
1628 up
->lcr
&= ~UART_LCR_SBC
;
1629 serial_out(up
, UART_LCR
, up
->lcr
);
1630 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1633 static int serial8250_startup(struct uart_port
*port
)
1635 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1636 unsigned long flags
;
1637 unsigned char lsr
, iir
;
1640 up
->capabilities
= uart_config
[up
->port
.type
].flags
;
1643 if (up
->port
.type
== PORT_16C950
) {
1644 /* Wake up and initialize UART */
1646 serial_outp(up
, UART_LCR
, 0xBF);
1647 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1648 serial_outp(up
, UART_IER
, 0);
1649 serial_outp(up
, UART_LCR
, 0);
1650 serial_icr_write(up
, UART_CSR
, 0); /* Reset the UART */
1651 serial_outp(up
, UART_LCR
, 0xBF);
1652 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1653 serial_outp(up
, UART_LCR
, 0);
1656 #ifdef CONFIG_SERIAL_8250_RSA
1658 * If this is an RSA port, see if we can kick it up to the
1659 * higher speed clock.
1665 * Clear the FIFO buffers and disable them.
1666 * (they will be reenabled in set_termios())
1668 serial8250_clear_fifos(up
);
1671 * Clear the interrupt registers.
1673 (void) serial_inp(up
, UART_LSR
);
1674 (void) serial_inp(up
, UART_RX
);
1675 (void) serial_inp(up
, UART_IIR
);
1676 (void) serial_inp(up
, UART_MSR
);
1679 * At this point, there's no way the LSR could still be 0xff;
1680 * if it is, then bail out, because there's likely no UART
1683 if (!(up
->port
.flags
& UPF_BUGGY_UART
) &&
1684 (serial_inp(up
, UART_LSR
) == 0xff)) {
1685 printk("ttyS%d: LSR safety check engaged!\n", up
->port
.line
);
1690 * For a XR16C850, we need to set the trigger levels
1692 if (up
->port
.type
== PORT_16850
) {
1695 serial_outp(up
, UART_LCR
, 0xbf);
1697 fctr
= serial_inp(up
, UART_FCTR
) & ~(UART_FCTR_RX
|UART_FCTR_TX
);
1698 serial_outp(up
, UART_FCTR
, fctr
| UART_FCTR_TRGD
| UART_FCTR_RX
);
1699 serial_outp(up
, UART_TRG
, UART_TRG_96
);
1700 serial_outp(up
, UART_FCTR
, fctr
| UART_FCTR_TRGD
| UART_FCTR_TX
);
1701 serial_outp(up
, UART_TRG
, UART_TRG_96
);
1703 serial_outp(up
, UART_LCR
, 0);
1707 * If the "interrupt" for this port doesn't correspond with any
1708 * hardware interrupt, we use a timer-based system. The original
1709 * driver used to do this with IRQ0.
1711 if (!is_real_interrupt(up
->port
.irq
)) {
1712 unsigned int timeout
= up
->port
.timeout
;
1714 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
1716 up
->timer
.data
= (unsigned long)up
;
1717 mod_timer(&up
->timer
, jiffies
+ timeout
);
1719 retval
= serial_link_irq_chain(up
);
1725 * Now, initialize the UART
1727 serial_outp(up
, UART_LCR
, UART_LCR_WLEN8
);
1729 spin_lock_irqsave(&up
->port
.lock
, flags
);
1730 if (up
->port
.flags
& UPF_FOURPORT
) {
1731 if (!is_real_interrupt(up
->port
.irq
))
1732 up
->mcr_force
|= UART_MCR_OUT1
;
1735 * Most PC uarts need OUT2 raised to enable interrupts.
1737 if (is_real_interrupt(up
->port
.irq
))
1738 up
->mcr_force
|= UART_MCR_OUT2
;
1740 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1743 * Do a quick test to see if we receive an
1744 * interrupt when we enable the TX irq.
1746 serial_outp(up
, UART_IER
, UART_IER_THRI
);
1747 lsr
= serial_in(up
, UART_LSR
);
1748 iir
= serial_in(up
, UART_IIR
);
1749 serial_outp(up
, UART_IER
, 0);
1751 if (lsr
& UART_LSR_TEMT
&& iir
& UART_IIR_NO_INT
) {
1752 if (!(up
->bugs
& UART_BUG_TXEN
)) {
1753 up
->bugs
|= UART_BUG_TXEN
;
1754 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
1758 up
->bugs
&= ~UART_BUG_TXEN
;
1761 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1764 * Finally, enable interrupts. Note: Modem status interrupts
1765 * are set via set_termios(), which will be occurring imminently
1766 * anyway, so we don't enable them here.
1768 up
->ier
= UART_IER_RLSI
| UART_IER_RDI
;
1769 serial_outp(up
, UART_IER
, up
->ier
);
1771 if (up
->port
.flags
& UPF_FOURPORT
) {
1774 * Enable interrupts on the AST Fourport board
1776 icp
= (up
->port
.iobase
& 0xfe0) | 0x01f;
1782 * And clear the interrupt registers again for luck.
1784 (void) serial_inp(up
, UART_LSR
);
1785 (void) serial_inp(up
, UART_RX
);
1786 (void) serial_inp(up
, UART_IIR
);
1787 (void) serial_inp(up
, UART_MSR
);
1792 static void serial8250_shutdown(struct uart_port
*port
)
1794 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1795 unsigned long flags
;
1798 * Disable interrupts from this port
1801 serial_outp(up
, UART_IER
, 0);
1803 spin_lock_irqsave(&up
->port
.lock
, flags
);
1804 if (up
->port
.flags
& UPF_FOURPORT
) {
1805 /* reset interrupts on the AST Fourport board */
1806 inb((up
->port
.iobase
& 0xfe0) | 0x1f);
1807 up
->mcr_force
|= UART_MCR_OUT2
;
1809 up
->mcr_force
&= ~UART_MCR_OUT2
;
1811 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1812 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1815 * Disable break condition and FIFOs
1817 serial_out(up
, UART_LCR
, serial_inp(up
, UART_LCR
) & ~UART_LCR_SBC
);
1818 serial8250_clear_fifos(up
);
1820 #ifdef CONFIG_SERIAL_8250_RSA
1822 * Reset the RSA board back to 115kbps compat mode.
1828 * Read data port to reset things, and then unlink from
1831 (void) serial_in(up
, UART_RX
);
1833 if (!is_real_interrupt(up
->port
.irq
))
1834 del_timer_sync(&up
->timer
);
1836 serial_unlink_irq_chain(up
);
1839 static unsigned int serial8250_get_divisor(struct uart_port
*port
, unsigned int baud
)
1844 * Handle magic divisors for baud rates above baud_base on
1845 * SMSC SuperIO chips.
1847 if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
1848 baud
== (port
->uartclk
/4))
1850 else if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
1851 baud
== (port
->uartclk
/8))
1854 quot
= uart_get_divisor(port
, baud
);
1860 serial8250_set_termios(struct uart_port
*port
, struct termios
*termios
,
1861 struct termios
*old
)
1863 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1864 unsigned char cval
, fcr
= 0;
1865 unsigned long flags
;
1866 unsigned int baud
, quot
;
1868 switch (termios
->c_cflag
& CSIZE
) {
1870 cval
= UART_LCR_WLEN5
;
1873 cval
= UART_LCR_WLEN6
;
1876 cval
= UART_LCR_WLEN7
;
1880 cval
= UART_LCR_WLEN8
;
1884 if (termios
->c_cflag
& CSTOPB
)
1885 cval
|= UART_LCR_STOP
;
1886 if (termios
->c_cflag
& PARENB
)
1887 cval
|= UART_LCR_PARITY
;
1888 if (!(termios
->c_cflag
& PARODD
))
1889 cval
|= UART_LCR_EPAR
;
1891 if (termios
->c_cflag
& CMSPAR
)
1892 cval
|= UART_LCR_SPAR
;
1896 * Ask the core to calculate the divisor for us.
1898 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
1899 quot
= serial8250_get_divisor(port
, baud
);
1902 * Oxford Semi 952 rev B workaround
1904 if (up
->bugs
& UART_BUG_QUOT
&& (quot
& 0xff) == 0)
1907 if (up
->capabilities
& UART_CAP_FIFO
&& up
->port
.fifosize
> 1) {
1909 fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_TRIGGER_1
;
1911 fcr
= uart_config
[up
->port
.type
].fcr
;
1915 * MCR-based auto flow control. When AFE is enabled, RTS will be
1916 * deasserted when the receive FIFO contains more characters than
1917 * the trigger, or the MCR RTS bit is cleared. In the case where
1918 * the remote UART is not using CTS auto flow control, we must
1919 * have sufficient FIFO entries for the latency of the remote
1920 * UART to respond. IOW, at least 32 bytes of FIFO.
1922 if (up
->capabilities
& UART_CAP_AFE
&& up
->port
.fifosize
>= 32) {
1923 up
->mcr
&= ~UART_MCR_AFE
;
1924 if (termios
->c_cflag
& CRTSCTS
)
1925 up
->mcr
|= UART_MCR_AFE
;
1929 * Ok, we're now changing the port state. Do it with
1930 * interrupts disabled.
1932 spin_lock_irqsave(&up
->port
.lock
, flags
);
1935 * Update the per-port timeout.
1937 uart_update_timeout(port
, termios
->c_cflag
, baud
);
1939 up
->port
.read_status_mask
= UART_LSR_OE
| UART_LSR_THRE
| UART_LSR_DR
;
1940 if (termios
->c_iflag
& INPCK
)
1941 up
->port
.read_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
1942 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
1943 up
->port
.read_status_mask
|= UART_LSR_BI
;
1946 * Characteres to ignore
1948 up
->port
.ignore_status_mask
= 0;
1949 if (termios
->c_iflag
& IGNPAR
)
1950 up
->port
.ignore_status_mask
|= UART_LSR_PE
| UART_LSR_FE
;
1951 if (termios
->c_iflag
& IGNBRK
) {
1952 up
->port
.ignore_status_mask
|= UART_LSR_BI
;
1954 * If we're ignoring parity and break indicators,
1955 * ignore overruns too (for real raw support).
1957 if (termios
->c_iflag
& IGNPAR
)
1958 up
->port
.ignore_status_mask
|= UART_LSR_OE
;
1962 * ignore all characters if CREAD is not set
1964 if ((termios
->c_cflag
& CREAD
) == 0)
1965 up
->port
.ignore_status_mask
|= UART_LSR_DR
;
1968 * CTS flow control flag and modem status interrupts
1970 up
->ier
&= ~UART_IER_MSI
;
1971 if (!(up
->bugs
& UART_BUG_NOMSR
) &&
1972 UART_ENABLE_MS(&up
->port
, termios
->c_cflag
))
1973 up
->ier
|= UART_IER_MSI
;
1974 if (up
->capabilities
& UART_CAP_UUE
)
1975 up
->ier
|= UART_IER_UUE
| UART_IER_RTOIE
;
1977 serial_out(up
, UART_IER
, up
->ier
);
1979 if (up
->capabilities
& UART_CAP_EFR
) {
1980 unsigned char efr
= 0;
1982 * TI16C752/Startech hardware flow control. FIXME:
1983 * - TI16C752 requires control thresholds to be set.
1984 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
1986 if (termios
->c_cflag
& CRTSCTS
)
1987 efr
|= UART_EFR_CTS
;
1989 serial_outp(up
, UART_LCR
, 0xBF);
1990 serial_outp(up
, UART_EFR
, efr
);
1993 #ifdef CONFIG_ARCH_OMAP15XX
1994 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
1995 if (cpu_is_omap1510() && is_omap_port((unsigned int)up
->port
.membase
)) {
1996 if (baud
== 115200) {
1998 serial_out(up
, UART_OMAP_OSC_12M_SEL
, 1);
2000 serial_out(up
, UART_OMAP_OSC_12M_SEL
, 0);
2004 if (up
->capabilities
& UART_NATSEMI
) {
2005 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
2006 serial_outp(up
, UART_LCR
, 0xe0);
2008 serial_outp(up
, UART_LCR
, cval
| UART_LCR_DLAB
);/* set DLAB */
2011 serial_dl_write(up
, quot
);
2014 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2015 * is written without DLAB set, this mode will be disabled.
2017 if (up
->port
.type
== PORT_16750
)
2018 serial_outp(up
, UART_FCR
, fcr
);
2020 serial_outp(up
, UART_LCR
, cval
); /* reset DLAB */
2021 up
->lcr
= cval
; /* Save LCR */
2022 if (up
->port
.type
!= PORT_16750
) {
2023 if (fcr
& UART_FCR_ENABLE_FIFO
) {
2024 /* emulated UARTs (Lucent Venus 167x) need two steps */
2025 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
2027 serial_outp(up
, UART_FCR
, fcr
); /* set fcr */
2029 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
2030 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
2034 serial8250_pm(struct uart_port
*port
, unsigned int state
,
2035 unsigned int oldstate
)
2037 struct uart_8250_port
*p
= (struct uart_8250_port
*)port
;
2039 serial8250_set_sleep(p
, state
!= 0);
2042 p
->pm(port
, state
, oldstate
);
2046 * Resource handling.
2048 static int serial8250_request_std_resource(struct uart_8250_port
*up
)
2050 unsigned int size
= 8 << up
->port
.regshift
;
2053 switch (up
->port
.iotype
) {
2060 if (!up
->port
.mapbase
)
2063 if (!request_mem_region(up
->port
.mapbase
, size
, "serial")) {
2068 if (up
->port
.flags
& UPF_IOREMAP
) {
2069 up
->port
.membase
= ioremap(up
->port
.mapbase
, size
);
2070 if (!up
->port
.membase
) {
2071 release_mem_region(up
->port
.mapbase
, size
);
2079 if (!request_region(up
->port
.iobase
, size
, "serial"))
2086 static void serial8250_release_std_resource(struct uart_8250_port
*up
)
2088 unsigned int size
= 8 << up
->port
.regshift
;
2090 switch (up
->port
.iotype
) {
2097 if (!up
->port
.mapbase
)
2100 if (up
->port
.flags
& UPF_IOREMAP
) {
2101 iounmap(up
->port
.membase
);
2102 up
->port
.membase
= NULL
;
2105 release_mem_region(up
->port
.mapbase
, size
);
2110 release_region(up
->port
.iobase
, size
);
2115 static int serial8250_request_rsa_resource(struct uart_8250_port
*up
)
2117 unsigned long start
= UART_RSA_BASE
<< up
->port
.regshift
;
2118 unsigned int size
= 8 << up
->port
.regshift
;
2121 switch (up
->port
.iotype
) {
2124 start
+= up
->port
.iobase
;
2125 if (request_region(start
, size
, "serial-rsa"))
2135 static void serial8250_release_rsa_resource(struct uart_8250_port
*up
)
2137 unsigned long offset
= UART_RSA_BASE
<< up
->port
.regshift
;
2138 unsigned int size
= 8 << up
->port
.regshift
;
2140 switch (up
->port
.iotype
) {
2143 release_region(up
->port
.iobase
+ offset
, size
);
2148 static void serial8250_release_port(struct uart_port
*port
)
2150 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2152 serial8250_release_std_resource(up
);
2153 if (up
->port
.type
== PORT_RSA
)
2154 serial8250_release_rsa_resource(up
);
2157 static int serial8250_request_port(struct uart_port
*port
)
2159 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2162 ret
= serial8250_request_std_resource(up
);
2163 if (ret
== 0 && up
->port
.type
== PORT_RSA
) {
2164 ret
= serial8250_request_rsa_resource(up
);
2166 serial8250_release_std_resource(up
);
2172 static void serial8250_config_port(struct uart_port
*port
, int flags
)
2174 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2175 int probeflags
= PROBE_ANY
;
2179 * Find the region that we can probe for. This in turn
2180 * tells us whether we can probe for the type of port.
2182 ret
= serial8250_request_std_resource(up
);
2186 ret
= serial8250_request_rsa_resource(up
);
2188 probeflags
&= ~PROBE_RSA
;
2190 if (flags
& UART_CONFIG_TYPE
)
2191 autoconfig(up
, probeflags
);
2192 if (up
->port
.type
!= PORT_UNKNOWN
&& flags
& UART_CONFIG_IRQ
)
2195 if (up
->port
.type
!= PORT_RSA
&& probeflags
& PROBE_RSA
)
2196 serial8250_release_rsa_resource(up
);
2197 if (up
->port
.type
== PORT_UNKNOWN
)
2198 serial8250_release_std_resource(up
);
2202 serial8250_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
2204 if (ser
->irq
>= NR_IRQS
|| ser
->irq
< 0 ||
2205 ser
->baud_base
< 9600 || ser
->type
< PORT_UNKNOWN
||
2206 ser
->type
>= ARRAY_SIZE(uart_config
) || ser
->type
== PORT_CIRRUS
||
2207 ser
->type
== PORT_STARTECH
)
2213 serial8250_type(struct uart_port
*port
)
2215 int type
= port
->type
;
2217 if (type
>= ARRAY_SIZE(uart_config
))
2219 return uart_config
[type
].name
;
2222 static struct uart_ops serial8250_pops
= {
2223 .tx_empty
= serial8250_tx_empty
,
2224 .set_mctrl
= serial8250_set_mctrl
,
2225 .get_mctrl
= serial8250_get_mctrl
,
2226 .stop_tx
= serial8250_stop_tx
,
2227 .start_tx
= serial8250_start_tx
,
2228 .stop_rx
= serial8250_stop_rx
,
2229 .enable_ms
= serial8250_enable_ms
,
2230 .break_ctl
= serial8250_break_ctl
,
2231 .startup
= serial8250_startup
,
2232 .shutdown
= serial8250_shutdown
,
2233 .set_termios
= serial8250_set_termios
,
2234 .pm
= serial8250_pm
,
2235 .type
= serial8250_type
,
2236 .release_port
= serial8250_release_port
,
2237 .request_port
= serial8250_request_port
,
2238 .config_port
= serial8250_config_port
,
2239 .verify_port
= serial8250_verify_port
,
2242 static struct uart_8250_port serial8250_ports
[UART_NR
];
2244 static void __init
serial8250_isa_init_ports(void)
2246 struct uart_8250_port
*up
;
2247 static int first
= 1;
2254 for (i
= 0; i
< nr_uarts
; i
++) {
2255 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2258 spin_lock_init(&up
->port
.lock
);
2260 init_timer(&up
->timer
);
2261 up
->timer
.function
= serial8250_timeout
;
2264 * ALPHA_KLUDGE_MCR needs to be killed.
2266 up
->mcr_mask
= ~ALPHA_KLUDGE_MCR
;
2267 up
->mcr_force
= ALPHA_KLUDGE_MCR
;
2269 up
->port
.ops
= &serial8250_pops
;
2272 for (i
= 0, up
= serial8250_ports
;
2273 i
< ARRAY_SIZE(old_serial_port
) && i
< nr_uarts
;
2275 up
->port
.iobase
= old_serial_port
[i
].port
;
2276 up
->port
.irq
= irq_canonicalize(old_serial_port
[i
].irq
);
2277 up
->port
.uartclk
= old_serial_port
[i
].baud_base
* 16;
2278 up
->port
.flags
= old_serial_port
[i
].flags
;
2279 up
->port
.hub6
= old_serial_port
[i
].hub6
;
2280 up
->port
.membase
= old_serial_port
[i
].iomem_base
;
2281 up
->port
.iotype
= old_serial_port
[i
].io_type
;
2282 up
->port
.regshift
= old_serial_port
[i
].iomem_reg_shift
;
2284 up
->port
.flags
|= UPF_SHARE_IRQ
;
2289 serial8250_register_ports(struct uart_driver
*drv
, struct device
*dev
)
2293 serial8250_isa_init_ports();
2295 for (i
= 0; i
< nr_uarts
; i
++) {
2296 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2299 uart_add_one_port(drv
, &up
->port
);
2303 #ifdef CONFIG_SERIAL_8250_CONSOLE
2305 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
2308 * Wait for transmitter & holding register to empty
2310 static inline void wait_for_xmitr(struct uart_8250_port
*up
, int bits
)
2312 unsigned int status
, tmout
= 10000;
2314 /* Wait up to 10ms for the character(s) to be sent. */
2316 status
= serial_in(up
, UART_LSR
);
2318 if (status
& UART_LSR_BI
)
2319 up
->lsr_break_flag
= UART_LSR_BI
;
2324 } while ((status
& bits
) != bits
);
2326 /* Wait up to 1s for flow control if necessary */
2327 if (up
->port
.flags
& UPF_CONS_FLOW
) {
2329 while (!(serial_in(up
, UART_MSR
) & UART_MSR_CTS
) && --tmout
) {
2331 touch_nmi_watchdog();
2336 static void serial8250_console_putchar(struct uart_port
*port
, int ch
)
2338 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2340 wait_for_xmitr(up
, UART_LSR_THRE
);
2341 serial_out(up
, UART_TX
, ch
);
2345 * Print a string to the serial port trying not to disturb
2346 * any possible real use of the port...
2348 * The console_lock must be held when we get here.
2351 serial8250_console_write(struct console
*co
, const char *s
, unsigned int count
)
2353 struct uart_8250_port
*up
= &serial8250_ports
[co
->index
];
2354 unsigned long flags
;
2358 touch_nmi_watchdog();
2360 local_irq_save(flags
);
2361 if (up
->port
.sysrq
) {
2362 /* serial8250_handle_port() already took the lock */
2364 } else if (oops_in_progress
) {
2365 locked
= spin_trylock(&up
->port
.lock
);
2367 spin_lock(&up
->port
.lock
);
2370 * First save the IER then disable the interrupts
2372 ier
= serial_in(up
, UART_IER
);
2374 if (up
->capabilities
& UART_CAP_UUE
)
2375 serial_out(up
, UART_IER
, UART_IER_UUE
);
2377 serial_out(up
, UART_IER
, 0);
2379 uart_console_write(&up
->port
, s
, count
, serial8250_console_putchar
);
2382 * Finally, wait for transmitter to become empty
2383 * and restore the IER
2385 wait_for_xmitr(up
, BOTH_EMPTY
);
2386 serial_out(up
, UART_IER
, ier
);
2389 spin_unlock(&up
->port
.lock
);
2390 local_irq_restore(flags
);
2393 static int serial8250_console_setup(struct console
*co
, char *options
)
2395 struct uart_port
*port
;
2402 * Check whether an invalid uart number has been specified, and
2403 * if so, search for the first available port that does have
2406 if (co
->index
>= nr_uarts
)
2408 port
= &serial8250_ports
[co
->index
].port
;
2409 if (!port
->iobase
&& !port
->membase
)
2413 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
2415 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
2418 static struct uart_driver serial8250_reg
;
2419 static struct console serial8250_console
= {
2421 .write
= serial8250_console_write
,
2422 .device
= uart_console_device
,
2423 .setup
= serial8250_console_setup
,
2424 .flags
= CON_PRINTBUFFER
,
2426 .data
= &serial8250_reg
,
2429 static int __init
serial8250_console_init(void)
2431 serial8250_isa_init_ports();
2432 register_console(&serial8250_console
);
2435 console_initcall(serial8250_console_init
);
2437 static int __init
find_port(struct uart_port
*p
)
2440 struct uart_port
*port
;
2442 for (line
= 0; line
< nr_uarts
; line
++) {
2443 port
= &serial8250_ports
[line
].port
;
2444 if (uart_match_port(p
, port
))
2450 int __init
serial8250_start_console(struct uart_port
*port
, char *options
)
2454 line
= find_port(port
);
2458 add_preferred_console("ttyS", line
, options
);
2459 printk("Adding console on ttyS%d at %s 0x%lx (options '%s')\n",
2460 line
, port
->iotype
== UPIO_MEM
? "MMIO" : "I/O port",
2461 port
->iotype
== UPIO_MEM
? (unsigned long) port
->mapbase
:
2462 (unsigned long) port
->iobase
, options
);
2463 if (!(serial8250_console
.flags
& CON_ENABLED
)) {
2464 serial8250_console
.flags
&= ~CON_PRINTBUFFER
;
2465 register_console(&serial8250_console
);
2470 #define SERIAL8250_CONSOLE &serial8250_console
2472 #define SERIAL8250_CONSOLE NULL
2475 static struct uart_driver serial8250_reg
= {
2476 .owner
= THIS_MODULE
,
2477 .driver_name
= "serial",
2482 .cons
= SERIAL8250_CONSOLE
,
2486 * early_serial_setup - early registration for 8250 ports
2488 * Setup an 8250 port structure prior to console initialisation. Use
2489 * after console initialisation will cause undefined behaviour.
2491 int __init
early_serial_setup(struct uart_port
*port
)
2493 if (port
->line
>= ARRAY_SIZE(serial8250_ports
))
2496 serial8250_isa_init_ports();
2497 serial8250_ports
[port
->line
].port
= *port
;
2498 serial8250_ports
[port
->line
].port
.ops
= &serial8250_pops
;
2503 * serial8250_suspend_port - suspend one serial port
2504 * @line: serial line number
2506 * Suspend one serial port.
2508 void serial8250_suspend_port(int line
)
2510 uart_suspend_port(&serial8250_reg
, &serial8250_ports
[line
].port
);
2514 * serial8250_resume_port - resume one serial port
2515 * @line: serial line number
2517 * Resume one serial port.
2519 void serial8250_resume_port(int line
)
2521 uart_resume_port(&serial8250_reg
, &serial8250_ports
[line
].port
);
2525 * Register a set of serial devices attached to a platform device. The
2526 * list is terminated with a zero flags entry, which means we expect
2527 * all entries to have at least UPF_BOOT_AUTOCONF set.
2529 static int __devinit
serial8250_probe(struct platform_device
*dev
)
2531 struct plat_serial8250_port
*p
= dev
->dev
.platform_data
;
2532 struct uart_port port
;
2535 memset(&port
, 0, sizeof(struct uart_port
));
2537 for (i
= 0; p
&& p
->flags
!= 0; p
++, i
++) {
2538 port
.iobase
= p
->iobase
;
2539 port
.membase
= p
->membase
;
2541 port
.uartclk
= p
->uartclk
;
2542 port
.regshift
= p
->regshift
;
2543 port
.iotype
= p
->iotype
;
2544 port
.flags
= p
->flags
;
2545 port
.mapbase
= p
->mapbase
;
2546 port
.hub6
= p
->hub6
;
2547 port
.dev
= &dev
->dev
;
2549 port
.flags
|= UPF_SHARE_IRQ
;
2550 ret
= serial8250_register_port(&port
);
2552 dev_err(&dev
->dev
, "unable to register port at index %d "
2553 "(IO%lx MEM%lx IRQ%d): %d\n", i
,
2554 p
->iobase
, p
->mapbase
, p
->irq
, ret
);
2561 * Remove serial ports registered against a platform device.
2563 static int __devexit
serial8250_remove(struct platform_device
*dev
)
2567 for (i
= 0; i
< nr_uarts
; i
++) {
2568 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2570 if (up
->port
.dev
== &dev
->dev
)
2571 serial8250_unregister_port(i
);
2576 static int serial8250_suspend(struct platform_device
*dev
, pm_message_t state
)
2580 for (i
= 0; i
< UART_NR
; i
++) {
2581 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2583 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== &dev
->dev
)
2584 uart_suspend_port(&serial8250_reg
, &up
->port
);
2590 static int serial8250_resume(struct platform_device
*dev
)
2594 for (i
= 0; i
< UART_NR
; i
++) {
2595 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2597 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== &dev
->dev
)
2598 uart_resume_port(&serial8250_reg
, &up
->port
);
2604 static struct platform_driver serial8250_isa_driver
= {
2605 .probe
= serial8250_probe
,
2606 .remove
= __devexit_p(serial8250_remove
),
2607 .suspend
= serial8250_suspend
,
2608 .resume
= serial8250_resume
,
2610 .name
= "serial8250",
2611 .owner
= THIS_MODULE
,
2616 * This "device" covers _all_ ISA 8250-compatible serial devices listed
2617 * in the table in include/asm/serial.h
2619 static struct platform_device
*serial8250_isa_devs
;
2622 * serial8250_register_port and serial8250_unregister_port allows for
2623 * 16x50 serial ports to be configured at run-time, to support PCMCIA
2624 * modems and PCI multiport cards.
2626 static DEFINE_MUTEX(serial_mutex
);
2628 static struct uart_8250_port
*serial8250_find_match_or_unused(struct uart_port
*port
)
2633 * First, find a port entry which matches.
2635 for (i
= 0; i
< nr_uarts
; i
++)
2636 if (uart_match_port(&serial8250_ports
[i
].port
, port
))
2637 return &serial8250_ports
[i
];
2640 * We didn't find a matching entry, so look for the first
2641 * free entry. We look for one which hasn't been previously
2642 * used (indicated by zero iobase).
2644 for (i
= 0; i
< nr_uarts
; i
++)
2645 if (serial8250_ports
[i
].port
.type
== PORT_UNKNOWN
&&
2646 serial8250_ports
[i
].port
.iobase
== 0)
2647 return &serial8250_ports
[i
];
2650 * That also failed. Last resort is to find any entry which
2651 * doesn't have a real port associated with it.
2653 for (i
= 0; i
< nr_uarts
; i
++)
2654 if (serial8250_ports
[i
].port
.type
== PORT_UNKNOWN
)
2655 return &serial8250_ports
[i
];
2661 * serial8250_register_port - register a serial port
2662 * @port: serial port template
2664 * Configure the serial port specified by the request. If the
2665 * port exists and is in use, it is hung up and unregistered
2668 * The port is then probed and if necessary the IRQ is autodetected
2669 * If this fails an error is returned.
2671 * On success the port is ready to use and the line number is returned.
2673 int serial8250_register_port(struct uart_port
*port
)
2675 struct uart_8250_port
*uart
;
2678 if (port
->uartclk
== 0)
2681 mutex_lock(&serial_mutex
);
2683 uart
= serial8250_find_match_or_unused(port
);
2685 uart_remove_one_port(&serial8250_reg
, &uart
->port
);
2687 uart
->port
.iobase
= port
->iobase
;
2688 uart
->port
.membase
= port
->membase
;
2689 uart
->port
.irq
= port
->irq
;
2690 uart
->port
.uartclk
= port
->uartclk
;
2691 uart
->port
.fifosize
= port
->fifosize
;
2692 uart
->port
.regshift
= port
->regshift
;
2693 uart
->port
.iotype
= port
->iotype
;
2694 uart
->port
.flags
= port
->flags
| UPF_BOOT_AUTOCONF
;
2695 uart
->port
.mapbase
= port
->mapbase
;
2697 uart
->port
.dev
= port
->dev
;
2699 ret
= uart_add_one_port(&serial8250_reg
, &uart
->port
);
2701 ret
= uart
->port
.line
;
2703 mutex_unlock(&serial_mutex
);
2707 EXPORT_SYMBOL(serial8250_register_port
);
2710 * serial8250_unregister_port - remove a 16x50 serial port at runtime
2711 * @line: serial line number
2713 * Remove one serial port. This may not be called from interrupt
2714 * context. We hand the port back to the our control.
2716 void serial8250_unregister_port(int line
)
2718 struct uart_8250_port
*uart
= &serial8250_ports
[line
];
2720 mutex_lock(&serial_mutex
);
2721 uart_remove_one_port(&serial8250_reg
, &uart
->port
);
2722 if (serial8250_isa_devs
) {
2723 uart
->port
.flags
&= ~UPF_BOOT_AUTOCONF
;
2724 uart
->port
.type
= PORT_UNKNOWN
;
2725 uart
->port
.dev
= &serial8250_isa_devs
->dev
;
2726 uart_add_one_port(&serial8250_reg
, &uart
->port
);
2728 uart
->port
.dev
= NULL
;
2730 mutex_unlock(&serial_mutex
);
2732 EXPORT_SYMBOL(serial8250_unregister_port
);
2734 static int __init
serial8250_init(void)
2738 if (nr_uarts
> UART_NR
)
2741 printk(KERN_INFO
"Serial: 8250/16550 driver $Revision: 1.90 $ "
2742 "%d ports, IRQ sharing %sabled\n", nr_uarts
,
2743 share_irqs
? "en" : "dis");
2745 serial8250_initgpio();
2747 for (i
= 0; i
< NR_IRQS
; i
++)
2748 spin_lock_init(&irq_lists
[i
].lock
);
2750 ret
= uart_register_driver(&serial8250_reg
);
2754 serial8250_isa_devs
= platform_device_alloc("serial8250",
2755 PLAT8250_DEV_LEGACY
);
2756 if (!serial8250_isa_devs
) {
2758 goto unreg_uart_drv
;
2761 ret
= platform_device_add(serial8250_isa_devs
);
2765 serial8250_register_ports(&serial8250_reg
, &serial8250_isa_devs
->dev
);
2767 ret
= platform_driver_register(&serial8250_isa_driver
);
2771 platform_device_del(serial8250_isa_devs
);
2773 platform_device_put(serial8250_isa_devs
);
2775 uart_unregister_driver(&serial8250_reg
);
2780 static void __exit
serial8250_exit(void)
2782 struct platform_device
*isa_dev
= serial8250_isa_devs
;
2785 * This tells serial8250_unregister_port() not to re-register
2786 * the ports (thereby making serial8250_isa_driver permanently
2789 serial8250_isa_devs
= NULL
;
2791 platform_driver_unregister(&serial8250_isa_driver
);
2792 platform_device_unregister(isa_dev
);
2794 uart_unregister_driver(&serial8250_reg
);
2797 module_init(serial8250_init
);
2798 module_exit(serial8250_exit
);
2800 EXPORT_SYMBOL(serial8250_suspend_port
);
2801 EXPORT_SYMBOL(serial8250_resume_port
);
2803 MODULE_LICENSE("GPL");
2804 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2806 module_param(share_irqs
, uint
, 0644);
2807 MODULE_PARM_DESC(share_irqs
, "Share IRQs with other non-8250/16x50 devices"
2810 module_param(nr_uarts
, uint
, 0644);
2811 MODULE_PARM_DESC(nr_uarts
, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS
) ")");
2813 #ifdef CONFIG_SERIAL_8250_RSA
2814 module_param_array(probe_rsa
, ulong
, &probe_rsa_count
, 0444);
2815 MODULE_PARM_DESC(probe_rsa
, "Probe I/O ports for RSA");
2817 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR
);