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MOXA linux-2.6.x / linux-2.6.19-uc1 from UC-7110-LX-BOOTLOADER-1.9_VERSION-4.2.tgz
[linux-2.6.19-moxart.git] / drivers / net / smc9194.c
blob45b7a79ef17559996eb2d3960c44fce41308e954
1 /*------------------------------------------------------------------------
2 . smc9194.c
3 . This is a driver for SMC's 9000 series of Ethernet cards.
4 .
5 . Copyright (C) 1996 by Erik Stahlman
6 . This software may be used and distributed according to the terms
7 . of the GNU General Public License, incorporated herein by reference.
8 .
9 . "Features" of the SMC chip:
10 . 4608 byte packet memory. ( for the 91C92. Others have more )
11 . EEPROM for configuration
12 . AUI/TP selection ( mine has 10Base2/10BaseT select )
13 .
14 . Arguments:
15 . io = for the base address
16 . irq = for the IRQ
17 . ifport = 0 for autodetect, 1 for TP, 2 for AUI ( or 10base2 )
18 .
19 . author:
20 . Erik Stahlman ( erik@vt.edu )
21 . contributors:
22 . Arnaldo Carvalho de Melo <acme@conectiva.com.br>
23 .
24 . Hardware multicast code from Peter Cammaert ( pc@denkart.be )
25 .
26 . Sources:
27 . o SMC databook
28 . o skeleton.c by Donald Becker ( becker@scyld.com )
29 . o ( a LOT of advice from Becker as well )
30 .
31 . History:
32 . 12/07/95 Erik Stahlman written, got receive/xmit handled
33 . 01/03/96 Erik Stahlman worked out some bugs, actually usable!!! :-)
34 . 01/06/96 Erik Stahlman cleaned up some, better testing, etc
35 . 01/29/96 Erik Stahlman fixed autoirq, added multicast
36 . 02/01/96 Erik Stahlman 1. disabled all interrupts in smc_reset
37 . 2. got rid of post-decrementing bug -- UGH.
38 . 02/13/96 Erik Stahlman Tried to fix autoirq failure. Added more
39 . descriptive error messages.
40 . 02/15/96 Erik Stahlman Fixed typo that caused detection failure
41 . 02/23/96 Erik Stahlman Modified it to fit into kernel tree
42 . Added support to change hardware address
43 . Cleared stats on opens
44 . 02/26/96 Erik Stahlman Trial support for Kernel 1.2.13
45 . Kludge for automatic IRQ detection
46 . 03/04/96 Erik Stahlman Fixed kernel 1.3.70 +
47 . Fixed bug reported by Gardner Buchanan in
48 . smc_enable, with outw instead of outb
49 . 03/06/96 Erik Stahlman Added hardware multicast from Peter Cammaert
50 . 04/14/00 Heiko Pruessing (SMA Regelsysteme) Fixed bug in chip memory
51 . allocation
52 . 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
53 . 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
54 . 11/08/01 Matt Domsch Use common crc32 function
55 ----------------------------------------------------------------------------*/
56
57 static const char version[] =
58 "smc9194.c:v0.14 12/15/00 by Erik Stahlman (erik@vt.edu)\n";
59
60 #include <linux/module.h>
61 #include <linux/kernel.h>
62 #include <linux/sched.h>
63 #include <linux/types.h>
64 #include <linux/fcntl.h>
65 #include <linux/interrupt.h>
66 #include <linux/ptrace.h>
67 #include <linux/ioport.h>
68 #include <linux/in.h>
69 #include <linux/slab.h>
70 #include <linux/string.h>
71 #include <linux/init.h>
72 #include <linux/crc32.h>
73 #include <linux/errno.h>
74 #include <linux/netdevice.h>
75 #include <linux/etherdevice.h>
76 #include <linux/skbuff.h>
77 #include <linux/bitops.h>
78
79 #include <asm/io.h>
80
81 #include "smc9194.h"
82
83 #ifdef CONFIG_M68EZ328
84 #include <asm/MC68EZ328.h>
85 #include <asm/irq.h>
86 #include <asm/mcfsmc.h>
87 unsigned char smc_defethaddr[] = { 0x00, 0x10, 0x8b, 0xf1, 0xda, 0x01 };
88 #define NO_AUTOPROBE
89 #endif
90
91 #ifdef CONFIG_COLDFIRE
92 #include <asm/coldfire.h>
93 #include <asm/mcfsim.h>
94 #include <asm/mcfsmc.h>
95
96 unsigned char smc_defethaddr[] = { 0x00, 0xd0, 0xcf, 0x00, 0x00, 0x01 };
97
98 #define NO_AUTOPROBE
99 #endif
100
101 #ifdef CONFIG_SH_KEYWEST
102 #include <asm/keywest.h>
103 #define NO_AUTOPROBE
104 #define PHY_SETUP
105 #endif
106
107 #ifdef CONFIG_LEDMAN
108 #include <linux/ledman.h>
109 #endif
110
111 #if defined(CONFIG_CPU_H8300H) || defined(CONFIG_CPU_H8S)
112 #include <asm/h8300_smsc.h>
113 #define NO_AUTOPROBE
114 #endif
115
116 #define DRV_NAME "smc9194"
117
118 /*------------------------------------------------------------------------
119 .
120 . Configuration options, for the experienced user to change.
121 .
122 -------------------------------------------------------------------------*/
123
124 /*
125 . Do you want to use 32 bit xfers? This should work on all chips, as
126 . the chipset is designed to accommodate them.
127 */
128 #if (defined(__sh__) && !defined(CONFIG_SH_KEYWEST)) || \
129 defined(__H8300H__) || defined(__H8300S__)
130 #undef USE_32_BIT
131 #else
132 #define USE_32_BIT 1
133 #endif
134
135 #if defined(__H8300H__) || defined(__H8300S__)
136 #define NO_AUTOPROBE
137 #undef insl
138 #undef outsl
139 #define insl(a,b,l) io_insl_noswap(a,b,l)
140 #define outsl(a,b,l) io_outsl_noswap(a,b,l)
141 #endif
142
143 /*
144 .A typedef so we can change what IO looks like easily
145 */
146 typedef unsigned int smcio_t;
147
148 /*
149 .the SMC9194 can be at any of the following port addresses. To change,
150 .for a slightly different card, you can add it to the array. Keep in
151 .mind that the array must end in zero.
152 */
153 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328) || \
154 defined(CONFIG_SH_KEYWEST)
155
156 #ifdef CONFIG_NETtel
157 static smcio_t smc_portlist[] = { 0x30600300, 0x30600000, 0 };
158 static unsigned int smc_irqlist[] = { 29, 27, 0 };
159 #elif defined(CONFIG_SH_KEYWEST)
160 static smcio_t smc_portlist[] = { KEYWEST_ETHR, 0 };
161 static unsigned int smc_irqlist[] = { IRQ4_IRQ, 0 };
162 #elif defined(CONFIG_M68EZ328)
163 /* make sure that you program Port D selects to allow the interrupts! */
164 static smcio_t smc_portlist[] = { 0x2000300, 0x2000320, 0 };
165 static unsigned int smc_irqlist[] = { IRQ1_IRQ_NUM, IRQ2_IRQ_NUM, 0 };
166 #elif defined(CONFIG_CLEOPATRA)
167 static unsigned int smc_portlist[] = { 0x30600300, 0 };
168 static unsigned int smc_irqlist[] = { 29, 0 };
169 #else
170 static smcio_t smc_portlist[] = { 0x30600300, 0 };
171 static unsigned int smc_irqlist[] = { 27, 0 };
172 #endif
173
174 #elif defined(CONFIG_H8S_EDOSK2674)
175 static struct devlist smc_devlist[] __initdata = {
176 {.port = 0xf80000, .irq = 16},
177 {.port = 0, .irq = 0 },
178 };
179 #else
180 static struct devlist smc_devlist[] __initdata = {
181 {.port = 0x200, .irq = 0},
182 {.port = 0x220, .irq = 0},
183 {.port = 0x240, .irq = 0},
184 {.port = 0x260, .irq = 0},
185 {.port = 0x280, .irq = 0},
186 {.port = 0x2A0, .irq = 0},
187 {.port = 0x2C0, .irq = 0},
188 {.port = 0x2E0, .irq = 0},
189 {.port = 0x300, .irq = 0},
190 {.port = 0x320, .irq = 0},
191 {.port = 0x340, .irq = 0},
192 {.port = 0x360, .irq = 0},
193 {.port = 0x380, .irq = 0},
194 {.port = 0x3A0, .irq = 0},
195 {.port = 0x3C0, .irq = 0},
196 {.port = 0x3E0, .irq = 0},
197 {.port = 0, .irq = 0},
198 };
199 #endif
200 /*
201 . Wait time for memory to be free. This probably shouldn't be
202 . tuned that much, as waiting for this means nothing else happens
203 . in the system
204 */
205 #define MEMORY_WAIT_TIME 16
206
207 /*
208 . DEBUGGING LEVELS
209 .
210 . 0 for normal operation
211 . 1 for slightly more details
212 . >2 for various levels of increasingly useless information
213 . 2 for interrupt tracking, status flags
214 . 3 for packet dumps, etc.
215 */
216 #define SMC_DEBUG 0
217
218 #if (SMC_DEBUG > 2 )
219 #define PRINTK3(x) printk x
220 #else
221 #define PRINTK3(x)
222 #endif
223
224 #if SMC_DEBUG > 1
225 #define PRINTK2(x) printk x
226 #else
227 #define PRINTK2(x)
228 #endif
229
230 #ifdef SMC_DEBUG
231 #define PRINTK(x) printk x
232 #else
233 #define PRINTK(x)
234 #endif
235
236
237 /*------------------------------------------------------------------------
238 .
239 . The internal workings of the driver. If you are changing anything
240 . here with the SMC stuff, you should have the datasheet and known
241 . what you are doing.
242 .
243 -------------------------------------------------------------------------*/
244 #define CARDNAME "SMC9194"
245
246
247 /* store this information for the driver.. */
248 struct smc_local {
249 /*
250 these are things that the kernel wants me to keep, so users
251 can find out semi-useless statistics of how well the card is
252 performing
253 */
254 struct net_device_stats stats;
255
256 /*
257 If I have to wait until memory is available to send
258 a packet, I will store the skbuff here, until I get the
259 desired memory. Then, I'll send it out and free it.
260 */
261 struct sk_buff * saved_skb;
262
263 /*
264 . This keeps track of how many packets that I have
265 . sent out. When an TX_EMPTY interrupt comes, I know
266 . that all of these have been sent.
267 */
268 int packets_waiting;
269 };
270
271
272 /*-----------------------------------------------------------------
273 .
274 . The driver can be entered at any of the following entry points.
275 .
276 .------------------------------------------------------------------ */
277
278 /*
279 . This is called by register_netdev(). It is responsible for
280 . checking the portlist for the SMC9000 series chipset. If it finds
281 . one, then it will initialize the device, find the hardware information,
282 . and sets up the appropriate device parameters.
283 . NOTE: Interrupts are *OFF* when this procedure is called.
284 .
285 . NB:This shouldn't be static since it is referred to externally.
286 */
287 struct net_device *smc_init(int unit);
288
289 /*
290 . The kernel calls this function when someone wants to use the device,
291 . typically 'ifconfig ethX up'.
292 */
293 static int smc_open(struct net_device *dev);
294
295 /*
296 . Our watchdog timed out. Called by the networking layer
297 */
298 static void smc_timeout(struct net_device *dev);
299
300 /*
301 . This is called by the kernel in response to 'ifconfig ethX down'. It
302 . is responsible for cleaning up everything that the open routine
303 . does, and maybe putting the card into a powerdown state.
304 */
305 static int smc_close(struct net_device *dev);
306
307 /*
308 . This routine allows the proc file system to query the driver's
309 . statistics.
310 */
311 static struct net_device_stats * smc_query_statistics( struct net_device *dev);
312
313 /*
314 . Finally, a call to set promiscuous mode ( for TCPDUMP and related
315 . programs ) and multicast modes.
316 */
317 static void smc_set_multicast_list(struct net_device *dev);
318
319
320 /*---------------------------------------------------------------
321 .
322 . Interrupt level calls..
323 .
324 ----------------------------------------------------------------*/
325
326 /*
327 . Handles the actual interrupt
328 */
329 static irqreturn_t smc_interrupt(int irq, void *);
330 /*
331 . This is a separate procedure to handle the receipt of a packet, to
332 . leave the interrupt code looking slightly cleaner
333 */
334 static inline void smc_rcv( struct net_device *dev );
335 /*
336 . This handles a TX interrupt, which is only called when an error
337 . relating to a packet is sent.
338 */
339 static inline void smc_tx( struct net_device * dev );
340
341 /*
342 ------------------------------------------------------------
343 .
344 . Internal routines
345 .
346 ------------------------------------------------------------
347 */
348
349 /*
350 . Test if a given location contains a chip, trying to cause as
351 . little damage as possible if it's not a SMC chip.
352 */
353 static int smc_probe(struct net_device *dev, smcio_t ioaddr);
354
355 /*
356 . A rather simple routine to print out a packet for debugging purposes.
357 */
358 #if SMC_DEBUG > 2
359 static void print_packet( byte *, int );
360 #endif
361
362 #define tx_done(dev) 1
363
364 /* this is called to actually send the packet to the chip */
365 static void smc_hardware_send_packet( struct net_device * dev );
366
367 /* Since I am not sure if I will have enough room in the chip's ram
368 . to store the packet, I call this routine, which either sends it
369 . now, or generates an interrupt when the card is ready for the
370 . packet */
371 static int smc_wait_to_send_packet( struct sk_buff * skb, struct net_device *dev );
372
373 /* this does a soft reset on the device */
374 static void smc_reset( smcio_t ioaddr );
375
376 /* Enable Interrupts, Receive, and Transmit */
377 static void smc_enable( smcio_t ioaddr );
378
379 /* this puts the device in an inactive state */
380 static void smc_shutdown( smcio_t ioaddr );
381
382 #ifndef NO_AUTOPROBE
383 /* This routine will find the IRQ of the driver if one is not
384 . specified in the input to the device. */
385 static int smc_findirq( smcio_t ioaddr );
386 #endif
387
388 #ifdef PHY_SETUP
389 static void clkmdio(smcio_t ioaddr, unsigned int MGMTData);
390 static unsigned PHYAccess(smcio_t ioaddr, unsigned char PHYAdd,
391 unsigned char RegAdd, unsigned char OPCode, unsigned wData);
392 static unsigned char DetectPHY(smcio_t ioaddr, unsigned long *OUI,
393 unsigned char *Model, unsigned char *Revision);
394 static int setup_phy(smcio_t ioaddr);
395 #endif
396
397 /*
398 . Function: smc_reset( smcio_t ioaddr )
399 . Purpose:
400 . This sets the SMC91xx chip to its normal state, hopefully from whatever
401 . mess that any other DOS driver has put it in.
402 .
403 . Maybe I should reset more registers to defaults in here? SOFTRESET should
404 . do that for me.
405 .
406 . Method:
407 . 1. send a SOFT RESET
408 . 2. wait for it to finish
409 . 3. enable autorelease mode
410 . 4. reset the memory management unit
411 . 5. clear all interrupts
412 .
413 */
414 static void smc_reset( smcio_t ioaddr )
415 {
416 /* This resets the registers mostly to defaults, but doesn't
417 affect EEPROM. That seems unnecessary */
418 SMC_SELECT_BANK( 0 );
419 outw( RCR_SOFTRESET, ioaddr + RCR );
420
421 /* this should pause enough for the chip to be happy */
422 SMC_DELAY( );
423
424 /* Set the transmit and receive configuration registers to
425 default values */
426 outw( RCR_CLEAR, ioaddr + RCR );
427 outw( TCR_CLEAR, ioaddr + TCR );
428
429 /* set the control register to automatically
430 release successfully transmitted packets, to make the best
431 use out of our limited memory */
432 SMC_SELECT_BANK( 1 );
433 outw( inw( ioaddr + CONTROL ) | CTL_AUTO_RELEASE , ioaddr + CONTROL );
434
435 #if defined(CONFIG_LEDMAN) && defined(CONFIG_SNAPGEAR)
436 outw( inw( ioaddr + CONTROL ) | CTL_LE_ENABLE , ioaddr + CONTROL );
437 #endif
438
439 /* Reset the MMU */
440 SMC_SELECT_BANK( 2 );
441 outw( MC_RESET, ioaddr + MMU_CMD );
442
443 /* Note: It doesn't seem that waiting for the MMU busy is needed here,
444 but this is a place where future chipsets _COULD_ break. Be wary
445 of issuing another MMU command right after this */
446
447 SMC_SET_INT( 0 );
448 }
449
450 /*
451 . Function: smc_enable
452 . Purpose: let the chip talk to the outside work
453 . Method:
454 . 1. Enable the transmitter
455 . 2. Enable the receiver
456 . 3. Enable interrupts
457 */
458 static void smc_enable( smcio_t ioaddr )
459 {
460 SMC_SELECT_BANK( 0 );
461 /* see the header file for options in TCR/RCR NORMAL*/
462 outw( TCR_NORMAL, ioaddr + TCR );
463 outw( RCR_NORMAL, ioaddr + RCR );
464
465 /* now, enable interrupts */
466 SMC_SELECT_BANK( 2 );
467 SMC_SET_INT( SMC_INTERRUPT_MASK );
468 }
469
470 /*
471 . Function: smc_shutdown
472 . Purpose: closes down the SMC91xxx chip.
473 . Method:
474 . 1. zero the interrupt mask
475 . 2. clear the enable receive flag
476 . 3. clear the enable xmit flags
477 .
478 . TODO:
479 . (1) maybe utilize power down mode.
480 . Why not yet? Because while the chip will go into power down mode,
481 . the manual says that it will wake up in response to any I/O requests
482 . in the register space. Empirical results do not show this working.
483 */
484 static void smc_shutdown( smcio_t ioaddr )
485 {
486 /* no more interrupts for me */
487 SMC_SELECT_BANK( 2 );
488 SMC_SET_INT( 0 );
489
490 /* and tell the card to stay away from that nasty outside world */
491 SMC_SELECT_BANK( 0 );
492 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
493 outw( RCR_CLEAR, ioaddr + RCR );
494 outw( TCR_CLEAR, ioaddr + TCR );
495 #else
496 outb( RCR_CLEAR, ioaddr + RCR );
497 outb( TCR_CLEAR, ioaddr + TCR );
498 #endif /* CONFIG_COLDFIRE */
499 #if 0
500 /* finally, shut the chip down */
501 SMC_SELECT_BANK( 1 );
502 outw( inw( ioaddr + CONTROL ), CTL_POWERDOWN, ioaddr + CONTROL );
503 #endif
504 }
505
506
507 /*
508 . Function: smc_setmulticast( smcio_t ioaddr, int count, dev_mc_list * adds )
509 . Purpose:
510 . This sets the internal hardware table to filter out unwanted multicast
511 . packets before they take up memory.
512 .
513 . The SMC chip uses a hash table where the high 6 bits of the CRC of
514 . address are the offset into the table. If that bit is 1, then the
515 . multicast packet is accepted. Otherwise, it's dropped silently.
516 .
517 . To use the 6 bits as an offset into the table, the high 3 bits are the
518 . number of the 8 bit register, while the low 3 bits are the bit within
519 . that register.
520 .
521 . This routine is based very heavily on the one provided by Peter Cammaert.
522 */
523
524
525 static void smc_setmulticast( smcio_t ioaddr, int count, struct dev_mc_list * addrs ) {
526 int i;
527 unsigned char multicast_table[ 8 ];
528 struct dev_mc_list * cur_addr;
529 /* table for flipping the order of 3 bits */
530 unsigned char invert3[] = { 0, 4, 2, 6, 1, 5, 3, 7 };
531
532 /* start with a table of all zeros: reject all */
533 memset( multicast_table, 0, sizeof( multicast_table ) );
534
535 cur_addr = addrs;
536 for ( i = 0; i < count ; i ++, cur_addr = cur_addr->next ) {
537 int position;
538
539 /* do we have a pointer here? */
540 if ( !cur_addr )
541 break;
542 /* make sure this is a multicast address - shouldn't this
543 be a given if we have it here ? */
544 if ( !( *cur_addr->dmi_addr & 1 ) )
545 continue;
546
547 /* only use the low order bits */
548 position = ether_crc_le(6, cur_addr->dmi_addr) & 0x3f;
549
550 /* do some messy swapping to put the bit in the right spot */
551 multicast_table[invert3[position&7]] |=
552 (1<<invert3[(position>>3)&7]);
553
554 }
555 /* now, the table can be loaded into the chipset */
556 SMC_SELECT_BANK( 3 );
557
558 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
559 for ( i = 0; i < 8 ; i += 2 ) {
560 outw(((multicast_table[i+1]<<8)+(multicast_table[i])), ioaddr+MULTICAST1+i );
561 }
562 #else
563 for ( i = 0; i < 8 ; i++ ) {
564 outb( multicast_table[i], ioaddr + MULTICAST1 + i );
565 }
566 #endif
567 }
568
569
570 /*
571 . Function: smc_wait_to_send_packet( struct sk_buff * skb, struct net_device * )
572 . Purpose:
573 . Attempt to allocate memory for a packet, if chip-memory is not
574 . available, then tell the card to generate an interrupt when it
575 . is available.
576 .
577 . Algorithm:
578 .
579 . o if the saved_skb is not currently null, then drop this packet
580 . on the floor. This should never happen, because of TBUSY.
581 . o if the saved_skb is null, then replace it with the current packet,
582 . o See if I can sending it now.
583 . o (NO): Enable interrupts and let the interrupt handler deal with it.
584 . o (YES):Send it now.
585 */
586 static int smc_wait_to_send_packet( struct sk_buff * skb, struct net_device * dev )
587 {
588 struct smc_local *lp = netdev_priv(dev);
589 unsigned int ioaddr = dev->base_addr;
590 word length;
591 unsigned short numPages;
592 word time_out;
593
594 netif_stop_queue(dev);
595 /* Well, I want to send the packet.. but I don't know
596 if I can send it right now... */
597
598 if ( lp->saved_skb) {
599 /* THIS SHOULD NEVER HAPPEN. */
600 lp->stats.tx_aborted_errors++;
601 printk(CARDNAME": Bad Craziness - sent packet while busy.\n" );
602 return 1;
603 }
604 lp->saved_skb = skb;
605
606 length = skb->len;
607
608 if (length < ETH_ZLEN) {
609 if (skb_padto(skb, ETH_ZLEN)) {
610 netif_wake_queue(dev);
611 return 0;
612 }
613 length = ETH_ZLEN;
614 }
615
616 /*
617 ** The MMU wants the number of pages to be the number of 256 bytes
618 ** 'pages', minus 1 ( since a packet can't ever have 0 pages :) )
619 **
620 ** Pkt size for allocating is data length +6 (for additional status words,
621 ** length and ctl!) If odd size last byte is included in this header.
622 */
623 numPages = ((length & 0xfffe) + 6) / 256;
624
625 if (numPages > 7 ) {
626 printk(CARDNAME": Far too big packet error. \n");
627 /* freeing the packet is a good thing here... but should
628 . any packets of this size get down here? */
629 dev_kfree_skb (skb);
630 lp->saved_skb = NULL;
631 /* this IS an error, but, i don't want the skb saved */
632 netif_wake_queue(dev);
633 return 0;
634 }
635 /* either way, a packet is waiting now */
636 lp->packets_waiting++;
637
638 /* now, try to allocate the memory */
639 SMC_SELECT_BANK( 2 );
640 outw( MC_ALLOC | numPages, ioaddr + MMU_CMD );
641 /*
642 . Performance Hack
643 .
644 . wait a short amount of time.. if I can send a packet now, I send
645 . it now. Otherwise, I enable an interrupt and wait for one to be
646 . available.
647 .
648 . I could have handled this a slightly different way, by checking to
649 . see if any memory was available in the FREE MEMORY register. However,
650 . either way, I need to generate an allocation, and the allocation works
651 . no matter what, so I saw no point in checking free memory.
652 */
653 time_out = MEMORY_WAIT_TIME;
654 do {
655 word status;
656
657 status = inb( ioaddr + INTERRUPT );
658 if ( status & IM_ALLOC_INT ) {
659 /* acknowledge the interrupt */
660 SMC_ACK_INT( IM_ALLOC_INT );
661 break;
662 }
663 } while ( -- time_out );
664
665 if ( !time_out ) {
666 /* oh well, wait until the chip finds memory later */
667 SMC_ENABLE_INT( IM_ALLOC_INT );
668 PRINTK2((CARDNAME": memory allocation deferred. \n"));
669 /* it's deferred, but I'll handle it later */
670 return 0;
671 }
672 /* or YES! I can send the packet now.. */
673 smc_hardware_send_packet(dev);
674 netif_wake_queue(dev);
675 return 0;
676 }
677
678 /*
679 . Function: smc_hardware_send_packet(struct net_device * )
680 . Purpose:
681 . This sends the actual packet to the SMC9xxx chip.
682 .
683 . Algorithm:
684 . First, see if a saved_skb is available.
685 . ( this should NOT be called if there is no 'saved_skb'
686 . Now, find the packet number that the chip allocated
687 . Point the data pointers at it in memory
688 . Set the length word in the chip's memory
689 . Dump the packet to chip memory
690 . Check if a last byte is needed ( odd length packet )
691 . if so, set the control flag right
692 . Tell the card to send it
693 . Enable the transmit interrupt, so I know if it failed
694 . Free the kernel data if I actually sent it.
695 */
696 static void smc_hardware_send_packet( struct net_device * dev )
697 {
698 struct smc_local *lp = netdev_priv(dev);
699 byte packet_no;
700 struct sk_buff * skb = lp->saved_skb;
701 word length;
702 smcio_t ioaddr;
703 byte * buf;
704
705 ioaddr = dev->base_addr;
706
707 if ( !skb ) {
708 PRINTK((CARDNAME": In XMIT with no packet to send \n"));
709 return;
710 }
711 length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
712 buf = skb->data;
713
714 /* If I get here, I _know_ there is a packet slot waiting for me */
715 packet_no = inb( ioaddr + PNR_ARR + 1 );
716 if ( packet_no & 0x80 ) {
717 /* or isn't there? BAD CHIP! */
718 printk(KERN_DEBUG CARDNAME": Memory allocation failed. \n");
719 dev_kfree_skb_any(skb);
720 lp->saved_skb = NULL;
721 netif_wake_queue(dev);
722 return;
723 }
724
725 /* we have a packet address, so tell the card to use it */
726 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
727 outw( packet_no, ioaddr + PNR_ARR );
728 #else
729 outb( packet_no, ioaddr + PNR_ARR );
730 #endif
731
732 /* point to the beginning of the packet */
733 outw( PTR_AUTOINC , ioaddr + POINTER );
734
735 PRINTK3((CARDNAME": Trying to xmit packet of length %x\n", length ));
736 #if SMC_DEBUG > 2
737 print_packet( buf, length );
738 #endif
739
740 /* send the packet length ( +6 for status, length and ctl byte )
741 and the status word ( set to zeros ) */
742
743 #ifdef USE_32_BIT
744 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
745 outl( (length +6 ) , ioaddr + DATA_1 );
746 #else
747 outl( (length +6 ) << 16 , ioaddr + DATA_1 );
748 #endif
749 #else
750 outw( 0, ioaddr + DATA_1 );
751 /* send the packet length ( +6 for status words, length, and ctl*/
752 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328) || defined(CONFIG_CPU_H8S)
753 outw( (length+6) & 0xFFFF, ioaddr + DATA_1 );
754 #else
755 outb( (length+6) & 0xFF,ioaddr + DATA_1 );
756 outb( (length+6) >> 8 , ioaddr + DATA_1 );
757 #endif
758 #endif
759
760 /* send the actual data
761 . I _think_ it's faster to send the longs first, and then
762 . mop up by sending the last word. It depends heavily
763 . on alignment, at least on the 486. Maybe it would be
764 . a good idea to check which is optimal? But that could take
765 . almost as much time as is saved?
766 */
767 #ifdef USE_32_BIT
768 if ( length & 0x2 ) {
769 outsl(ioaddr + DATA_1, buf, length >> 2 );
770 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
771 outwd( *((word *)(buf + (length & 0xFFFFFFFC))),ioaddr +DATA_1);
772 #elif !defined(__H8300H__) && !defined(__H8300S__)
773 outw( *((word *)(buf + (length & 0xFFFFFFFC))),ioaddr +DATA_1);
774 #else
775 ctrl_outw( *((word *)(buf + (length & 0xFFFFFFFC))),ioaddr +DATA_1);
776 #endif
777 }
778 else
779 outsl(ioaddr + DATA_1, buf, length >> 2 );
780 #else
781 outsw(ioaddr + DATA_1 , buf, (length ) >> 1);
782 #endif
783 /* Send the last byte, if there is one. */
784
785 if ( (length & 1) == 0 ) {
786 outw( 0, ioaddr + DATA_1 );
787 } else {
788 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
789 outw( buf[length -1 ] | (0x20 << 8), ioaddr + DATA_1);
790 #else
791 outb( buf[length -1 ], ioaddr + DATA_1 );
792 outb( 0x20, ioaddr + DATA_1);
793 #endif
794 }
795
796 /* enable the interrupts */
797 SMC_ENABLE_INT( (IM_TX_INT | IM_TX_EMPTY_INT) );
798
799 /* and let the chipset deal with it */
800 outw( MC_ENQUEUE , ioaddr + MMU_CMD );
801
802 PRINTK2((CARDNAME": Sent packet of length %d \n",length));
803
804 lp->saved_skb = NULL;
805 dev_kfree_skb_any (skb);
806
807 dev->trans_start = jiffies;
808
809 /* we can send another packet */
810 netif_wake_queue(dev);
811
812 return;
813 }
814
815 /*-------------------------------------------------------------------------
816 |
817 | smc_init(int unit)
818 | Input parameters:
819 | dev->base_addr == 0, try to find all possible locations
820 | dev->base_addr == 1, return failure code
821 | dev->base_addr == 2, always allocate space, and return success
822 | dev->base_addr == <anything else> this is the address to check
823 |
824 | Output:
825 | pointer to net_device or ERR_PTR(error)
826 |
827 ---------------------------------------------------------------------------
828 */
829 static int io;
830 static int irq;
831 static int ifport;
832
833 struct net_device * __init smc_init(int unit)
834 {
835 struct net_device *dev = alloc_etherdev(sizeof(struct smc_local));
836 struct devlist *smcdev = smc_devlist;
837 int err = 0;
838
839 if (!dev)
840 return ERR_PTR(-ENODEV);
841
842 if (unit >= 0) {
843 sprintf(dev->name, "eth%d", unit);
844 netdev_boot_setup_check(dev);
845 io = dev->base_addr;
846 irq = dev->irq;
847 }
848
849 SET_MODULE_OWNER(dev);
850
851 if (io > 0x1ff) { /* Check a single specified location. */
852 err = smc_probe(dev, io);
853 } else if (io != 0) { /* Don't probe at all. */
854 err = -ENXIO;
855 } else {
856 for (port = smc_portlist; *port; port++) {
857 #ifdef CONFIG_NETtel
858 smc_remap(port);
859 #endif
860 if (smc_probe(dev, *port) == 0)
861 break;
862 }
863 if (!smcdev->port)
864 err = -ENODEV;
865 }
866 if (err)
867 goto out;
868 err = register_netdev(dev);
869 if (err)
870 goto out1;
871 return dev;
872 out1:
873 free_irq(dev->irq, dev);
874 release_region(dev->base_addr, SMC_IO_EXTENT);
875 out:
876 free_netdev(dev);
877 return ERR_PTR(err);
878 }
879
880 /*----------------------------------------------------------------------
881 . smc_findirq
882 .
883 . This routine has a simple purpose -- make the SMC chip generate an
884 . interrupt, so an auto-detect routine can detect it, and find the IRQ,
885 ------------------------------------------------------------------------
886 */
887 #ifndef NO_AUTOPROBE
888 int __init smc_findirq( smcio_t ioaddr )
889 {
890 #ifndef NO_AUTOPROBE
891 int timeout = 20;
892 unsigned long cookie;
893
894
895 #if 0
896 /* I have to do a STI() here, because this is called from
897 a routine that does an CLI during this process, making it
898 rather difficult to get interrupts for auto detection */
899 sti();
900 #endif
901
902 cookie = probe_irq_on();
903
904 /*
905 * What I try to do here is trigger an ALLOC_INT. This is done
906 * by allocating a small chunk of memory, which will give an interrupt
907 * when done.
908 */
909
910
911 SMC_SELECT_BANK(2);
912 /* enable ALLOCation interrupts ONLY */
913 SMC_SET_INT( IM_ALLOC_INT );
914
915 /*
916 . Allocate 512 bytes of memory. Note that the chip was just
917 . reset so all the memory is available
918 */
919 outw( MC_ALLOC | 1, ioaddr + MMU_CMD );
920
921 /*
922 . Wait until positive that the interrupt has been generated
923 */
924 while ( timeout ) {
925 byte int_status;
926
927 int_status = inb( ioaddr + INTERRUPT );
928
929 if ( int_status & IM_ALLOC_INT )
930 break; /* got the interrupt */
931 timeout--;
932 }
933 /* there is really nothing that I can do here if timeout fails,
934 as probe_irq_off will return a 0 anyway, which is what I
935 want in this case. Plus, the clean up is needed in both
936 cases. */
937
938 /* DELAY HERE!
939 On a fast machine, the status might change before the interrupt
940 is given to the processor. This means that the interrupt was
941 never detected, and probe_irq_off fails to report anything.
942 This should fix probe_irq_* problems.
943 */
944 SMC_DELAY();
945 SMC_DELAY();
946
947 /* and disable all interrupts again */
948 SMC_SET_INT( 0 );
949
950 #if 0
951 /* clear hardware interrupts again, because that's how it
952 was when I was called... */
953 cli();
954 #endif
955
956 /* and return what I found */
957 return probe_irq_off(cookie);
958 #else /* NO_AUTOPROBE */
959 struct devlist *smcdev;
960 for (smcdev = smc_devlist; smcdev->port; smcdev++) {
961 if (smcdev->port == ioaddr)
962 return smcdev->irq;
963 }
964 return 0;
965 #endif
966 }
967 #endif /* NO_AUTOPROBE */
968
969 /*----------------------------------------------------------------------
970 . Function: smc_probe( smcio_t ioaddr )
971 .
972 . Purpose:
973 . Tests to see if a given ioaddr points to an SMC9xxx chip.
974 . Returns a 0 on success
975 .
976 . Algorithm:
977 . (1) see if the high byte of BANK_SELECT is 0x33
978 . (2) compare the ioaddr with the base register's address
979 . (3) see if I recognize the chip ID in the appropriate register
980 .
981 .---------------------------------------------------------------------
982 */
983
984 /*---------------------------------------------------------------
985 . Here I do typical initialization tasks.
986 .
987 . o Initialize the structure if needed
988 . o print out my vanity message if not done so already
989 . o print out what type of hardware is detected
990 . o print out the ethernet address
991 . o find the IRQ
992 . o set up my private data
993 . o configure the dev structure with my subroutines
994 . o actually GRAB the irq.
995 . o GRAB the region
996 .-----------------------------------------------------------------
997 */
998 static int __init smc_probe(struct net_device *dev, smcio_t ioaddr)
999 {
1000 int i, memory, retval;
1001 static unsigned version_printed;
1002 unsigned int bank;
1003 #if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || defined(CONFIG_DISKtel) || defined(CONFIG_CLEOPATRA)
1004 static int nr = 0;
1005 #endif
1006 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
1007 unsigned char *ep;
1008 #endif
1009
1010 const char *version_string;
1011 const char *if_string;
1012
1013 /* registers */
1014 word revision_register;
1015 word base_address_register;
1016 word configuration_register;
1017 word memory_info_register;
1018 word memory_cfg_register;
1019
1020 #if !defined(CONFIG_COLDFIRE) && !defined(CONFIG_M68EZ328) && \
1021 !defined(CONFIG_CPU_H8300H) && !defined(CONFIG_CPU_H8S)
1022 /* Grab the region so that no one else tries to probe our ioports. */
1023 if (!request_region(ioaddr, SMC_IO_EXTENT, DRV_NAME))
1024 return -EBUSY;
1025 #elif defined(CONFIG_COLDFIRE)
1026 /*
1027 * We need to put the SMC into 68k mode.
1028 * Do a write before anything else.
1029 */
1030 outw(0, ioaddr + BANK_SELECT);
1031 #endif
1032
1033 dev->irq = irq;
1034 dev->if_port = ifport;
1035
1036 /* First, see if the high byte is 0x33 */
1037 bank = inw( ioaddr + BANK_SELECT );
1038 if ( (bank & 0xFF00) != 0x3300 ) {
1039 retval = -ENODEV;
1040 goto err_out;
1041 }
1042 /* The above MIGHT indicate a device, but I need to write to further
1043 test this. */
1044 outw( 0x0, ioaddr + BANK_SELECT );
1045 bank = inw( ioaddr + BANK_SELECT );
1046 if ( (bank & 0xFF00 ) != 0x3300 ) {
1047 retval = -ENODEV;
1048 goto err_out;
1049 }
1050 /* well, we've already written once, so hopefully another time won't
1051 hurt. This time, I need to switch the bank register to bank 1,
1052 so I can access the base address register */
1053 #if !defined(CONFIG_CPU_H8300H) && !defined(CONFIG_CPU_H8S)
1054 SMC_SELECT_BANK(1);
1055 base_address_register = inw( ioaddr + BASE );
1056 if ( (ioaddr & 0x3E0) != ( base_address_register >> 3 & 0x3E0 ) ) {
1057 printk(CARDNAME ": IOADDR %x doesn't match configuration (%x)."
1058 "Probably not a SMC chip\n",
1059 ioaddr, base_address_register >> 3 & 0x3E0 );
1060 /* well, the base address register didn't match. Must not have
1061 been a SMC chip after all. */
1062 retval = -ENODEV;
1063 goto err_out;
1064 }
1065 #else
1066 (void)base_address_register; /* Warning suppression */
1067 #endif
1068
1069 /* check if the revision register is something that I recognize.
1070 These might need to be added to later, as future revisions
1071 could be added. */
1072 SMC_SELECT_BANK(3);
1073 revision_register = inw( ioaddr + REVISION );
1074 if ( !chip_ids[ ( revision_register >> 4 ) & 0xF ] ) {
1075 /* I don't recognize this chip, so... */
1076 printk(CARDNAME ": IO %x: Unrecognized revision register:"
1077 " %x, Contact author. \n", ioaddr, revision_register );
1078
1079 retval = -ENODEV;
1080 goto err_out;
1081 }
1082
1083 /* at this point I'll assume that the chip is an SMC9xxx.
1084 It might be prudent to check a listing of MAC addresses
1085 against the hardware address, or do some other tests. */
1086 if (version_printed++ == 0)
1087 printk("%s", version);
1088
1089 /* fill in some of the fields */
1090 dev->base_addr = ioaddr;
1091
1092 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
1093 #if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || defined(CONFIG_DISKtel) || defined(CONFIG_CLEOPATRA)
1094 /*
1095 . MAC address should be in FLASH, check that it is valid.
1096 . If good use it, otherwise use the default.
1097 */
1098 ep = (unsigned char *) (0xf0006000 + (nr++ * 6));
1099 if ((ep[0] == 0xff) && (ep[1] == 0xff) && (ep[2] == 0xff) &&
1100 (ep[3] == 0xff) && (ep[4] == 0xff) && (ep[5] == 0xff))
1101 ep = (unsigned char *) &smc_defethaddr[0];
1102 else if ((ep[0] == 0) && (ep[1] == 0) && (ep[2] == 0) &&
1103 (ep[3] == 0) && (ep[4] == 0) && (ep[5] == 0))
1104 ep = (unsigned char *) &smc_defethaddr[0];
1105 #else
1106 ep = (unsigned char *) &smc_defethaddr[0];
1107 #endif
1108 #endif
1109
1110 /*
1111 . Get the MAC address ( bank 1, regs 4 - 9 )
1112 */
1113 SMC_SELECT_BANK( 1 );
1114 for ( i = 0; i < 6; i += 2 ) {
1115 word address;
1116
1117 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
1118 dev->dev_addr[ i ] = ep[ i ];
1119 dev->dev_addr[ i + 1 ] = ep[ i + 1 ];
1120 address = (((word) ep[ i ]) << 8) | ep[ i + 1 ];
1121 outw( address, ioaddr + ADDR0 + i);
1122 #else
1123 address = inw( ioaddr + ADDR0 + i );
1124 dev->dev_addr[ i + 1] = address >> 8;
1125 dev->dev_addr[ i ] = address & 0xFF;
1126 #endif
1127 }
1128
1129 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
1130 /* HACK: to support 2 ethernets when using default address! */
1131 smc_defethaddr[5]++;
1132 #endif
1133
1134 /* get the memory information */
1135
1136 SMC_SELECT_BANK( 0 );
1137 memory_info_register = inw( ioaddr + MIR );
1138 memory_cfg_register = inw( ioaddr + MCR );
1139 memory = ( memory_cfg_register >> 9 ) & 0x7; /* multiplier */
1140 memory *= 256 * ( memory_info_register & 0xFF );
1141
1142 /*
1143 Now, I want to find out more about the chip. This is sort of
1144 redundant, but it's cleaner to have it in both, rather than having
1145 one VERY long probe procedure.
1146 */
1147 SMC_SELECT_BANK(3);
1148 revision_register = inw( ioaddr + REVISION );
1149 version_string = chip_ids[ ( revision_register >> 4 ) & 0xF ];
1150 if ( !version_string ) {
1151 /* I shouldn't get here because this call was done before.... */
1152 retval = -ENODEV;
1153 goto err_out;
1154 }
1155
1156 /* is it using AUI or 10BaseT ? */
1157 if ( dev->if_port == 0 ) {
1158 SMC_SELECT_BANK(1);
1159 configuration_register = inw( ioaddr + CONFIG );
1160 if ( configuration_register & CFG_AUI_SELECT )
1161 dev->if_port = 2;
1162 else
1163 dev->if_port = 1;
1164 }
1165 if_string = interfaces[ dev->if_port - 1 ];
1166
1167 /* now, reset the chip, and put it into a known state */
1168 smc_reset( ioaddr );
1169
1170 /*
1171 . If dev->irq is 0, then the device has to be banged on to see
1172 . what the IRQ is.
1173 .
1174 . This banging doesn't always detect the IRQ, for unknown reasons.
1175 . a workaround is to reset the chip and try again.
1176 .
1177 . Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1178 . be what is requested on the command line. I don't do that, mostly
1179 . because the card that I have uses a non-standard method of accessing
1180 . the IRQs, and because this _should_ work in most configurations.
1181 .
1182 . Specifying an IRQ is done with the assumption that the user knows
1183 . what (s)he is doing. No checking is done!!!!
1184 .
1185 */
1186 #ifndef NO_AUTOPROBE
1187 if ( dev->irq < 2 ) {
1188 int trials;
1189
1190 trials = 3;
1191 while ( trials-- ) {
1192 dev->irq = smc_findirq( ioaddr );
1193 if ( dev->irq )
1194 break;
1195 /* kick the card and try again */
1196 smc_reset( ioaddr );
1197 }
1198 }
1199 if (dev->irq == 0 ) {
1200 printk(CARDNAME": Couldn't autodetect your IRQ. Use irq=xx.\n");
1201 retval = -ENODEV;
1202 goto err_out;
1203 }
1204 #else
1205 if (dev->irq == 0 ) {
1206 printk(CARDNAME
1207 ": Autoprobing IRQs is not supported for this configuration.\n");
1208 return -ENODEV;
1209 }
1210 #endif
1211
1212 /* now, print out the card info, in a short format.. */
1213
1214 printk("%s: %s(r:%d) at %#3x IRQ:%d INTF:%s MEM:%db ", dev->name,
1215 version_string, revision_register & 0xF, ioaddr, dev->irq,
1216 if_string, memory );
1217 /*
1218 . Print the Ethernet address
1219 */
1220 printk("ADDR: ");
1221 for (i = 0; i < 5; i++)
1222 printk("%2.2x:", dev->dev_addr[i] );
1223 printk("%2.2x \n", dev->dev_addr[5] );
1224
1225 /* set the private data to zero by default */
1226 memset(dev->priv, 0, sizeof(struct smc_local));
1227
1228 /* Grab the IRQ */
1229 #ifdef CONFIG_COLDFIRE
1230 mcf_autovector(dev->irq);
1231 retval = request_irq(dev->irq, &smc_interrupt, 0, dev->name, dev);
1232 #elif defined(CONFIG_M68EZ328) && !defined(CONFIG_CWEZ328) && !defined(CONFIG_CWVZ328)
1233 retval = request_irq(IRQ_MACHSPEC | dev->irq, &smc_interrupt,
1234 IRQ_FLG_STD, dev->name, dev);
1235 if (retval) panic("Unable to attach Lan91C96 intr\n");
1236 #else
1237 retval = request_irq(dev->irq, &smc_interrupt, 0, DRV_NAME, dev);
1238 #endif
1239 if (retval) {
1240 printk("%s: unable to get IRQ %d (irqval=%d).\n", dev->name,
1241 dev->irq, retval);
1242 goto err_out;
1243 }
1244
1245 dev->open = smc_open;
1246 dev->stop = smc_close;
1247 dev->hard_start_xmit = smc_wait_to_send_packet;
1248 dev->tx_timeout = smc_timeout;
1249 dev->watchdog_timeo = HZ/20;
1250 dev->get_stats = smc_query_statistics;
1251 dev->set_multicast_list = smc_set_multicast_list;
1252
1253 #ifdef PHY_SETUP
1254 setup_phy( ioaddr );
1255 #endif
1256 return 0;
1257
1258 err_out:
1259 release_region(ioaddr, SMC_IO_EXTENT);
1260 return retval;
1261 }
1262
1263 #if SMC_DEBUG > 2
1264 static void print_packet( byte * buf, int length )
1265 {
1266 #if 0
1267 int i;
1268 int remainder;
1269 int lines;
1270
1271 printk("Packet of length %d \n", length );
1272 lines = length / 16;
1273 remainder = length % 16;
1274
1275 for ( i = 0; i < lines ; i ++ ) {
1276 int cur;
1277
1278 for ( cur = 0; cur < 8; cur ++ ) {
1279 byte a, b;
1280
1281 a = *(buf ++ );
1282 b = *(buf ++ );
1283 printk("%02x%02x ", a, b );
1284 }
1285 printk("\n");
1286 }
1287 for ( i = 0; i < remainder/2 ; i++ ) {
1288 byte a, b;
1289
1290 a = *(buf ++ );
1291 b = *(buf ++ );
1292 printk("%02x%02x ", a, b );
1293 }
1294 printk("\n");
1295 #endif
1296 }
1297 #endif
1298
1299
1300 /*
1301 * Open and Initialize the board
1302 *
1303 * Set up everything, reset the card, etc ..
1304 *
1305 */
1306 static int smc_open(struct net_device *dev)
1307 {
1308 smcio_t ioaddr = dev->base_addr;
1309
1310 int i; /* used to set hw ethernet address */
1311
1312 /* clear out all the junk that was put here before... */
1313 memset(dev->priv, 0, sizeof(struct smc_local));
1314
1315 /* reset the hardware */
1316
1317 smc_reset( ioaddr );
1318 smc_enable( ioaddr );
1319
1320 /* Select which interface to use */
1321
1322 SMC_SELECT_BANK( 1 );
1323 #if defined(CONFIG_DISKtel) || defined(CONFIG_SH_KEYWEST)
1324 /* Setup to use external PHY on smc91c110 */
1325 outw( inw( ioaddr + CONFIG ) | CFG_NO_WAIT | CFG_MII_SELECT,
1326 (ioaddr + CONFIG ));
1327 #else
1328 if ( dev->if_port == 1 ) {
1329 outw( inw( ioaddr + CONFIG ) & ~CFG_AUI_SELECT,
1330 ioaddr + CONFIG );
1331 }
1332 else if ( dev->if_port == 2 ) {
1333 outw( inw( ioaddr + CONFIG ) | CFG_AUI_SELECT,
1334 ioaddr + CONFIG );
1335 }
1336 #endif
1337
1338 /*
1339 According to Becker, I have to set the hardware address
1340 at this point, because the (l)user can set it with an
1341 ioctl. Easily done...
1342 */
1343 SMC_SELECT_BANK( 1 );
1344 for ( i = 0; i < 6; i += 2 ) {
1345 word address;
1346
1347 address = dev->dev_addr[ i + 1 ] << 8 ;
1348 address |= dev->dev_addr[ i ];
1349 outw( address, ioaddr + ADDR0 + i );
1350 }
1351
1352 netif_start_queue(dev);
1353
1354 #if defined(CONFIG_LEDMAN) && defined(CONFIG_SNAPGEAR)
1355 /*
1356 * fix the link status LED's
1357 */
1358 SMC_SELECT_BANK( 0 );
1359 ledman_cmd((inw(ioaddr + EPH_STATUS) & ES_LINK_OK) == ES_LINK_OK ?
1360 LEDMAN_CMD_ON : LEDMAN_CMD_OFF,
1361 strcmp(dev->name, "eth0") ?
1362 LEDMAN_LAN2_LINK : LEDMAN_LAN1_LINK);
1363 #endif
1364
1365 return 0;
1366 }
1367
1368 /*--------------------------------------------------------
1369 . Called by the kernel to send a packet out into the void
1370 . of the net. This routine is largely based on
1371 . skeleton.c, from Becker.
1372 .--------------------------------------------------------
1373 */
1374
1375 static void smc_timeout(struct net_device *dev)
1376 {
1377 /* If we get here, some higher level has decided we are broken.
1378 There should really be a "kick me" function call instead. */
1379 printk(KERN_WARNING CARDNAME": transmit timed out, %s?\n",
1380 tx_done(dev) ? "IRQ conflict" :
1381 "network cable problem");
1382 /* "kick" the adaptor */
1383 smc_reset( dev->base_addr );
1384 smc_enable( dev->base_addr );
1385 dev->trans_start = jiffies;
1386 /* clear anything saved */
1387 ((struct smc_local *)dev->priv)->saved_skb = NULL;
1388 netif_wake_queue(dev);
1389 }
1390
1391 /*-------------------------------------------------------------
1392 .
1393 . smc_rcv - receive a packet from the card
1394 .
1395 . There is ( at least ) a packet waiting to be read from
1396 . chip-memory.
1397 .
1398 . o Read the status
1399 . o If an error, record it
1400 . o otherwise, read in the packet
1401 --------------------------------------------------------------
1402 */
1403 static void smc_rcv(struct net_device *dev)
1404 {
1405 struct smc_local *lp = netdev_priv(dev);
1406 int ioaddr = dev->base_addr;
1407 int packet_number;
1408 word status, packet_length;
1409
1410 /* assume bank 2 */
1411
1412 packet_number = inw( ioaddr + FIFO_PORTS );
1413
1414 if ( packet_number & FP_RXEMPTY ) {
1415 /* we got called , but nothing was on the FIFO */
1416 PRINTK((CARDNAME ": WARNING: smc_rcv with nothing on FIFO. \n"));
1417 /* don't need to restore anything */
1418 return;
1419 }
1420
1421 /* start reading from the start of the packet */
1422 outw( PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER );
1423
1424 /* First two words are status and packet_length */
1425 #ifndef CONFIG_SH_KEYWEST
1426 status = inw( ioaddr + DATA_1 );
1427 packet_length = inw( ioaddr + DATA_1 );
1428 #else
1429 {
1430 unsigned int l = inl( ioaddr + DATA_1 );
1431 status = l & 0xffff;
1432 packet_length = l >> 16;
1433 }
1434 #endif
1435
1436 packet_length &= 0x07ff; /* mask off top bits */
1437
1438 PRINTK2(("RCV: STATUS %4x LENGTH %4x\n", status, packet_length ));
1439 /*
1440 . the packet length contains 3 extra words :
1441 . status, length, and an extra word with an odd byte .
1442 */
1443 packet_length -= 6;
1444
1445 if ( !(status & RS_ERRORS ) ){
1446 /* do stuff to make a new packet */
1447 struct sk_buff * skb;
1448 byte * data;
1449
1450 /* read one extra byte */
1451 if ( status & RS_ODDFRAME )
1452 packet_length++;
1453
1454 /* set multicast stats */
1455 if ( status & RS_MULTICAST )
1456 lp->stats.multicast++;
1457
1458 skb = dev_alloc_skb( packet_length + 5);
1459
1460 if ( skb == NULL ) {
1461 printk(KERN_NOTICE CARDNAME ": Low memory, packet dropped.\n");
1462 lp->stats.rx_dropped++;
1463 goto done;
1464 }
1465
1466 /*
1467 ! This should work without alignment, but it could be
1468 ! in the worse case
1469 */
1470
1471 skb_reserve( skb, 2 ); /* 16 bit alignment */
1472
1473 skb->dev = dev;
1474 data = skb_put( skb, packet_length);
1475
1476 #ifdef USE_32_BIT
1477 /* QUESTION: Like in the TX routine, do I want
1478 to send the DWORDs or the bytes first, or some
1479 mixture. A mixture might improve already slow PIO
1480 performance */
1481 PRINTK3((" Reading %d dwords (and %d bytes) \n",
1482 packet_length >> 2, packet_length & 3 ));
1483 insl(ioaddr + DATA_1 , data, packet_length >> 2 );
1484 /* read the left over bytes */
1485 #ifndef CONFIG_SH_KEYWEST
1486 insb( ioaddr + DATA_1, data + (packet_length & 0xFFFFFC),
1487 packet_length & 0x3 );
1488 #else
1489 if (packet_length & 3) {
1490 union { unsigned int l; char data[4]; } l;
1491 l.l = inl(ioaddr + DATA_1);
1492 memcpy(data + (packet_length & ~0x3), l.data, packet_length & 0x3);
1493 }
1494 #endif
1495 #else
1496 PRINTK3((" Reading %d words and %d byte(s) \n",
1497 (packet_length >> 1 ), packet_length & 1 ));
1498 insw(ioaddr + DATA_1 , data, packet_length >> 1);
1499 if ( packet_length & 1 ) {
1500 data += packet_length & ~1;
1501 *(data++) = inb( ioaddr + DATA_1 );
1502 }
1503 #endif
1504 #if SMC_DEBUG > 2
1505 print_packet( data, packet_length );
1506 #endif
1507
1508 skb->protocol = eth_type_trans(skb, dev );
1509 netif_rx(skb);
1510 dev->last_rx = jiffies;
1511 lp->stats.rx_packets++;
1512 lp->stats.rx_bytes += packet_length;
1513 } else {
1514 /* error ... */
1515 lp->stats.rx_errors++;
1516
1517 if ( status & RS_ALGNERR ) lp->stats.rx_frame_errors++;
1518 if ( status & (RS_TOOSHORT | RS_TOOLONG ) )
1519 lp->stats.rx_length_errors++;
1520 if ( status & RS_BADCRC) lp->stats.rx_crc_errors++;
1521 }
1522
1523 done:
1524 /* error or good, tell the card to get rid of this packet */
1525 outw( MC_RELEASE, ioaddr + MMU_CMD );
1526 }
1527
1528
1529 /*************************************************************************
1530 . smc_tx
1531 .
1532 . Purpose: Handle a transmit error message. This will only be called
1533 . when an error, because of the AUTO_RELEASE mode.
1534 .
1535 . Algorithm:
1536 . Save pointer and packet no
1537 . Get the packet no from the top of the queue
1538 . check if it's valid ( if not, is this an error??? )
1539 . read the status word
1540 . record the error
1541 . ( resend? Not really, since we don't want old packets around )
1542 . Restore saved values
1543 ************************************************************************/
1544 static void smc_tx( struct net_device * dev )
1545 {
1546 int ioaddr = dev->base_addr;
1547 struct smc_local *lp = netdev_priv(dev);
1548 byte saved_packet;
1549 byte packet_no;
1550 word tx_status;
1551
1552
1553 /* assume bank 2 */
1554
1555 saved_packet = inb( ioaddr + PNR_ARR );
1556 packet_no = inw( ioaddr + FIFO_PORTS );
1557 packet_no &= 0x7F;
1558
1559 /* select this as the packet to read from */
1560 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
1561 outw( packet_no, ioaddr + PNR_ARR );
1562 #else
1563 outb( packet_no, ioaddr + PNR_ARR );
1564 #endif
1565
1566
1567 /* read the first word from this packet */
1568 outw( PTR_AUTOINC | PTR_READ, ioaddr + POINTER );
1569
1570 tx_status = inw( ioaddr + DATA_1 );
1571 PRINTK3((CARDNAME": TX DONE STATUS: %4x \n", tx_status ));
1572
1573 lp->stats.tx_errors++;
1574 if ( tx_status & TS_LOSTCAR ) lp->stats.tx_carrier_errors++;
1575 if ( tx_status & TS_LATCOL ) {
1576 #if 0
1577 printk(KERN_DEBUG CARDNAME
1578 ": Late collision occurred on last xmit.\n");
1579 #endif
1580 lp->stats.tx_window_errors++;
1581 }
1582 #if 0
1583 if ( tx_status & TS_16COL ) { ... }
1584 #endif
1585
1586 if ( tx_status & TS_SUCCESS ) {
1587 printk(CARDNAME": Successful packet caused interrupt \n");
1588 }
1589 /* re-enable transmit */
1590 SMC_SELECT_BANK( 0 );
1591 outw( inw( ioaddr + TCR ) | TCR_ENABLE, ioaddr + TCR );
1592
1593 /* kill the packet */
1594 SMC_SELECT_BANK( 2 );
1595 outw( MC_FREEPKT, ioaddr + MMU_CMD );
1596
1597 /* one less packet waiting for me */
1598 lp->packets_waiting--;
1599
1600 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
1601 outw( saved_packet, ioaddr + PNR_ARR );
1602 #else
1603 outb( saved_packet, ioaddr + PNR_ARR );
1604 #endif
1605 return;
1606 }
1607
1608 /*--------------------------------------------------------------------
1609 .
1610 . This is the main routine of the driver, to handle the device when
1611 . it needs some attention.
1612 .
1613 . So:
1614 . first, save state of the chipset
1615 . branch off into routines to handle each case, and acknowledge
1616 . each to the interrupt register
1617 . and finally restore state.
1618 .
1619 ---------------------------------------------------------------------*/
1620
1621 static irqreturn_t smc_interrupt(int irq, void * dev_id)
1622 {
1623 struct net_device *dev = dev_id;
1624 int ioaddr = dev->base_addr;
1625 struct smc_local *lp = netdev_priv(dev);
1626
1627 byte status;
1628 word card_stats;
1629 byte mask;
1630 int timeout;
1631 /* state registers */
1632 word saved_bank;
1633 word saved_pointer;
1634 int handled = 0;
1635
1636
1637 PRINTK3((CARDNAME": SMC interrupt started \n"));
1638
1639 saved_bank = inw( ioaddr + BANK_SELECT );
1640
1641 SMC_SELECT_BANK(2);
1642 saved_pointer = inw( ioaddr + POINTER );
1643
1644 mask = inb( ioaddr + INT_MASK );
1645 /* clear all interrupts */
1646 outb( 0, ioaddr + INT_MASK );
1647
1648
1649 /* set a timeout value, so I don't stay here forever */
1650 timeout = 4;
1651
1652 PRINTK2((KERN_WARNING CARDNAME ": MASK IS %x \n", mask ));
1653 do {
1654 /* read the status flag, and mask it */
1655 status = inb( ioaddr + INTERRUPT ) & mask;
1656 if (!status )
1657 break;
1658
1659 handled = 1;
1660
1661 PRINTK3((KERN_WARNING CARDNAME
1662 ": Handling interrupt status %x \n", status ));
1663
1664 if (status & IM_RCV_INT) {
1665 /* Got a packet(s). */
1666 PRINTK2((KERN_WARNING CARDNAME
1667 ": Receive Interrupt\n"));
1668 smc_rcv(dev);
1669 } else if (status & IM_TX_INT ) {
1670 PRINTK2((KERN_WARNING CARDNAME
1671 ": TX ERROR handled\n"));
1672 smc_tx(dev);
1673 outb(IM_TX_INT, ioaddr + INTERRUPT );
1674 } else if (status & IM_TX_EMPTY_INT ) {
1675 /* update stats */
1676 SMC_SELECT_BANK( 0 );
1677 card_stats = inw( ioaddr + COUNTER );
1678 /* single collisions */
1679 lp->stats.collisions += card_stats & 0xF;
1680 card_stats >>= 4;
1681 /* multiple collisions */
1682 lp->stats.collisions += card_stats & 0xF;
1683
1684 /* these are for when linux supports these statistics */
1685
1686 SMC_SELECT_BANK( 2 );
1687 PRINTK2((KERN_WARNING CARDNAME
1688 ": TX_BUFFER_EMPTY handled\n"));
1689 outb( IM_TX_EMPTY_INT, ioaddr + INTERRUPT );
1690 mask &= ~IM_TX_EMPTY_INT;
1691 lp->stats.tx_packets += lp->packets_waiting;
1692 lp->packets_waiting = 0;
1693
1694 } else if (status & IM_ALLOC_INT ) {
1695 PRINTK2((KERN_DEBUG CARDNAME
1696 ": Allocation interrupt \n"));
1697 /* clear this interrupt so it doesn't happen again */
1698 mask &= ~IM_ALLOC_INT;
1699
1700 smc_hardware_send_packet( dev );
1701
1702 /* enable xmit interrupts based on this */
1703 mask |= ( IM_TX_EMPTY_INT | IM_TX_INT );
1704
1705 /* and let the card send more packets to me */
1706 netif_wake_queue(dev);
1707
1708 PRINTK2((CARDNAME": Handoff done successfully.\n"));
1709 } else if (status & IM_RX_OVRN_INT ) {
1710 lp->stats.rx_errors++;
1711 lp->stats.rx_fifo_errors++;
1712 outb( IM_RX_OVRN_INT, ioaddr + INTERRUPT );
1713 } else if (status & IM_EPH_INT ) {
1714 PRINTK((CARDNAME ": UNSUPPORTED: EPH INTERRUPT \n"));
1715 } else if (status & IM_ERCV_INT ) {
1716 PRINTK((CARDNAME ": UNSUPPORTED: ERCV INTERRUPT \n"));
1717 outb( IM_ERCV_INT, ioaddr + INTERRUPT );
1718 }
1719 } while ( timeout -- );
1720
1721
1722 /* restore state register */
1723 SMC_SELECT_BANK( 2 );
1724 outb( mask, ioaddr + INT_MASK );
1725
1726 PRINTK3(( KERN_WARNING CARDNAME ": MASK is now %x \n", mask ));
1727 outw( saved_pointer, ioaddr + POINTER );
1728
1729 SMC_SELECT_BANK( saved_bank );
1730
1731 PRINTK3((CARDNAME ": Interrupt done\n"));
1732 return IRQ_RETVAL(handled);
1733 }
1734
1735
1736 /*----------------------------------------------------
1737 . smc_close
1738 .
1739 . this makes the board clean up everything that it can
1740 . and not talk to the outside world. Caused by
1741 . an 'ifconfig ethX down'
1742 .
1743 -----------------------------------------------------*/
1744 static int smc_close(struct net_device *dev)
1745 {
1746 netif_stop_queue(dev);
1747 /* clear everything */
1748 smc_shutdown( dev->base_addr );
1749
1750 #if defined(CONFIG_LEDMAN) && defined(CONFIG_SNAPGEAR)
1751 ledman_cmd(LEDMAN_CMD_OFF,
1752 strcmp(dev->name, "eth0")?LEDMAN_LAN2_LINK : LEDMAN_LAN1_LINK);
1753 #endif
1754
1755 /* Update the statistics here. */
1756 return 0;
1757 }
1758
1759 /*------------------------------------------------------------
1760 . Get the current statistics.
1761 . This may be called with the card open or closed.
1762 .-------------------------------------------------------------*/
1763 static struct net_device_stats* smc_query_statistics(struct net_device *dev) {
1764 struct smc_local *lp = netdev_priv(dev);
1765
1766 return &lp->stats;
1767 }
1768
1769 /*-----------------------------------------------------------
1770 . smc_set_multicast_list
1771 .
1772 . This routine will, depending on the values passed to it,
1773 . either make it accept multicast packets, go into
1774 . promiscuous mode ( for TCPDUMP and cousins ) or accept
1775 . a select set of multicast packets
1776 */
1777 static void smc_set_multicast_list(struct net_device *dev)
1778 {
1779 smcio_t ioaddr = dev->base_addr;
1780
1781 SMC_SELECT_BANK(0);
1782 if ( dev->flags & IFF_PROMISC )
1783 outw( inw(ioaddr + RCR ) | RCR_PROMISC, ioaddr + RCR );
1784
1785 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1786 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1787 when promiscuous mode is turned on.
1788 */
1789
1790 /* Here, I am setting this to accept all multicast packets.
1791 I don't need to zero the multicast table, because the flag is
1792 checked before the table is
1793 */
1794 else if (dev->flags & IFF_ALLMULTI)
1795 outw( inw(ioaddr + RCR ) | RCR_ALMUL, ioaddr + RCR );
1796
1797 /* We just get all multicast packets even if we only want them
1798 . from one source. This will be changed at some future
1799 . point. */
1800 else if (dev->mc_count ) {
1801 /* support hardware multicasting */
1802
1803 /* be sure I get rid of flags I might have set */
1804 outw( inw( ioaddr + RCR ) & ~(RCR_PROMISC | RCR_ALMUL),
1805 ioaddr + RCR );
1806 /* NOTE: this has to set the bank, so make sure it is the
1807 last thing called. The bank is set to zero at the top */
1808 smc_setmulticast( ioaddr, dev->mc_count, dev->mc_list );
1809 }
1810 else {
1811 outw( inw( ioaddr + RCR ) & ~(RCR_PROMISC | RCR_ALMUL),
1812 ioaddr + RCR );
1813
1814 /*
1815 since I'm disabling all multicast entirely, I need to
1816 clear the multicast list
1817 */
1818 SMC_SELECT_BANK( 3 );
1819 outw( 0, ioaddr + MULTICAST1 );
1820 outw( 0, ioaddr + MULTICAST2 );
1821 outw( 0, ioaddr + MULTICAST3 );
1822 outw( 0, ioaddr + MULTICAST4 );
1823 }
1824 }
1825
1826 #ifdef PHY_SETUP
1827 static int phy_delay1 = 4;
1828 static int phy_delay2 = 1;
1829 static int phy_delay3 = 100;
1830 #endif
1831
1832 #ifdef MODULE
1833
1834 static struct net_device *devSMC9194;
1835 MODULE_LICENSE("GPL");
1836
1837 module_param(io, int, 0);
1838 module_param(irq, int, 0);
1839 module_param(ifport, int, 0);
1840 MODULE_PARM_DESC(io, "SMC 99194 I/O base address");
1841 MODULE_PARM_DESC(irq, "SMC 99194 IRQ number");
1842 MODULE_PARM_DESC(ifport, "SMC 99194 interface port (0-default, 1-TP, 2-AUI)");
1843
1844 #ifdef PHY_SETUP
1845 MODULE_PARM(phy_delay1, "i");
1846 MODULE_PARM(phy_delay2, "i");
1847 MODULE_PARM(phy_delay3, "i");
1848 MODULE_PARM_DESC(phy_delay1, "Per MII clock delay [4]");
1849 MODULE_PARM_DESC(phy_delay2, "General delay [1]");
1850 MODULE_PARM_DESC(phy_delay3, "pre probe delay [100]");
1851 #endif
1852
1853 int __init init_module(void)
1854 {
1855 if (io == 0)
1856 printk(KERN_WARNING
1857 CARDNAME": You shouldn't use auto-probing with insmod!\n" );
1858
1859 #ifdef PHY_SETUP
1860 printk(CARDNAME ": phy_delays %d %d %d\n", phy_delay1, phy_delay2,
1861 phy_delay3);
1862 #endif
1863 /* copy the parameters from insmod into the device structure */
1864 devSMC9194 = smc_init(-1);
1865 if (IS_ERR(devSMC9194))
1866 return PTR_ERR(devSMC9194);
1867 return 0;
1868 }
1869
1870 void cleanup_module(void)
1871 {
1872 unregister_netdev(devSMC9194);
1873 free_irq(devSMC9194->irq, devSMC9194);
1874 release_region(devSMC9194->base_addr, SMC_IO_EXTENT);
1875 free_netdev(devSMC9194);
1876 }
1877
1878 #endif /* MODULE */
1879
1880
1881 #ifdef PHY_SETUP
1882 /*-----------------------------------------------------------
1883 . PHY/MII setup routines
1884 .
1885 */
1886
1887 #define phy_delay(x) ({ int d; for (d = 0; d < 100; d++) udelay((x) * 10); })
1888
1889 /*
1890 * Ports for talking to the PHY/MII
1891 */
1892
1893 #define NV_CONTROL 0x10
1894 #define MIICTRL 0x30
1895 #define MIIDATA 0x34
1896 #define MIICFG 0x38
1897
1898 #define MIIREAD 0x0001
1899 #define MIIWRITE 0x0002
1900
1901 #define MDO 0x01 /* MII Register bits */
1902 #define MDI 0x02
1903 #define MCLK 0x04
1904 #define MDOE 0x08
1905 #define MALL 0x0F
1906 #define OPWrite 0x01
1907 #define OPRead 0x02
1908
1909
1910 #define PHY_CR 0 /* PHY Registers and bits */
1911 #define PHY_CR_Reset 0x8000
1912 #define PHY_CR_Speed 0x2000
1913 #define PHY_CR_Duplex 0x0100
1914
1915 #define PHY_SR 1
1916 #define PHY_ID1 2
1917 #define PHY_ID2 3
1918
1919 /*
1920 * PHY propietary registers
1921 */
1922
1923 #define PHY_NATIONAL_PAR 0x19
1924 #define PHY_NATIONAL_PAR_DUPLEX 0x0080
1925 #define PHY_NATIONAL_PAR_SPEED_10 0x0040
1926
1927 #define PHY_TDK_DIAG 0x12
1928 #define PHY_TDK_DIAG_DUPLEX 0x0800
1929 #define PHY_TDK_DIAG_RATE 0x0400
1930
1931 #define PHY_QSI_BASETX 0x1F
1932 #define PHY_QSI_BASETX_OPMODE_MASK 0x001c
1933 #define PHY_QSI_BASETX_OPMODE_10HD (2<<0x1)
1934 #define PHY_QSI_BASETX_OPMODE_100HD (2<<0x2)
1935 #define PHY_QSI_BASETX_OPMODE_10FD (2<<0x5)
1936 #define PHY_QSI_BASETX_OPMODE_100FD (2<<0x6)
1937
1938 #define PHY_SEEQ_STATUS_OUTPUT 0x12
1939 #define PHY_SEEQ_SPD_DET 0x80
1940 #define PHY_SEEQ_DPLX_DET 0x40
1941
1942 #define PHY_OUI_QSI 0x006051
1943 #define PHY_OUI_TDK 0x00C039
1944 #define PHY_OUI_MITELSMSC 0x00A087
1945 #define PHY_OUI_NATIONAL 0x080017
1946 #define PHY_OUI_SEEQSMSC 0x0005BE
1947
1948 #define NWAY_TIMEOUT 10
1949
1950 #define MAC_IS_FEAST() (1)
1951 #define MAC_IS_EPIC() (0)
1952
1953 static void
1954 clkmdio(smcio_t ioaddr, unsigned int MGMTData)
1955 {
1956 outw(MGMTData, ioaddr + MGMT);
1957 udelay(phy_delay1);
1958 outw(MGMTData | MCLK, ioaddr + MGMT);
1959 udelay(phy_delay1);
1960 }
1961
1962
1963 static unsigned
1964 PHYAccess(
1965 smcio_t ioaddr,
1966 unsigned char PHYAdd,
1967 unsigned char RegAdd,
1968 unsigned char OPCode,
1969 unsigned wData)
1970 {
1971 int i;
1972 unsigned MGMTval;
1973
1974 // Filter unused bits from input variables.
1975
1976 PHYAdd &= 0x1F;
1977 RegAdd &= 0x1F;
1978 OPCode &= 0x03;
1979
1980 if (MAC_IS_FEAST()) {
1981 MGMTval = inw(ioaddr + MGMT) & (MALL ^ 0xFFFF);
1982
1983 // Output Preamble (32 '1's)
1984
1985 for (i = 0; i < 32; i++)
1986 clkmdio(ioaddr, MGMTval | MDOE | MDO);
1987
1988 // Output Start of Frame ('01')
1989
1990 for (i = 0; i < 2; i++)
1991 clkmdio(ioaddr, MGMTval | MDOE | i);
1992
1993 // Output OPCode ('01' for write or '10' for Read)
1994
1995 for (i = 1; i >= 0; i--)
1996 clkmdio(ioaddr, MGMTval | MDOE | ((OPCode>>i) & 0x01) );
1997
1998 // Output PHY Address
1999
2000 for (i = 4; i >= 0; i--)
2001 clkmdio(ioaddr, MGMTval | MDOE | ((PHYAdd>>i) & 0x01) );
2002
2003 // Output Register Address
2004
2005 for (i = 4; i >= 0; i--)
2006 clkmdio(ioaddr, MGMTval | MDOE | ((RegAdd>>i) & 0x01) );
2007
2008 if (OPCode == OPRead) {
2009 // Read Operation
2010
2011 // Implement Turnaround ('Z0')
2012
2013 clkmdio(ioaddr, MGMTval);
2014 // clkmdio(ioaddr, MGMTval | MDOE);
2015
2016 // Read Data
2017
2018 wData = 0;
2019
2020 for (i = 15; i >= 0; i--) {
2021 clkmdio(ioaddr, MGMTval);
2022 wData |= (((inw(ioaddr + MGMT) & MDI) >> 1) << i);
2023 }
2024
2025 // Add Idle state
2026
2027 clkmdio(ioaddr, MGMTval);
2028
2029 return (wData);
2030 } else {
2031 // Write Operation
2032
2033 // Implement Turnaround ('10')
2034
2035 for (i = 1; i >= 0; i--)
2036 clkmdio(ioaddr, MGMTval | MDOE | ((2>>i) & 0x01));
2037
2038 // Write Data
2039
2040 for (i = 15; i >= 0; i--)
2041 clkmdio(ioaddr, MGMTval | MDOE | ((wData>>i) & 0x01));
2042
2043 // Add Idle state
2044
2045 clkmdio(ioaddr, MGMTval);
2046
2047 return (1);
2048 }
2049 }
2050
2051 if (MAC_IS_EPIC()) {
2052 if (OPCode == OPRead) {
2053 // Read Operation
2054 outw((((unsigned)PHYAdd)<<9) | (((unsigned)RegAdd)<<4) | MIIREAD,
2055 ioaddr + MIICTRL);
2056 phy_delay(phy_delay2);
2057 wData = inw(MIIDATA);
2058 return(wData);
2059 } else {
2060 // Write Operation
2061 outw(wData, ioaddr + MIIDATA);
2062 outw((((unsigned)PHYAdd)<<9) | (((unsigned)RegAdd)<<4) | MIIWRITE,
2063 ioaddr + MIICTRL);
2064 phy_delay(phy_delay2);
2065 return(1);
2066 }
2067 }
2068
2069 return(1);
2070
2071 }
2072
2073
2074 static unsigned char
2075 DetectPHY(
2076 smcio_t ioaddr,
2077 unsigned long *OUI,
2078 unsigned char *Model,
2079 unsigned char *Revision)
2080 {
2081 unsigned int PhyId1, PhyId2;
2082 unsigned char PhyAdd=0xff;
2083 int Count;
2084
2085 for (Count=31; Count >= 0; Count--) {
2086 PhyId1 = PHYAccess(ioaddr, Count, PHY_ID1, OPRead, 0);
2087 PhyId1 = PHYAccess(ioaddr, Count, PHY_ID1, OPRead, 0);
2088 PhyId2 = PHYAccess(ioaddr, Count, PHY_ID2, OPRead, 0);
2089 PhyId2 = PHYAccess(ioaddr, Count, PHY_ID2, OPRead, 0);
2090
2091 if (PhyId1 > 0x0000 && PhyId1 < 0xffff && PhyId2 > 0x0000 &&
2092 PhyId2 < 0xffff && PhyId1 != 0x8000 && PhyId2 != 0x8000) {
2093 PhyAdd = (unsigned char) Count;
2094 break;
2095 }
2096 phy_delay(phy_delay2);
2097 }
2098
2099 *OUI = (((unsigned long) PhyId1) << 6) | ((PhyId2 & 0xfc00) >> 10);
2100 *Model = (unsigned char) ((PhyId2 & 0x03f0) >> 4);
2101 *Revision = (unsigned char) (PhyId2 & 0x000f);
2102
2103 return(PhyAdd);
2104 }
2105
2106
2107 static int
2108 setup_phy(smcio_t ioaddr)
2109 {
2110 int duplex = 0; /* 0 = Half, !0 = Full */
2111 int speed = 0; /* 0 = 10Mbps, !0 = 100Mbps */
2112 char *report = "";
2113 unsigned long OUI;
2114 unsigned char Model, Revision;
2115
2116 unsigned int i, PHYConfig, PHYConfig2, data;
2117 unsigned char PHYAdd, ositech = 0;
2118
2119 printk("SMCPHY: ");
2120 #if 0
2121 ositech = 1;
2122 #endif
2123
2124 //Setting the AUI Select Bit for 91C110 PCMCIA Design. 11/23/99 PG
2125 if (ositech) {
2126 SMC_SELECT_BANK( 1 );
2127 data = inw(ioaddr + BANK_SELECT);
2128 outw(data | 0x0100, ioaddr);
2129 }
2130
2131 if (MAC_IS_FEAST())
2132 SMC_SELECT_BANK ( 3 );
2133
2134 PHYAdd = DetectPHY(ioaddr, &OUI, &Model, &Revision);
2135
2136 if (PHYAdd > 31) {
2137 printk("UNRECOVERABLE ERROR: PHY is not present or not supported\n");
2138 return(-1);
2139 }
2140
2141 //Setup NV_CONTROL for the cardbus card.
2142 if (OUI == PHY_OUI_TDK)
2143 outw(0x7c03, ioaddr + NV_CONTROL);
2144
2145 // Save Register 0.
2146
2147 if (OUI == PHY_OUI_TDK)
2148 PHYAccess(ioaddr, PHYAdd, PHY_CR, OPRead, 0);
2149 PHYConfig = PHYAccess(ioaddr, PHYAdd,PHY_CR,OPRead,0);
2150
2151 if (OUI == PHY_OUI_TDK) {
2152 outw(0x0012, ioaddr + MIICFG); /* Set ENABLE_694 */
2153 /* if using EPIC, Hardware Reset the PHY from the MAC */
2154 outw(inw(ioaddr + CONTROL) | 0x4000, ioaddr + CONTROL);
2155 phy_delay(phy_delay2);
2156 outw(inw(ioaddr + CONTROL) & (~0x4000), ioaddr + CONTROL);
2157 phy_delay(phy_delay2);
2158 }
2159
2160 /* Reset PHY */
2161 PHYAccess(ioaddr, PHYAdd, PHY_CR, OPWrite, PHY_CR_Reset);
2162 if (OUI == PHY_OUI_TDK)
2163 PHYAccess(ioaddr, PHYAdd, PHY_CR, OPWrite, PHY_CR_Reset);
2164
2165 for (i = 0; i < 500; i++) {
2166 if (OUI == PHY_OUI_TDK)
2167 PHYAccess(ioaddr, PHYAdd, PHY_CR, OPRead, 0);
2168
2169 if (PHYAccess(ioaddr, PHYAdd, PHY_CR, OPRead, 0) & PHY_CR_Reset)
2170 phy_delay(phy_delay2);
2171 else
2172 break;
2173 }
2174
2175 if (i == 500) {
2176 printk("UNRECOVERABLE ERROR: Could not reset PHY\n");
2177 return(-1);
2178 }
2179
2180 /* Write selected configuration to the PHY and verify it by reading back */
2181 /* Set Advertising Register for all 10/100 and Half/Full combinations */
2182
2183 if (OUI == PHY_OUI_TDK)
2184 PHYConfig = PHYAccess(ioaddr, PHYAdd, 4, OPRead, 0);
2185 PHYConfig = PHYAccess(ioaddr, PHYAdd, 4, OPRead, 0);
2186 PHYConfig |= 0x01e0;
2187 PHYAccess(ioaddr, PHYAdd, 4, OPWrite, PHYConfig);
2188 if (OUI == PHY_OUI_TDK)
2189 PHYAccess(ioaddr, PHYAdd, 4, OPWrite, PHYConfig);
2190
2191 /* Start 1 */
2192
2193 /* National PHY requires clear before set 1 enable. */
2194 PHYAccess(ioaddr, PHYAdd, 0, OPWrite, 0x0000);
2195 PHYAccess(ioaddr, PHYAdd, 0, OPWrite, 0x1200);
2196 if (OUI == PHY_OUI_TDK)
2197 PHYAccess(ioaddr, PHYAdd, 0, OPWrite, 0x1200);
2198
2199 /* Wait for completion */
2200 for (i = 0; i < NWAY_TIMEOUT * 10; i++) {
2201 printk("%c\b", "|/-\\"[i&3]);
2202
2203 phy_delay(phy_delay3);
2204
2205 PHYConfig = PHYAccess(ioaddr, PHYAdd, 1, OPRead, 0);
2206 PHYConfig2 = PHYAccess(ioaddr, PHYAdd, 1, OPRead, 0);
2207
2208 if (PHYConfig != PHYConfig2) /* Value is not stable */
2209 continue;
2210 if (PHYConfig & 0x0010) /* Remote Fault */
2211 continue;
2212 if ((PHYConfig == 0x0000) || (PHYConfig == 0xffff)) /* invalid value */
2213 continue;
2214 if (PHYConfig & 0x0020)
2215 break;
2216 }
2217
2218 /* Now read the results of the NWAY. */
2219
2220 if (OUI == PHY_OUI_TDK)
2221 PHYConfig = PHYAccess(ioaddr, PHYAdd, 5, OPRead, 0);
2222 PHYConfig = PHYAccess(ioaddr, PHYAdd, 5, OPRead, 0);
2223
2224 if (PHYConfig != 0) {
2225 /* Got real NWAY information here */
2226 report = "ANLPA";
2227 speed = (PHYConfig & 0x0180);
2228 duplex = (PHYConfig & 0x0140);
2229 } else {
2230 /*
2231 * ANLPA was 0 so NWAY did not complete or is not reported fine.
2232 * Get the info from propietary regs or from the control register.
2233 */
2234 report = "Prop."; /* Proprietary Status */
2235
2236 switch (OUI) {
2237 case PHY_OUI_NATIONAL:
2238 PHYConfig = PHYAccess(ioaddr, PHYAdd, PHY_NATIONAL_PAR, OPRead, 0);
2239 duplex = (PHYConfig & PHY_NATIONAL_PAR_DUPLEX);
2240 speed = ! (PHYConfig & PHY_NATIONAL_PAR_SPEED_10);
2241 break;
2242
2243 case PHY_OUI_TDK:
2244 PHYConfig = PHYAccess(ioaddr, PHYAdd, PHY_TDK_DIAG, OPRead, 0);
2245 PHYConfig = PHYAccess(ioaddr, PHYAdd, PHY_TDK_DIAG, OPRead, 0);
2246 speed = ((Revision < 7) && ((PHYConfig & 0x300) == 0x300)) ||
2247 ((Revision >= 7) && (PHYConfig & PHY_TDK_DIAG_RATE));
2248 duplex = ((Revision >= 7) && (PHYConfig & PHY_TDK_DIAG_DUPLEX));
2249 break;
2250
2251 case PHY_OUI_QSI:
2252 PHYConfig = PHYAccess(ioaddr, PHYAdd, PHY_QSI_BASETX, OPRead, 0);
2253 PHYConfig &= PHY_QSI_BASETX_OPMODE_MASK;
2254 duplex = (PHYConfig & PHY_QSI_BASETX_OPMODE_10FD) ||
2255 (PHYConfig & PHY_QSI_BASETX_OPMODE_100FD);
2256 speed = (PHYConfig & PHY_QSI_BASETX_OPMODE_100HD) ||
2257 (PHYConfig & PHY_QSI_BASETX_OPMODE_100FD);
2258 break;
2259
2260 case PHY_OUI_SEEQSMSC:
2261 PHYConfig=PHYAccess(ioaddr,PHYAdd,PHY_SEEQ_STATUS_OUTPUT,OPRead,0);
2262 duplex = (PHYConfig & PHY_SEEQ_DPLX_DET);
2263 speed = (PHYConfig & PHY_SEEQ_SPD_DET);
2264 break;
2265
2266 default:
2267 report = "Command";
2268 PHYConfig = PHYAccess(ioaddr, PHYAdd, 0, OPRead, 0);
2269 speed = (PHYConfig & 0x2000);
2270 duplex = (PHYConfig & 0x0100);
2271 break;
2272 }
2273 }
2274
2275 /* Do we need to adjust the Carrier sense on full duplex FEAST issue ? */
2276
2277 if (duplex && MAC_IS_FEAST() && (OUI == PHY_OUI_MITELSMSC))
2278 PHYAccess(ioaddr, PHYAdd, 0x18, OPWrite,
2279 0x0020 | PHYAccess(ioaddr, PHYAdd, 0x18, OPRead, 0));
2280
2281 /* Display what we learned */
2282
2283 printk(" %s-duplex %d Mbps ", duplex ? "Full" : "Half", speed ? 100 : 10);
2284
2285 if (MAC_IS_FEAST())
2286 printk("FEAST ");
2287 if (MAC_IS_EPIC())
2288 printk("EPIC ");
2289
2290 switch (OUI) {
2291 case PHY_OUI_QSI: printk("QSI"); break;
2292 case PHY_OUI_TDK: printk("TDK"); break;
2293 case PHY_OUI_MITELSMSC: printk("MITEL/SMSC180"); break;
2294 case PHY_OUI_NATIONAL: printk("NATIONAL"); break;
2295 case PHY_OUI_SEEQSMSC: printk("SEEQ/SMSC183"); break;
2296 default: printk("%06lX(UNKNOWN)",OUI); break;
2297 }
2298
2299 printk(" Model=%02X Rev=%02X ", Model, Revision);
2300 #if DEBUG
2301 printk("Addr=%02X ", PHYAdd);
2302 printk("Conf=%s ", report);
2303 #endif
2304 if (i == NWAY_TIMEOUT)
2305 printk("TIMEOUT!\n");
2306 else
2307 printk("Done.\n");
2308 return(0);
2309 }
2310
2311 /*----------------------------------------------------------- */
2312 #endif /* PHY_SETUP */
MOXA 2.6.19 from UC-7110-LX-BOOTLOADER-1.9_VERSION-4.2.tgz