2 * linux/arch/arm/mm/proc-arm720.S: MMU functions for ARM720
4 * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
5 * Rob Scott (rscott@mtrob.fdns.net)
6 * Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd.
7 * hacked for non-paged-MM by Hyok S. Choi, 2004.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 * These are the low level assembler for performing cache and TLB
25 * functions on the ARM720T. The ARM720T has a writethrough IDC
26 * cache, so we don't need to clean it.
29 * 05-09-2000 SJH Created by moving 720 specific functions
30 * out of 'proc-arm6,7.S' per RMK discussion
31 * 07-25-2000 SJH Added idle function.
32 * 08-25-2000 DBS Updated for integration of ARM Ltd version.
33 * 04-20-2004 HSC modified for non-paged memory management mode.
35 #include <linux/linkage.h>
36 #include <linux/init.h>
37 #include <asm/assembler.h>
38 #include <asm/asm-offsets.h>
39 #include <asm/pgtable-hwdef.h>
40 #include <asm/pgtable.h>
41 #include <asm/procinfo.h>
42 #include <asm/ptrace.h>
44 #include "proc-macros.S"
47 * Function: arm720_proc_init (void)
48 * : arm720_proc_fin (void)
50 * Notes : This processor does not require these
52 ENTRY(cpu_arm720_dcache_clean_area)
53 ENTRY(cpu_arm720_proc_init)
56 ENTRY(cpu_arm720_proc_fin)
58 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
60 mrc p15, 0, r0, c1, c0, 0
61 bic r0, r0, #0x1000 @ ...i............
62 bic r0, r0, #0x000e @ ............wca.
63 mcr p15, 0, r0, c1, c0, 0 @ disable caches
64 mcr p15, 0, r1, c7, c7, 0 @ invalidate cache
68 * Function: arm720_proc_do_idle(void)
69 * Params : r0 = unused
70 * Purpose : put the processer in proper idle mode
72 ENTRY(cpu_arm720_do_idle)
76 * Function: arm720_switch_mm(unsigned long pgd_phys)
77 * Params : pgd_phys Physical address of page table
78 * Purpose : Perform a task switch, saving the old process' state and restoring
81 ENTRY(cpu_arm720_switch_mm)
84 mcr p15, 0, r1, c7, c7, 0 @ invalidate cache
85 mcr p15, 0, r0, c2, c0, 0 @ update page table ptr
86 mcr p15, 0, r1, c8, c7, 0 @ flush TLB (v4)
91 * Function: arm720_set_pte(pte_t *ptep, pte_t pte)
92 * Params : r0 = Address to set
94 * Purpose : Set a PTE and flush it out of any WB cache
97 ENTRY(cpu_arm720_set_pte)
99 str r1, [r0], #-2048 @ linux version
101 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
103 bic r2, r1, #PTE_SMALL_AP_MASK
104 bic r2, r2, #PTE_TYPE_MASK
105 orr r2, r2, #PTE_TYPE_SMALL
107 tst r1, #L_PTE_USER @ User?
108 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
110 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
111 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
113 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young
116 str r2, [r0] @ hardware version
121 * Function: arm720_reset
122 * Params : r0 = address to jump to
123 * Notes : This sets up everything for a reset
125 ENTRY(cpu_arm720_reset)
127 mcr p15, 0, ip, c7, c7, 0 @ invalidate cache
129 mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4)
131 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
132 bic ip, ip, #0x000f @ ............wcam
133 bic ip, ip, #0x2100 @ ..v....s........
134 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
139 .type __arm710_setup, #function
142 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
144 mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
146 mrc p15, 0, r0, c1, c0 @ get control register
147 ldr r5, arm710_cr1_clear
149 ldr r5, arm710_cr1_set
151 mov pc, lr @ __ret (head.S)
152 .size __arm710_setup, . - __arm710_setup
156 * .RVI ZFRS BLDP WCAM
157 * .... 0001 ..11 1101
160 .type arm710_cr1_clear, #object
161 .type arm710_cr1_set, #object
165 #if defined(CONFIG_MMU) || defined(CONFIG_CPU_MXU_ENABLE)
171 .type __arm720_setup, #function
174 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
176 mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
180 mrc p15, 0, r0, c1, c0 @ get control register
183 mov pc, lr @ __ret (head.S)
184 .size __arm720_setup, . - __arm720_setup
188 * .RVI ZFRS BLDP WCAM
189 * ..1. 1001 ..11 1101
192 .type arm720_crval, #object
194 crval clear=0x00002f3f, mmuset=0x0000213d, ucset=0x00000130
199 * Purpose : Function pointers used to access above functions - all calls
202 .type arm720_processor_functions, #object
203 ENTRY(arm720_processor_functions)
205 .word cpu_arm720_proc_init
206 .word cpu_arm720_proc_fin
207 .word cpu_arm720_reset
208 .word cpu_arm720_do_idle
209 .word cpu_arm720_dcache_clean_area
210 .word cpu_arm720_switch_mm
211 .word cpu_arm720_set_pte
212 .size arm720_processor_functions, . - arm720_processor_functions
216 .type cpu_arch_name, #object
217 cpu_arch_name: .asciz "armv4t"
218 .size cpu_arch_name, . - cpu_arch_name
220 .type cpu_elf_name, #object
221 cpu_elf_name: .asciz "v4"
222 .size cpu_elf_name, . - cpu_elf_name
224 .type cpu_arm710_name, #object
227 .size cpu_arm710_name, . - cpu_arm710_name
229 .type cpu_arm720_name, #object
232 .size cpu_arm720_name, . - cpu_arm720_name
237 * See linux/include/asm-arm/procinfo.h for a definition of this structure.
240 .section ".proc.info.init", #alloc, #execinstr
242 .type __arm710_proc_info, #object
244 .long 0x41807100 @ cpu_val
245 .long 0xffffff00 @ cpu_mask
246 .long PMD_TYPE_SECT | \
247 PMD_SECT_BUFFERABLE | \
248 PMD_SECT_CACHEABLE | \
250 PMD_SECT_AP_WRITE | \
252 .long PMD_TYPE_SECT | \
254 PMD_SECT_AP_WRITE | \
256 b __arm710_setup @ cpu_flush
257 .long cpu_arch_name @ arch_name
258 .long cpu_elf_name @ elf_name
259 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB @ elf_hwcap
260 .long cpu_arm710_name @ name
261 .long arm720_processor_functions
265 .size __arm710_proc_info, . - __arm710_proc_info
267 .type __arm720_proc_info, #object
269 .long 0x41807200 @ cpu_val
270 .long 0xffffff00 @ cpu_mask
271 .long PMD_TYPE_SECT | \
272 PMD_SECT_BUFFERABLE | \
273 PMD_SECT_CACHEABLE | \
275 PMD_SECT_AP_WRITE | \
277 .long PMD_TYPE_SECT | \
279 PMD_SECT_AP_WRITE | \
281 b __arm720_setup @ cpu_flush
282 .long cpu_arch_name @ arch_name
283 .long cpu_elf_name @ elf_name
284 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB @ elf_hwcap
285 .long cpu_arm720_name @ name
286 .long arm720_processor_functions
290 .size __arm720_proc_info, . - __arm720_proc_info