arch/arm/mach-s5c7375/time.c

   1 /*
   2  *  linux/arch/armnommu/mach-s5c7375/time.c
   3  *
   4  *  Copyright (C) SAMSUNG ELECTRONICS
   5  *                      Hyok S. Choi <hyok.choi@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21 #include <linux/kernel.h>
  22 #include <linux/sched.h>
  23 #include <linux/init.h>
  24 #include <linux/interrupt.h>
  25 #include <asm/system.h>
  26 #include <asm/leds.h>
  27 #include <asm/mach-types.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/irq.h>
  31 #include <asm/arch/s5c7375.h>
  32 #include <asm/mach/time.h>
  33 #include <asm/arch/time.h>
  34
  35 unsigned long s5c7375_gettimeoffset (void)
  36 {
  37         return (((RESCHED_PERIOD  * CLOCKS_PER_USEC) /1000) - rT3LDR)  / CLOCKS_PER_USEC;
  38 }
  39
  40 static irqreturn_t
  41 s5c7375_timer_interrupt(int irq, void *dev_id)
  42 {
  43     /* clear interrupt pending bit */
  44     rT3ISR = 0;
  45     timer_tick();
  46
  47     return IRQ_HANDLED;
  48 }
  49
  50 static struct irqaction s5c7375_timer_irq = {
  51         .name           = "S5C7375 Timer Tick",
  52         .flags          = IRQF_DISABLED | IRQF_TIMER,
  53         .handler        = s5c7375_timer_interrupt
  54 };
  55
  56 /*
  57  * Set up timer interrupt, and return the current time in seconds.
  58  */
  59
  60 void __init  s5c7375_time_init (void)
  61 {
  62         //- APB bus speed setting
  63         /*
  64          * Number of AHB clock cycles allocated in the ENABLE or
  65          * SETUP state of the 2-nd APB peripheral minus one.
  66          */
  67         rAPBCON2=(unsigned long)0x00010000;
  68
  69         s5c7375_timer_irq.handler = s5c7375_timer_interrupt;
  70
  71         /*
  72          * Timer 3 is used for OS_timer by external clock.
  73          */
  74         rT3CTR = TMR_TE_DISABLE | TMR_IE_PULSE | TMR_OE_ENABLE | TMR_UD_DOWN \
  75                         | TMR_UDS_TxCTR | TMR_OM_PULSE | TMR_ES_POS | TMR_M_PERIODIC_TIMER;
  76
  77         /*
  78          * prescaler to 0x6B 'cause :
  79          *      27M / (0x6B +1) = 4usec
  80          */
  81         rT3PSR = SYS_TIMER03_PRESCALER; // 0x6B
  82         /* rT3LDR  =  X second * (frequency/second ) */
  83         rT3LDR = RESCHED_PERIOD  * CLOCKS_PER_USEC /1000;
  84                         /* is equal to
  85                          *      RESCHED_PERIOD * 1000    // for msec to usec
  86                          *         * (ECLK/ (SYS_TIMER03_PRESCALER +1)) /1000000;
  87                          *      = 2500
  88                          */
  89         /* clear interrupt pending bit */
  90         rT3ISR = 0;
  91
  92         setup_irq(INT_N_TIMER3, &s5c7375_timer_irq);
  93
  94         /* timer 3 enable it! */
  95         rT3CTR |= TMR_TE_ENABLE;
  96
  97 }
  98
  99
 100 struct sys_timer s5c7375_timer = {
 101         .init           = s5c7375_time_init,
 102         .offset         = s5c7375_gettimeoffset,
 103 };