2 * arch/arm/mach-ixp4xx/sg-setup.c
4 * SnapGear/Cyberguard board-setup
6 * Copyright (C) 2003-2004 MontaVista Software, Inc.
7 * Copyright (C) 2004-2006 Greg Ungerer <gerg@snapgear.com>
9 * Original Author: Deepak Saxena <dsaxena@mvista.com>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/serial.h>
16 #include <linux/tty.h>
17 #include <linux/serial_8250.h>
19 #include <asm/types.h>
20 #include <asm/setup.h>
21 #include <asm/memory.h>
22 #include <asm/hardware.h>
24 #include <asm/mach-types.h>
25 #include <asm/mach/arch.h>
33 extern void ixp4xx_map_io(void);
34 extern void ixp4xx_init_irq(void);
37 * Console serial port (always the high speed serial port)
39 static struct resource sg_uart_resources
[] = {
41 .start
= IXP4XX_UART1_BASE_PHYS
,
42 .end
= IXP4XX_UART1_BASE_PHYS
+ 0x0fff,
43 .flags
= IORESOURCE_MEM
46 .start
= IXP4XX_UART2_BASE_PHYS
,
47 .end
= IXP4XX_UART2_BASE_PHYS
+ 0x0fff,
48 .flags
= IORESOURCE_MEM
52 static struct plat_serial8250_port sg_uart_data
[] = {
54 .mapbase
= (IXP4XX_UART1_BASE_PHYS
),
55 .membase
= (char*)(IXP4XX_UART1_BASE_VIRT
+ REG_OFFSET
),
56 .irq
= IRQ_IXP4XX_UART1
,
57 .flags
= UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
,
60 .uartclk
= IXP4XX_UART_XTAL
63 .mapbase
= (IXP4XX_UART2_BASE_PHYS
),
64 .membase
= (char*)(IXP4XX_UART2_BASE_VIRT
+ REG_OFFSET
),
65 .irq
= IRQ_IXP4XX_UART2
,
66 .flags
= UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
,
69 .uartclk
= IXP4XX_UART_XTAL
74 static struct platform_device sg_uart
= {
77 .dev
.platform_data
= sg_uart_data
,
79 .resource
= sg_uart_resources
82 void __init
sg_map_io(void)
87 static struct platform_device
*sg_devices
[] __initdata
= {
91 static void __init
sg_init(void)
94 platform_add_devices(sg_devices
, ARRAY_SIZE(sg_devices
));
97 #ifdef CONFIG_ARCH_SE4000
98 MACHINE_START(SE4000
, "SnapGear SE4000")
99 /* Maintainer: SnapGear Inc. */
100 .phys_io
= IXP4XX_PERIPHERAL_BASE_PHYS
,
101 .io_pg_offst
= ((IXP4XX_PERIPHERAL_BASE_VIRT
) >> 18) & 0xfffc,
103 .init_irq
= ixp4xx_init_irq
,
104 .timer
= &ixp4xx_timer
,
105 .boot_params
= 0x100,
106 .init_machine
= sg_init
,
110 #if defined(CONFIG_MACH_SG640) || defined(CONFIG_MACH_SGARMAUTO)
111 MACHINE_START(SG640
, "SecureComputing SG640")
112 /* Maintainer: Secure Computing Inc. */
113 .phys_io
= IXP4XX_PERIPHERAL_BASE_PHYS
,
114 .io_pg_offst
= ((IXP4XX_PERIPHERAL_BASE_VIRT
) >> 18) & 0xfffc,
116 .init_irq
= ixp4xx_init_irq
,
117 .timer
= &ixp4xx_timer
,
118 .boot_params
= 0x100,
119 .init_machine
= sg_init
,
123 #if defined(CONFIG_MACH_SG560) || defined(CONFIG_MACH_SGARMAUTO)
124 MACHINE_START(SG560
, "CyberGuard SG560")
125 /* Maintainer: Cyberguard Inc. */
126 .phys_io
= IXP4XX_PERIPHERAL_BASE_PHYS
,
127 .io_pg_offst
= ((IXP4XX_PERIPHERAL_BASE_VIRT
) >> 18) & 0xfffc,
129 .init_irq
= ixp4xx_init_irq
,
130 .timer
= &ixp4xx_timer
,
131 .boot_params
= 0x100,
132 .init_machine
= sg_init
,
136 #if defined(CONFIG_MACH_SG565) || defined(CONFIG_MACH_SGARMAUTO)
137 MACHINE_START(SG565
, "CyberGuard SG565")
138 /* Maintainer: Cyberguard Inc. */
139 .phys_io
= IXP4XX_PERIPHERAL_BASE_PHYS
,
140 .io_pg_offst
= ((IXP4XX_PERIPHERAL_BASE_VIRT
) >> 18) & 0xfffc,
142 .init_irq
= ixp4xx_init_irq
,
143 .timer
= &ixp4xx_timer
,
144 .boot_params
= 0x100,
145 .init_machine
= sg_init
,
149 #if defined(CONFIG_MACH_SG580) || defined(CONFIG_MACH_SGARMAUTO)
150 MACHINE_START(SG580
, "CyberGuard SG580")
151 /* Maintainer: Cyberguard Inc. */
152 .phys_io
= IXP4XX_PERIPHERAL_BASE_PHYS
,
153 .io_pg_offst
= ((IXP4XX_PERIPHERAL_BASE_VIRT
) >> 18) & 0xfffc,
155 .init_irq
= ixp4xx_init_irq
,
156 .timer
= &ixp4xx_timer
,
157 .boot_params
= 0x100,
158 .init_machine
= sg_init
,
162 #if defined(CONFIG_MACH_SG590) || defined(CONFIG_MACH_SGARMAUTO)
163 MACHINE_START(SG590
, "Secure Computing SG590")
164 /* Maintainer: Secure Computing Inc. */
165 .phys_io
= IXP4XX_PERIPHERAL_BASE_PHYS
,
166 .io_pg_offst
= ((IXP4XX_PERIPHERAL_BASE_VIRT
) >> 18) & 0xfffc,
168 .init_irq
= ixp4xx_init_irq
,
169 .timer
= &ixp4xx_timer
,
170 .boot_params
= 0x100,
171 .init_machine
= sg_init
,
175 #ifdef CONFIG_MACH_SE5100
176 MACHINE_START(SE5100
, "CyberGuard SE5100")
177 /* Maintainer: Cyberguard Inc. */
178 .phys_io
= IXP4XX_PERIPHERAL_BASE_PHYS
,
179 .io_pg_offst
= ((IXP4XX_PERIPHERAL_BASE_VIRT
) >> 18) & 0xfffc,
181 .init_irq
= ixp4xx_init_irq
,
182 .timer
= &ixp4xx_timer
,
183 .boot_params
= 0x100,
184 .init_machine
= sg_init
,
188 #ifdef CONFIG_MACH_ESS710
190 * Hard set the ESS710 memory size to be 128M. Early boot loaders
191 * passed in 64MB in their boot tags, but now we really can use the
192 * 128M that the hardware has.
197 struct machine_desc
*mdesc
,
202 struct tag
*t
= tags
;
204 for (; t
->hdr
.size
; t
= tag_next(t
)) {
205 if (t
->hdr
.tag
== ATAG_MEM
) {
206 printk("ESS710: fixing memory size from %dMiB to 128MiB\n",
207 t
->u
.mem
.size
/ (1024 * 1024));
208 t
->u
.mem
.start
= PHYS_OFFSET
;
209 t
->u
.mem
.size
= (128*1024*1024);
215 MACHINE_START(ESS710
, "CyberGuard SG710")
216 /* Maintainer: Cyberguard Inc. */
217 .phys_io
= IXP4XX_PERIPHERAL_BASE_PHYS
,
218 .io_pg_offst
= ((IXP4XX_PERIPHERAL_BASE_VIRT
) >> 18) & 0xfffc,
220 .fixup
= ess710_fixup
,
221 .init_irq
= ixp4xx_init_irq
,
222 .timer
= &ixp4xx_timer
,
223 .boot_params
= 0x100,
224 .init_machine
= sg_init
,
228 #if defined(CONFIG_MACH_SG720)
229 MACHINE_START(SG720
, "Secure Computing SG720")
230 /* Maintainer: Cyberguard Inc. */
231 .phys_io
= IXP4XX_PERIPHERAL_BASE_PHYS
,
232 .io_pg_offst
= ((IXP4XX_PERIPHERAL_BASE_VIRT
) >> 18) & 0xfffc,
234 .init_irq
= ixp4xx_init_irq
,
235 .timer
= &ixp4xx_timer
,
236 .boot_params
= 0x100,
237 .init_machine
= sg_init
,
241 #ifdef CONFIG_MACH_SG8100
242 MACHINE_START(SG8100
, "Secure Computing SG8100")
243 /* Maintainer: Secure Computing Inc. */
244 .phys_io
= IXP4XX_PERIPHERAL_BASE_PHYS
,
245 .io_pg_offst
= ((IXP4XX_PERIPHERAL_BASE_VIRT
) >> 18) & 0xfffc,
247 .init_irq
= ixp4xx_init_irq
,
248 .timer
= &ixp4xx_timer
,
249 .boot_params
= 0x100,
250 .init_machine
= sg_init
,