Correct svn:keywords and svn:eol-style on a few more files.
[kugel-rb/myfork.git] / firmware / drivers / m66591.c
blob5b3c4e1035a6a1a5c139039a0b1edc5884f7f313
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
10 * Copyright (C) 2009 by Karl Kurbjun
11 * Portions Copyright (C) 2007 by Catalin Patulea
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
21 ****************************************************************************/
22 #define LOGF_ENABLE
24 #include "system.h"
25 #include "config.h"
26 #include "string.h"
27 #include "usb_ch9.h"
28 #include "usb_core.h"
29 #include "kernel.h"
30 #include "panic.h"
31 #include "usb_drv.h"
32 #include "logf.h"
34 #include "config.h"
35 #include "cpu.h"
36 #include "ata.h"
37 #include "usb.h"
38 #include "usb-target.h"
39 #include "m66591.h"
41 /*******************************************************************************
42 * These are the driver specific defines.
43 ******************************************************************************/
44 #define HISPEED
46 /* Right now sending blocks till the full transfer has completed, this needs to
47 * be fixed so that it does not require a block. (USB_TRAN_LOCK ideally would
48 * not be set).
50 #define USB_TRAN_BLOCK
52 /*******************************************************************************
53 * The following functions are all helpers which should not be called directly
54 * from the USB stack. They should only be called by eachother, or the USB
55 * stack visible functions.
56 ******************************************************************************/
58 static volatile unsigned short * pipe_ctrl_addr(int pipe);
59 static void pipe_handshake(int pipe, int handshake);
60 static void pipe_c_select (int pipe, bool dir);
61 #if !defined(USB_TRAN_BLOCK)
62 static int pipe_buffer_size (int pipe);
63 #endif
64 static int pipe_maxpack_size (int pipe);
65 static void control_received(void);
66 static void transfer_complete(int endpoint);
67 static int mxx_transmit_receive(int endpoint);
68 static int mxx_queue(int endpoint, void * ptr, int length, bool send);
70 struct M66591_epstat {
71 unsigned char dir; /* endpoint direction */
72 char *buf; /* user buffer to store data */
73 int length; /* how match data will fit */
74 volatile int count; /* actual data count */
75 bool waiting; /* is there data to transfer? */
76 bool busy; /* has the pipe been requested for use? */
77 } ;
79 static struct M66591_epstat M66591_eps[USB_NUM_ENDPOINTS];
81 /* This function is used to return the control address for each pipe */
82 static volatile unsigned short * pipe_ctrl_addr(int pipe) {
83 if(pipe==0) {
84 return &M66591_DCPCTRL;
85 } else {
86 return &M66591_PIPECTRL1 + (pipe-1);
90 /* This function sets the pipe/endpoint handshake */
91 static void pipe_handshake(int pipe, int handshake) {
92 handshake&=0x03;
94 if(handshake == PIPE_SHAKE_STALL) {
95 if( *(pipe_ctrl_addr(pipe)) & 0x03 ) {
96 *(pipe_ctrl_addr(pipe)) = 0x03;
97 } else {
98 *(pipe_ctrl_addr(pipe)) = 0x02;
100 } else {
101 *(pipe_ctrl_addr(pipe)) = handshake;
105 /* This function chooses the pipe desired and waits the required time before
106 * warites/reads are valid */
107 static void pipe_c_select (int pipe, bool dir) {
108 M66591_CPORT_CTRL0 = pipe | (1<<10) | (dir<<5);
110 // Wait for the Pipe to be valid;
111 udelay(2);
114 #if !defined(USB_TRAN_BLOCK)
115 /* This returns the maximum buffer size of each pipe. On this device the size
116 * is fixed.
118 static int pipe_buffer_size (int pipe) {
119 switch(pipe) {
120 case 0:
121 return 256;
122 case 1:
123 case 2:
124 return 1024;
125 case 3:
126 case 4:
127 return 512;
128 case 5:
129 case 6:
130 return 64;
131 default:
132 return 0;
135 #endif
137 /* This function returns the maximum packet size for each endpoint/pipe. It is
138 * Currently only setup to support Highspeed mode.
140 static int pipe_maxpack_size (int pipe) {
141 switch(pipe) {
142 case 0:
143 /* DCP max packet size is configurable */
144 return M66591_DCP_MXPKSZ;
145 case 1:
146 case 2:
147 case 3:
148 case 4:
149 return 512;
150 case 5:
151 case 6:
152 return 64;
153 default:
154 return 0;
158 /* This is a helper function that is only called from the interupt handler. It
159 * copies the control packet information from the PHY and notifies the stack.
161 static void control_received(void) {
162 /* copy setup data from packet */
163 static struct usb_ctrlrequest temp;
165 memcpy(&temp, (unsigned char*)&M66591_USB_REQ0, 8);
167 logf("mxx: bReqType=0x%02x bReq=0x%02x wVal=0x%04x"
168 " wIdx=0x%04x wLen=0x%04x",
169 temp.bRequestType, temp.bRequest, temp.wValue,
170 temp.wIndex, temp.wLength);
172 /* acknowledge packet recieved (clear valid) */
173 M66591_INTSTAT_MAIN &= ~(1<<3);
175 usb_core_control_request(&temp);
178 /* This is a helper function, it is used to notife the stack that a transfer is
179 * done.
181 static void transfer_complete(int endpoint) {
182 M66591_INTCFG_EMP &= ~(1 << endpoint);
183 logf("mxx: ep %d transfer complete", endpoint);
184 int temp=M66591_eps[endpoint].dir ? USB_DIR_IN : USB_DIR_OUT;
185 usb_core_transfer_complete(endpoint, temp, 0,
186 M66591_eps[endpoint].length);
189 /* This is the main transmit routine that is typically called from the interrupt
190 * handler (the queue function calls it in some situations)
192 static int mxx_transmit_receive(int endpoint) {
193 logf("mxx: do start");
195 /* Only the lower 15 bits of the endpoint correlate to the pipe number.
196 * For example pipe 2 will corelate to endpoint 0x82, so the upper bits
197 * need to be masked out.
199 endpoint &= 0x7F;
201 int i; /* Used as a loop counter */
202 int length; /* Used in transfers to determine the amount to send/receive */
204 bool send=M66591_eps[endpoint].dir;
206 /* This is used as the internal buffer pointer */
207 unsigned short *ptrs;
209 /* Choose the pipe that data is being transfered on */
210 pipe_c_select(endpoint, send);
212 /* Check to see if the endpoint is ready and give it some time to become
213 * ready. If it runs out of time exit out as an error.
215 i = 0;
216 while (!(M66591_CPORT_CTRL1&(1<<13))) {
217 if (i++ > 100000) {
218 logf("mxx: FIFO %d not ready", endpoint);
219 return -1;
223 /* Write to FIFO */
224 if(send) {
225 int maxpack=pipe_maxpack_size(endpoint);
226 #if defined(USB_TRAN_BLOCK)
227 length = M66591_eps[endpoint].length;
228 #else
229 int bufsize=pipe_buffer_size(endpoint);
230 length=MIN(M66591_eps[endpoint].length, bufsize);
231 #endif
233 /* Calculate the position in the buffer, all transfers should be 2-byte
234 * aligned till the last packet or short packet.
236 ptrs = (unsigned short *)(M66591_eps[endpoint].buf
237 + M66591_eps[endpoint].count);
239 /* Start sending data in 16-bit words */
240 for (i = 0; i < (length>>1); i++) {
241 /* This wait is dangerous in the event htat something happens to
242 * the PHY pipe where it never becomes ready again, should probably
243 * add a timeout, and ideally completely remove.
245 while(!(M66591_CPORT_CTRL1&(1<<13))){};
247 M66591_CPORT = *ptrs++;
248 M66591_eps[endpoint].count+=2;
251 /* If the length is odd, send the last byte after setting the byte width
252 * of the FIFO.
254 if(length & 0x01) {
255 /* Unset MBW (8-bit transfer) */
256 M66591_CPORT_CTRL0 &= ~(1<<10);
257 M66591_CPORT = *((unsigned char *)ptrs - 1);
258 M66591_eps[endpoint].count++;
261 /* Set BVAL if length is not a multiple of the maximum packet size */
262 if( (length == 0) || (length % maxpack != 0) ) {
263 logf("mxx: do set BVAL");
264 M66591_CPORT_CTRL1 |= (1<<15);
267 /* If the transfer is complete set up interrupts to notify when FIFO is
268 * EMPTY, disable READY and let the handler know that there is nothing
269 * left to transfer on this pipe.
271 if(M66591_eps[endpoint].count == M66591_eps[endpoint].length) {
272 /* Enable Empty flag */
273 M66591_INTCFG_EMP |= 1 << endpoint;
274 /* Disable ready flag */
275 M66591_INTCFG_RDY &= ~(1 << endpoint);
276 /* Nothing left to transfer */
277 M66591_eps[endpoint].waiting=false;
278 } else {
279 /* There is still data to transfer, make sure READY is enabled */
280 M66591_INTCFG_RDY |= 1 << endpoint;
282 } else {
283 /* Read data from FIFO */
285 /* Read the number of bytes that the PHY received */
286 int receive_length=M66591_CPORT_CTRL1 & 0x03FF;
288 /* The number of bytes to actually read is either what's left of the
289 * amount requested, or the amount that the PHY received. Choose the
290 * smaller of the two.
292 length = MIN(M66591_eps[endpoint].length - M66591_eps[endpoint].count,
293 receive_length);
295 /* If the length is zero, just clear the buffer as specified in the
296 * datasheet. Otherwise read in the data (in 16-bit pieces */
297 if(length==0) {
298 /* Set the BCLR bit */
299 M66591_CPORT_CTRL1 |= 1<<14;
300 } else {
301 /* Set the position in the buffer */
302 ptrs = (unsigned short *)(M66591_eps[endpoint].buf
303 + M66591_eps[endpoint].count);
305 /* Read in the data (buffer size should be even). The PHY cannot
306 * switch from 16-bit mode to 8-bit mode on an OUT buffer.
308 for (i = 0; i < ((length+1)>>1); i++) {
309 *ptrs++ = M66591_CPORT;
310 M66591_eps[endpoint].count+=2;
314 /* If the length was odd subtract 1 from the count */
315 M66591_eps[endpoint].count -= (length&0x01);
317 /* If the requested size of data was received, or the data received was
318 * less than the maximum packet size end the transfer.
320 if( (M66591_eps[endpoint].count == M66591_eps[endpoint].length)
321 || (length % pipe_maxpack_size(endpoint)) ) {
323 /* If the host tries to send anything else the FIFO is not ready/
324 * enabled yet (NAK).
326 pipe_handshake(endpoint, PIPE_SHAKE_NAK);
327 /* Tell the interrupt handler that transfer is complete. */
328 M66591_eps[endpoint].waiting=false;
329 /* Disable ready */
330 M66591_INTCFG_RDY &= ~(1 << endpoint);
332 /* Let the stack know that the transfer is complete */
333 if(endpoint!=0)
334 transfer_complete(endpoint);
338 logf("mxx: do done ep %d %s len: %d cnt: %d", endpoint,
339 send ? "out" : "in", length, M66591_eps[endpoint].count);
341 return 0;
344 /* This function is used to start transfers. It is a helper function for the
345 * usb_drv_send_nonblocking, usb_drv_send, and usb_drv_receive functions.
347 static int mxx_queue(int endpoint, void * ptr, int length, bool send) {
348 /* Disable IRQs */
349 int flags = disable_irq_save();
351 /* Only the lower 15 bits of the endpoint correlate to the pipe number.
352 * For example pipe 2 will corelate to endpoint 0x82, so the upper bits
353 * need to be masked out.
355 endpoint &= 0x7F;
357 /* Initialize the enpoint status registers used for the transfer */
358 M66591_eps[endpoint].buf=ptr;
359 M66591_eps[endpoint].length=length;
360 M66591_eps[endpoint].count=0;
361 M66591_eps[endpoint].dir=send;
362 M66591_eps[endpoint].waiting=true;
364 logf("mxx: queue ep %d %s, len: %d", endpoint, send ? "out" : "in", length);
366 /* Pick the pipe that communications are happening on */
367 pipe_c_select(endpoint, send);
369 /* All transfers start with a BUF handshake */
370 pipe_handshake(endpoint, PIPE_SHAKE_BUF);
372 /* This USB PHY takes care of control completion packets by setting the
373 * CCPL bit in EP0 (endpoint 0, or DCP). If the control state is "write no
374 * data tranfer" then we just need to set the CCPL bit (hopefully)
375 * regardless of what the stack said to send.
377 int control_state = (M66591_INTSTAT_MAIN & 0x07);
378 if(endpoint==0 && control_state==CTRL_WTND) {
379 logf("mxx: queue ep 0 ctls: 5, set ccpl");
381 /* Set CCPL */
382 M66591_DCPCTRL |= 1<<2;
383 } else {
384 /* This is the standard case for transmitting data */
385 if(send) {
386 /* If the pipe is not ready don't try and send right away; instead
387 * just set the READY interrupt so that the handler can initiate
388 * the transfer.
390 if((M66591_CPORT_CTRL1&(1<<13))) {
391 mxx_transmit_receive(endpoint);
392 } else {
393 M66591_INTCFG_RDY |= 1 << endpoint;
396 if(length==0) {
397 transfer_complete(endpoint);
399 } else {
400 /* When receiving data, just enable the ready interrupt, the PHY
401 * will trigger it and then the reads can start.
403 M66591_INTCFG_RDY |= 1 << endpoint;
407 /* Re-enable IRQs */
408 restore_irq(flags);
409 return 0;
412 /*******************************************************************************
413 * This is the interrupt handler for this driver. It should be called from the
414 * target interrupt handler routine (eg. GPIO3 on M:Robe 500).
415 ******************************************************************************/
416 void USB_DEVICE(void) {
417 int pipe_restore=M66591_CPORT_CTRL0;
418 logf("mxx: INT BEGIN tick: %d\n", (int) current_tick);
420 logf("mxx: sMAIN0: 0x%04x, sRDY: 0x%04x",
421 M66591_INTSTAT_MAIN, M66591_INTSTAT_RDY);
422 logf("mxx: sNRDY: 0x%04x, sEMP: 0x%04x",
423 M66591_INTSTAT_NRDY, M66591_INTSTAT_EMP);
425 /* VBUS (connected) interrupt */
426 while ( M66591_INTSTAT_MAIN & (1<<15) ) {
427 M66591_INTSTAT_MAIN &= ~(1<<15);
429 /* If device is not clocked, interrupt flag must be set manually */
430 if ( !(M66591_TRN_CTRL & (1<<10)) ) {
431 M66591_INTSTAT_MAIN |= (1<<15);
435 /* Resume interrupt: This is not used. Extra logic needs to be added similar
436 * to the VBUS interrupt incase the PHY clock is not running.
438 if(M66591_INTSTAT_MAIN & (1<<14)) {
439 M66591_INTSTAT_MAIN &= ~(1<<14);
440 logf("mxx: RESUME");
443 /* Device state transition interrupt: Not used, but useful for debugging */
444 if(M66591_INTSTAT_MAIN & (1<<12)) {
445 M66591_INTSTAT_MAIN &= ~(1<<12);
446 logf("mxx: DEV state CHANGE=%d",
447 ((M66591_INTSTAT_MAIN & (0x07<<4)) >> 4) );
450 /* Control transfer stage interrupt */
451 if(M66591_INTSTAT_MAIN & (1<<11)) {
452 M66591_INTSTAT_MAIN &= ~(1<<11);
453 int control_state = (M66591_INTSTAT_MAIN & 0x07);
455 logf("mxx: CTRT with CTSQ=%d", control_state);
457 switch ( control_state ) {
458 case CTRL_IDLE:
459 transfer_complete(0);
460 break;
461 case CTRL_RTDS:
462 case CTRL_WTDS:
463 case CTRL_WTND:
464 // If data is not valid stop
465 if(!(M66591_INTSTAT_MAIN & (1<<3)) ) {
466 logf("mxx: CTRT interrupt but VALID is false");
467 break;
469 control_received();
470 break;
471 case CTRL_RTSS:
472 case CTRL_WTSS:
473 pipe_handshake(0, PIPE_SHAKE_BUF);
474 M66591_DCPCTRL |= 1<<2; // Set CCPL
475 break;
476 default:
477 logf("mxx: CTRT with unknown CTSQ");
478 break;
482 /* FIFO EMPTY interrupt: when this happens the transfer should be complete.
483 * When the interrupt occurs notify the stack.
485 if(M66591_INTSTAT_MAIN & (1<<10)) {
486 int i;
487 logf("mxx: INT EMPTY: 0x%04x", M66591_INTSTAT_EMP);
489 for(i=0; i<USB_NUM_ENDPOINTS; i++) {
490 if(M66591_INTSTAT_EMP&(1<<i)) {
491 /* Clear the empty flag */
492 M66591_INTSTAT_EMP=~(1<<i);
493 /* Notify the stack */
494 transfer_complete(i);
499 /* FIFO NOT READY interrupt: This is not used, but included incase the
500 * interrupt is endabled.
502 if(M66591_INTSTAT_MAIN & (1<<9)) {
503 logf("mxx: INT NOT READY: 0x%04x", M66591_INTSTAT_NRDY);
504 M66591_INTSTAT_NRDY = 0;
507 /* FIFO READY interrupt: This just initiates transfers if they are needed */
508 if(M66591_INTSTAT_MAIN & (1<<8)) {
509 int i;
510 logf("mxx: INT READY: 0x%04x", M66591_INTSTAT_RDY);
512 for(i=0; i<USB_NUM_ENDPOINTS; i++) {
513 /* Was this endpoint ready and waiting */
514 if(M66591_INTSTAT_RDY&(1<<i) && M66591_eps[i].waiting) {
515 /* Clear the ready flag */
516 M66591_INTSTAT_RDY=~(1<<i);
517 /* It was ready and waiting so start a transfer */
518 mxx_transmit_receive(i);
523 /* Make sure that the INTStatus register is completely cleared. */
524 M66591_INTSTAT_MAIN = 0;
526 /* Restore the pipe state before the interrupt occured */
527 M66591_CPORT_CTRL0=pipe_restore;
528 logf("\nmxx: INT END");
531 /*******************************************************************************
532 * The following functions are all called by and visible to the USB stack.
533 ******************************************************************************/
535 /* The M55691 handles this automatically, nothing to do */
536 void usb_drv_set_address(int address) {
537 (void) address;
540 /* This function sets the standard test modes, it is not required, but might as
541 * well implement it since the hardware supports it
543 void usb_drv_set_test_mode(int mode) {
544 /* This sets the test bits and assumes that mode is from 0 to 0x04 */
545 M66591_TESTMODE &= 0x0007;
546 M66591_TESTMODE |= mode;
549 /* Request an unused endpoint, support for interrupt endpoints needs addition */
550 int usb_drv_request_endpoint(int type, int dir) {
551 int ep;
552 int pipecfg = 0;
554 if (type != USB_ENDPOINT_XFER_BULK)
555 return -1;
557 /* The endpoint/pipes are hard coded: This could be more flexible */
558 if (dir == USB_DIR_IN) {
559 pipecfg |= (1<<4);
560 ep = 2;
561 } else {
562 ep = 1;
565 if (!M66591_eps[ep].busy) {
566 M66591_eps[ep].busy = true;
567 M66591_eps[ep].dir = dir;
568 } else {
569 logf("mxx: ep %d busy", ep);
570 return -1;
573 M66591_PIPE_CFGSEL=ep;
575 pipecfg |= 1<<15 | 1<<9 | 1<<8;
577 pipe_handshake(ep, PIPE_SHAKE_NAK);
579 // Setup the flags
580 M66591_PIPE_CFGWND=pipecfg;
582 logf("mxx: ep req ep#: %d config: 0x%04x", ep, M66591_PIPE_CFGWND);
584 return ep | dir;
587 /* Used by stack to tell the helper functions that the pipe is not in use */
588 void usb_drv_release_endpoint(int ep) {
589 int flags;
590 ep &= 0x7f;
592 if (ep < 1 || ep > USB_NUM_ENDPOINTS || M66591_eps[ep].busy == false)
593 return ;
595 flags = disable_irq_save();
597 logf("mxx: ep %d release", ep);
599 M66591_eps[ep].busy = false;
600 M66591_eps[ep].dir = -1;
602 restore_irq(flags);
605 /* Periodically called to check if a cable was plugged into the device */
606 inline int usb_detect(void)
608 if(M66591_INTSTAT_MAIN&(1<<7))
609 return USB_INSERTED;
610 else
611 return USB_EXTRACTED;
614 void usb_enable(bool on) {
615 logf("mxx: %s: %s", __FUNCTION__, on ? "true" : "false");
616 if (on)
617 usb_core_init();
618 else
619 usb_core_exit();
622 /* This is where the driver stuff starts */
623 void usb_drv_init(void) {
624 logf("mxx: Device Init");
626 /* State left behind by m:robe 500i original firmware */
627 M66591_TRN_CTRL = 0x8001; /* External 48 MHz clock */
628 M66591_TRN_LNSTAT = 0x0040; /* "Reserved. Set it to '1'." */
630 M66591_PIN_CFG0 = 0x0000;
631 M66591_PIN_CFG1 = 0x8000; /* Drive Current: 3.3V setting */
632 M66591_PIN_CFG2 = 0x0000;
634 M66591_INTCFG_MAIN = 0x0000; /* All Interrupts Disable for now */
635 M66591_INTCFG_OUT = 0x0000; /* Sense is edge, polarity is low */
636 M66591_INTCFG_RDY = 0x0000;
637 M66591_INTCFG_NRDY = 0x0000;
638 M66591_INTCFG_EMP = 0x0000;
640 M66591_INTSTAT_MAIN = 0;
641 M66591_INTSTAT_RDY = 0;
642 M66591_INTSTAT_NRDY = 0;
643 M66591_INTSTAT_EMP = 0;
646 /* fully enable driver */
647 void usb_attach(void) {
648 int i;
650 /* Reset Endpoint states */
651 for(i=0; i<USB_NUM_ENDPOINTS; i++) {
652 M66591_eps[i].dir = -1;
653 M66591_eps[i].buf = (char *) 0;
654 M66591_eps[i].length = 0;
655 M66591_eps[i].count = 0;
656 M66591_eps[i].waiting = false;
657 M66591_eps[i].busy = false;
660 /* Issue a h/w reset */
661 usb_init_device();
662 usb_drv_init();
664 /* USB Attach Process: This follows the flow diagram in the M66591GP
665 * Reference Manual Rev 1.00, p. 77 */
667 #if defined(HISPEED)
668 /* Run Hi-Speed */
669 M66591_TRN_CTRL |= 1<<7;
670 #else
671 /* Run Full-Speed */
672 M66591_TRN_CTRL &= ~(1<<7);
673 #endif
675 /* Enable oscillation buffer */
676 M66591_TRN_CTRL |= (1<<13);
678 udelay(1500);
680 /* Enable reference clock, PLL */
681 M66591_TRN_CTRL |= (3<<11);
683 udelay(9);
685 /* Enable internal clock supply */
686 M66591_TRN_CTRL |= (1<<10);
688 /* Disable PIPE ready interrupts */
689 M66591_INTCFG_RDY = 0;
691 /* Disable PIPE not-ready interrupts */
692 M66591_INTCFG_NRDY = 0;
694 /* Disable PIPE empyt/size error interrupts */
695 M66591_INTCFG_EMP = 0;
697 /* Enable all interrupts except NOT READY, RESUME, and VBUS */
698 M66591_INTCFG_MAIN = 0x1DFF;
700 pipe_c_select(0, false);
702 /* Enable continuous transfer mode on the DCP */
703 M66591_DCP_CNTMD |= (1<<8);
705 /* Set the threshold that the PHY will automatically transmit from EP0 */
706 M66591_DCP_CTRLEN = 128;
708 pipe_handshake(0, PIPE_SHAKE_NAK);
710 /* Set the Max packet size to 64 */
711 M66591_DCP_MXPKSZ = 64;
713 /* Attach notification to PC (D+ pull-up) */
714 M66591_TRN_CTRL |= (1<<4);
716 logf("mxx: attached");
719 void usb_drv_exit(void) {
720 /* USB Detach Process: This follows the flow diagram in the M66591GP
721 * Reference Manual Rev 1.00, p. 78.
724 /* Detach notification to PC (disable D+ pull-up) */
725 M66591_TRN_CTRL &= ~(1<<4);
727 /* Software reset */
728 M66591_TRN_CTRL &= ~0x01;
730 /* Disable internal clock supply */
731 M66591_TRN_CTRL &= ~(1<<10);
732 udelay(3);
734 /* Disable PLL */
735 M66591_TRN_CTRL &= ~(1<<11);
736 udelay(3);
738 /* Disable internal reference clock */
739 M66591_TRN_CTRL &= ~(1<<12);
740 udelay(3);
742 /* Disable oscillation buffer, reenable USB operation */
743 M66591_TRN_CTRL &= ~(1<<13);
745 M66591_TRN_CTRL |= 0x01;
747 logf("mxx: detached");
750 /* This function begins a transmit (on an IN endpoint), it should not block
751 * so the actual transmit is done in the interrupt handler.
753 int usb_drv_send_nonblocking(int endpoint, void* ptr, int length)
755 /* The last arguement for queue specifies the dir of data (true==send) */
756 return mxx_queue(endpoint, ptr, length, true);
759 /* This function begins a transmit (on an IN endpoint), it does not block
760 * so the actual transmit is done in the interrupt handler.
762 int usb_drv_send(int endpoint, void* ptr, int length)
764 /* The last arguement for queue specifies the dir of data (true==send) */
765 return mxx_queue(endpoint, ptr, length, true);
768 /* This function begins a receive (on an OUT endpoint), it should not block
769 * so the actual receive is done in the interrupt handler.
771 int usb_drv_recv(int endpoint, void* ptr, int length)
773 /* Last arguement for queue specifies the dir of data (false==receive) */
774 return mxx_queue(endpoint, ptr, length, false);
777 /* This function checks the reset handshake speed status
778 * (Fullspeed or Highspeed)
780 int usb_drv_port_speed(void)
782 int handshake = (M66591_HSFS & 0xFF);
784 if( handshake == 0x02) {
785 return 0; /* Handshook at Full-Speed */
786 } else if( handshake == 0x03) {
787 return 1; /* Handshook at Hi-Speed */
788 } else {
789 return -1; /* Error, handshake may not be complete */
793 /* This function checks if the endpoint is stalled (error). I am not sure what
794 * the "in" variable is intended for.
796 bool usb_drv_stalled(int endpoint,bool in)
798 (void) in;
800 bool stalled = (*(pipe_ctrl_addr(endpoint)) & (0x02)) ? true : false;
802 logf("mxx: stall?: %s ep: %d", stalled ? "true" : "false", endpoint);
804 if(stalled) {
805 return true;
806 } else {
807 return false;
811 /* This function stalls/unstalls the endpoint. Stalls only happen on error so
812 * if the endpoint is functioning properly this should not be called. I am
813 * not sure what the "in" variable is intended for.
815 void usb_drv_stall(int endpoint, bool stall,bool in)
817 (void) in;
819 logf("mxx: stall - ep: %d", endpoint);
821 if(stall) {
822 /* Stall the pipe (host needs to intervene/error) */
823 pipe_handshake(endpoint, PIPE_SHAKE_STALL);
824 } else {
825 /* Setting this to a NAK, not sure if it is appropriate */
826 pipe_handshake(endpoint, PIPE_SHAKE_NAK);
830 /* !!!!!!!!!!This function is likely incomplete!!!!!!!!!!!!!! */
831 void usb_drv_cancel_all_transfers(void)
833 int endpoint;
834 int flags;
836 logf("mxx: %s", __func__);
838 flags = disable_irq_save();
839 for (endpoint = 0; endpoint < USB_NUM_ENDPOINTS; endpoint++) {
840 if (M66591_eps[endpoint].buf) {
841 M66591_eps[endpoint].buf = NULL;
845 restore_irq(flags);