1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright (C) 2006 Daniel Ankers
11 * Copyright © 2008-2009 Rafaël Carré
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
21 ****************************************************************************/
23 #include "config.h" /* for HAVE_MULTIVOLUME */
34 #include "pl081.h" /* DMA controller */
35 #include "dma-target.h" /* DMA request lines */
36 #include "clock-target.h"
39 #include "ata_idle_notify.h"
47 static void printf(const char *format
, ...)
54 len
= vsnprintf(buf
, sizeof(buf
), format
, ap
);
57 lcd_puts(0, line
++, buf
);
59 if(line
>= LCD_HEIGHT
/SYSFONT_HEIGHT
)
64 #define MCI_NO_RESP (0<<0)
65 #define MCI_RESP (1<<0)
66 #define MCI_LONG_RESP (1<<1)
68 /* controller registers */
69 #define SD_BASE 0xC6070000
74 * m = modify (orr/bic), r = read, w = write
83 * 1C w ==> set a bit before transfer (sometimes) !
84 * 20 w ==> set a bit before transfer !
92 * 40 r irq status (only read in isr)
110 * INFO on CMD register
112 * if(cmd >= 200) cmd -= 200; (>= 200 = acmd?)
114 * COMMANDS (| (x<<16) BITS RESPONSE
116 * 1 ? reserved & ~0x80, | 0x40, | 0x8000 ?
117 * 5 ? reserved for I/O cards & ~0x80, | 0x40 ?
118 * 11 ? reserved & ~0x80, | 0x40, | 0x2200, | 0x800 ?
119 * 14 ? reserved & ~0x80, | 0x40, | 0x2200, ~0x1000 ?
120 * 19 ? reserved & ~0x80, |0x40, | 0x2700, & ~0x1000 ?
121 * 20 ? reserved & ~0x80, |0x40, | 0x2700, | 0x800 ?
122 * 23 ? reserved & ~0x80, | 0x40 ?
123 * 39 ? reserved & ~0x80, | 0x40 ?
124 * 51 ? reserved & ~0x80, | 0x40, | 0x2000, | 0x200 ?
125 * 52 ? reserved for I/O & ~0x80, | 0x40 ?
126 * 53 ? reserved for I/O & ~0x80, | 0x40, | 0x2200, & ~0x1000 ?
127 * 253 ? & ~0x80, |0x40, | 0x2700, & ~0x1000 ?
129 * 0 GO IDLE STATE & ~0x4000, & ~0xC0, | 0x4000 no
130 * 2 ALL SEND CID & ~0x4000, |0xC0 r2
131 * 3 SEND RCA & ~0x80, | 0x40 r6
132 * 6 SWITCH_FUNC & ~0x80, | 0x40 r1
133 * 7 SELECT CARD & ~0x80, | 0x40 r1b
134 * 8 SEND IF COND & ~0x80, | 0x40, | 0x2200, & ~0x1000 r7
135 * 9 SEND CSD & ~0x4000, | 0xc0 r2
136 * 12 STOP TRANSMISSION & ~0x80, | 0x40, | 0x4000 r1b
137 * 13 SEND STATUS & ~0x80, | 0x40 r1
138 * 15 GO INACTIVE STATE & ~0x4000, & ~0xC0 no
139 * 16 SET BLOCKLEN & ~0x80, | 0x40 r1
140 * 17 READ SINGLE BLOCK & ~0x80, | 0x40, | 0x2200 r1
141 * 18 READ MULTIPLE BLOCK & ~0x80, | 0x40, | 0x2200 r1
142 * 24 WRITE BLOCK & ~0x80, |0x40, | 0x2700 r1
143 * 25 WRITE MULTIPLE BLOCK & ~0x80, |0x40, | 0x2700 r1
144 * 41 SEND APP OP COND & ~0x80, | 0x40 r3
145 * 42 LOCK UNLOCK & ~0x80, |0x40, | 0x2700 r1
146 * 55 APP CMD & ~0x80, | 0x40 r1
147 * 206 SET BUS WIDTH & ~0x80, | 0x40, | 0x2000 r1
148 * 207 SELECT CARD ? & ~0x4000, & ~0xC0 r1b
152 * bit 6 (0x40) = response
153 * bit 7 (0x80) = long response
155 * BIT SET IN COMANDS:
157 * bit 8 (0x100) ? write block, write multi_block, lock/unlock
158 * bit 9 (0x200) ? send if cond, read block, read multi_block, write block, write multi_block, lock/unlock
159 * bit 10 (0x400) ? write block, write multi_block, lock/unlock
162 * bit 13 (0x2000) ? send if cond, read block, read multi_block, write block, write multi_block, lock/unlock, set bus width
163 * bit 14 (0x4000) ? go idle state, stop transmission
171 #define MCI_ARGUMENT (*(volatile unsigned long *) (SD_BASE+0x28))
172 #define MCI_COMMAND (*(volatile unsigned long *) (SD_BASE+0x2C))
174 #define MCI_RESP0 (*(volatile unsigned long *) (SD_BASE+0x30))
175 #define MCI_RESP1 (*(volatile unsigned long *) (SD_BASE+0x34))
176 #define MCI_RESP2 (*(volatile unsigned long *) (SD_BASE+0x38))
177 #define MCI_RESP3 (*(volatile unsigned long *) (SD_BASE+0x3C))
178 #define MCI_DATA_TIMER
179 #define MCI_DATA_LENGTH
180 #define MCI_DATA_CTRL
181 #define MCI_STATUS (*(volatile unsigned long *) (SD_BASE+0x40))
182 #define MCI_CLEAR (*(volatile unsigned long *) (SD_BASE+0x44))
183 #define MCI_MASK (*(volatile unsigned long *) (SD_BASE+0x24))
186 #define MCI_ERROR 0 /* FIXME */
188 #define MCI_FIFO ((unsigned long *) (SD_BASE+0x100))
190 #define MCI_COMMAND_ENABLE (1<<31)
191 #define MCI_COMMAND_ACTIVE MCI_COMMAND_ENABLE
192 #define MCI_COMMAND_RESPONSE (1<<6)
193 #define MCI_COMMAND_LONG_RESPONSE (1<<7)
197 static int sd_init_card(void);
198 static void init_controller(void);
200 static tCardInfo card_info
;
202 /* for compatibility */
203 static long last_disk_activity
= -1;
205 #define MIN_YIELD_PERIOD 5 /* ticks */
206 static long next_yield
= 0;
208 static long sd_stack
[(DEFAULT_STACK_SIZE
*2 + 0x200)/sizeof(long)];
209 static const char sd_thread_name
[] = "ata/sd";
210 static struct mutex sd_mtx SHAREDBSS_ATTR
;
211 static struct event_queue sd_queue
;
213 static bool sd_enabled
= false;
216 static struct wakeup transfer_completion_signal
;
217 static volatile bool retry
;
219 static inline void mci_delay(void) { int i
= 0xffff; while(i
--) ; }
223 (*(volatile unsigned long *) (SD_BASE
+0x0)) &= ~0x10; // ?
224 const int status
= MCI_STATUS
;
227 if(status
& MCI_ERROR
)
231 // wakeup_signal(&transfer_completion_signal);
237 case 0x4: /* cmd received ? */
238 case 0x104: /* ? 1 time in init (10th interrupt) */
239 case 0x2000: /* ? after cmd read_mul_blocks | 0x2200 */
241 case 0x820: /* ? 1 time while copy from FIFO (not DMA) */
242 case 0x20: /* ? rx fifo empty */
245 printf("%2d NAND 0x%x", ++x
, status
);
246 int delay
= 0x100000; while(delay
--) ;
249 * 0x48 = some kind of status
262 * read resp (6, 7, 12, 42) : while bit 9 is unset ;
265 printf("%x %x", status
, (*(volatile unsigned long *) (SD_BASE
+0x48)));
266 //while(!button_read_device());
267 //while(button_read_device());
269 (*(volatile unsigned long *) (SD_BASE
+0x0)) |= 0x10; // ?
272 static bool send_cmd(const int cmd
, const int arg
, const int flags
,
273 unsigned long *response
)
276 val
= cmd
| MCI_COMMAND_ENABLE
;
279 val
|= MCI_COMMAND_RESPONSE
;
280 if(flags
& MCI_LONG_RESP
)
281 val
|= MCI_COMMAND_LONG_RESPONSE
;
284 if(cmd
== 18) /* r */
286 else if(cmd
== 25) /* w */
289 int tmp
= (*(volatile unsigned long *) (SD_BASE
+0x10));
290 (*(volatile unsigned long *) (SD_BASE
+0x10)) = 0;
292 MCI_COMMAND
= 0x80202000;
295 while(max
-- && MCI_COMMAND
& MCI_COMMAND_ACTIVE
);
297 (*(volatile unsigned long *) (SD_BASE
+0x08)) &= ~0xff;
298 (*(volatile unsigned long *) (SD_BASE
+0x08)) |= 0;
300 MCI_COMMAND
= 0x80202000;
303 while(max
-- && MCI_COMMAND
& MCI_COMMAND_ACTIVE
);
305 (*(volatile unsigned long *) (SD_BASE
+0x10)) = tmp
;
307 MCI_COMMAND
= 0x80202000;
310 while(max
-- && MCI_COMMAND
& MCI_COMMAND_ACTIVE
);
317 (*(volatile unsigned long *) (SD_BASE
+0x00)) |= 0x10;
320 while(max
-- && MCI_COMMAND
& MCI_COMMAND_ACTIVE
); /* wait for cmd completion */
326 if(flags
& MCI_LONG_RESP
)
328 /* store the response in little endian order for the words */
329 response
[0] = MCI_RESP3
;
330 response
[1] = MCI_RESP2
;
331 response
[2] = MCI_RESP1
;
332 response
[3] = MCI_RESP0
;
335 response
[0] = MCI_RESP0
;
340 static int sd_init_card(void)
342 unsigned long response
;
343 unsigned long temp_reg
[4];
344 int max_tries
= 100; /* max acmd41 attemps */
348 if(!send_cmd(SD_GO_IDLE_STATE
, 0, MCI_NO_RESP
, NULL
))
354 if(send_cmd(SD_SEND_IF_COND
, 0x1AA, MCI_RESP
, &response
))
355 if((response
& 0xFFF) == 0x1AA)
359 /* some MicroSD cards seems to need more delays, so play safe */
365 if( !send_cmd(SD_APP_CMD
, 0, MCI_RESP
, &response
) /*||
366 !(response & (1<<5))*/ )
372 if(!send_cmd(SD_APP_OP_COND
, (sdhc
? 0x40FF8000 : (1<<23)),
373 MCI_RESP
, &card_info
.ocr
))
375 } while(!(card_info
.ocr
& (1<<31)) && max_tries
--);
385 if(!send_cmd(SD_ALL_SEND_CID
, 0, MCI_RESP
|MCI_LONG_RESP
, card_info
.cid
))
389 if(!send_cmd(SD_SEND_RELATIVE_ADDR
, 0, MCI_RESP
, &card_info
.rca
))
393 if(!send_cmd(SD_SEND_CSD
, card_info
.rca
,
394 MCI_RESP
|MCI_LONG_RESP
, temp_reg
))
398 card_info
.csd
[3-i
] = temp_reg
[i
];
400 sd_parse_csd(&card_info
);
402 if(!send_cmd(SD_APP_CMD
, 0, MCI_RESP
, &response
) ||
403 !send_cmd(42, 0, MCI_NO_RESP
, NULL
)) /* disconnect the 50 KOhm pull-up
404 resistor on CD/DAT3 */
407 if(!send_cmd(SD_APP_CMD
, card_info
.rca
, MCI_NO_RESP
, NULL
))
410 if(!send_cmd(SD_SET_BUS_WIDTH
, card_info
.rca
| 2, MCI_NO_RESP
, NULL
))
413 (*(volatile unsigned long *) (SD_BASE
+0x18)) &= ~(0x10001);
414 (*(volatile unsigned long *) (SD_BASE
+0x18)) |= 0x1;
416 if(!send_cmd(SD_SELECT_CARD
, card_info
.rca
, MCI_NO_RESP
, NULL
))
419 /* not sent in init_card() by OF */
420 if(!send_cmd(SD_SET_BLOCKLEN
, card_info
.blocksize
, MCI_NO_RESP
,
424 card_info
.initialized
= 1;
429 static void sd_thread(void) __attribute__((noreturn
));
430 static void sd_thread(void)
432 struct queue_event ev
;
433 bool idle_notified
= false;
437 queue_wait_w_tmo(&sd_queue
, &ev
, HZ
);
442 if (TIME_BEFORE(current_tick
, last_disk_activity
+(3*HZ
)))
444 idle_notified
= false;
448 /* never let a timer wrap confuse us */
449 next_yield
= current_tick
;
453 call_storage_idle_notifys(false);
454 idle_notified
= true;
459 case SYS_USB_CONNECTED
:
460 usb_acknowledge(SYS_USB_CONNECTED_ACK
);
461 /* Wait until the USB cable is extracted again */
462 usb_wait_for_disconnect(&sd_queue
);
465 case SYS_USB_DISCONNECTED
:
466 usb_acknowledge(SYS_USB_DISCONNECTED_ACK
);
473 static void init_controller(void)
475 int tmp
= (*(volatile unsigned long *) (SD_BASE
+0x70));
476 int shift
= 1 + ((tmp
<< 26) >> 27);
478 (*(volatile unsigned long *) (SD_BASE
+0x04)) &= ~((1 << shift
) -1);
479 (*(volatile unsigned long *) (SD_BASE
+0x04)) = (1 << shift
) -1;
483 (*(volatile unsigned long *) (SD_BASE
+0x00)) |= 1;
485 while(max
-- && !(*(volatile unsigned long *) (SD_BASE
+0x00)) & 1)
488 MCI_CLEAR
= 0xffffffff;
489 MCI_MASK
= 0xffffbffe;
491 (*(volatile unsigned long *) (SD_BASE
+0x00)) |= 0x10;
492 (*(volatile unsigned long *) (SD_BASE
+0x14)) = 0xffffffff;
494 (*(volatile unsigned long *) (SD_BASE
+0x10)) = (1<<shift
) - 1;
497 MCI_COMMAND
= 0x80202000;
499 while(max
-- && (MCI_COMMAND
& (1<<31))) ;
501 (*(volatile unsigned long *) (SD_BASE
+0x64)) = 0xfffff;
503 (*(volatile unsigned long *) (SD_BASE
+0x4c)) = ~0x7fff0fff; // interrupt mask ?
504 (*(volatile unsigned long *) (SD_BASE
+0x4c)) |= 0x503f0080;
506 MCI_MASK
= 0xffffbffe;
512 CGU_PERI
|= CGU_MCI_CLOCK_ENABLE
;
514 CGU_IDE
= (1<<7) /* AHB interface enable */ |
515 (1<<6) /* interface enable */ |
516 ((CLK_DIV(AS3525_PLLA_FREQ
, AS3525_IDE_FREQ
) - 1) << 2) |
517 1; /* clock source = PLLA */
519 CGU_MEMSTICK
= (1<<8) | (1<<7) |
520 (CLK_DIV(AS3525_PLLA_FREQ
, AS3525_MS_FREQ
) -1) | 1;
523 *(volatile int*)0xC80F003C = (1<<7) |
524 (CLK_DIV(AS3525_PLLA_FREQ
, 24000000) -1) | 1;
526 wakeup_init(&transfer_completion_signal
);
528 VIC_INT_ENABLE
|= INTERRUPT_NAND
;
531 ret
= sd_init_card();
538 queue_init(&sd_queue
, true);
539 create_thread(sd_thread
, sd_stack
, sizeof(sd_stack
), 0,
540 sd_thread_name
IF_PRIO(, PRIORITY_USER_INTERFACE
) IF_COP(, CPU
));
549 #ifdef STORAGE_GET_INFO
550 void sd_get_info(struct storage_info
*info
)
552 info
->sector_size
=card_info
.blocksize
;
553 info
->num_sectors
=card_info
.numblocks
;
554 info
->vendor
="Rockbox";
555 info
->product
= "Internal Storage";
556 info
->revision
="0.00";
560 static int sd_wait_for_state(unsigned int state
)
562 unsigned long response
;
563 unsigned int timeout
= 100; /* ticks */
564 long t
= current_tick
;
570 if(!send_cmd(SD_SEND_STATUS
, card_info
.rca
,
571 MCI_RESP
, &response
))
574 if (((response
>> 9) & 0xf) == state
)
577 if(TIME_AFTER(current_tick
, t
+ timeout
))
578 return -10 * ((response
>> 9) & 0xf);
580 if (TIME_AFTER((tick
= current_tick
), next_yield
))
583 timeout
+= current_tick
- tick
;
584 next_yield
= tick
+ MIN_YIELD_PERIOD
;
589 static int sd_transfer_sectors(unsigned long start
, int count
, void* buf
, bool write
)
594 panicf("unaligned transfer");
596 /* skip SanDisk OF */
604 if (card_info
.initialized
<= 0)
606 ret
= sd_init_card();
607 if (!(card_info
.initialized
))
609 panicf("card not initialised (%d)", ret
);
610 goto sd_transfer_error
;
614 last_disk_activity
= current_tick
;
615 ret
= sd_wait_for_state(SD_TRAN
);
618 static const char *st
[9] = {
619 "IDLE", "RDY", "IDENT", "STBY", "TRAN", "DATA", "RCV", "PRG", "DIS"
622 panicf("wait for state failed (%s)", st
[(-ret
/ 10) % 9]);
624 panicf("wait for state failed");
625 goto sd_transfer_error
;
632 /* Interrupt handler might set this to true during transfer */
634 /* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH
635 * register, so we have to transfer maximum 127 sectors at a time. */
636 //unsigned int transfer = (count >= 128) ? 127 : count; /* sectors */
637 unsigned int transfer
= count
;
640 write
? SD_WRITE_MULTIPLE_BLOCK
: SD_READ_MULTIPLE_BLOCK
;
643 (*(volatile unsigned long *) (SD_BASE
+0x00)) |= 2;
644 while(( *(volatile unsigned long *) (SD_BASE
+0x00)) & 2) ;
646 //(*(volatile unsigned long *) (SD_BASE+0x1c)) = 512;
647 (*(volatile unsigned long *) (SD_BASE
+0x20)) = transfer
* 512;
649 (*(volatile unsigned long *) (SD_BASE
+0x00)) |= 2;
650 while(( *(volatile unsigned long *) (SD_BASE
+0x00)) & 2) ;
652 (*(volatile unsigned long *) (SD_BASE
+0x4c)) &= ~0x7fff0fff;
654 (*(volatile unsigned long *) (SD_BASE
+0x00)) |= 0x20;
656 (*(volatile unsigned long *) (SD_BASE
+0x4c)) |= 0x503f0080;
659 if(card_info
.ocr
& (1<<30) ) /* SDHC */
660 ret
= send_cmd(cmd
, start
, MCI_NO_RESP
, NULL
);
662 ret
= send_cmd(cmd
, start
* SD_BLOCK_SIZE
,
666 panicf("transfer multiple blocks failed (%d)", ret
);
669 dma_enable_channel(0, buf
, MCI_FIFO
, DMA_PERI_SD
,
670 DMAC_FLOWCTRL_PERI_MEM_TO_PERI
, true, false, 0, DMA_S8
, NULL
);
672 dma_enable_channel(0, MCI_FIFO
, buf
, DMA_PERI_SD
,
673 DMAC_FLOWCTRL_PERI_PERI_TO_MEM
, false, true, 0, DMA_S8
, NULL
);
679 wakeup_wait(&transfer_completion_signal
, TIMEOUT_BLOCK
);
682 int delay
= 0x1000000; while(delay
--) ;
686 buf
+= transfer
* SECTOR_SIZE
;
691 last_disk_activity
= current_tick
;
693 if(!send_cmd(SD_STOP_TRANSMISSION
, 0, MCI_NO_RESP
, NULL
))
696 panicf("STOP TRANSMISSION failed");
697 goto sd_transfer_error
;
700 ret
= sd_wait_for_state(SD_TRAN
);
703 panicf(" wait for state TRAN failed (%d)", ret
);
704 goto sd_transfer_error
;
713 mutex_unlock(&sd_mtx
);
717 panicf("transfer error : %d",ret
);
718 card_info
.initialized
= 0;
722 int sd_read_sectors(unsigned long start
, int count
, void* buf
)
724 return sd_transfer_sectors(start
, count
, buf
, false);
727 int sd_write_sectors(unsigned long start
, int count
, const void* buf
)
729 #if defined(BOOTLOADER) /* we don't need write support in bootloader */
735 return sd_transfer_sectors(start
, count
, (void*)buf
, true);
740 long sd_last_disk_activity(void)
742 return last_disk_activity
;
745 void sd_enable(bool on
)
752 tCardInfo
*card_get_info_target(int card_no
)
758 #endif /* BOOTLOADER */