1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright © 2008 Rafaël Carré
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
23 #include "debug-target.h"
30 #include "ascodec-target.h"
35 #define OFF "Disabled"
37 #define CP15_MMU (1<<0) /* mmu off/on */
38 #define CP15_DC (1<<2) /* dcache off/on */
39 #define CP15_IC (1<<12) /* icache off/on */
41 #define CLK_MAIN 24000000 /* 24 MHz */
54 #define CLK_SD_MCLK_NAND 11
55 #define CLK_SD_MCLK_MSD 12
58 #define I2C2_CPSR0 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x1C))
59 #define I2C2_CPSR1 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x20))
60 #define MCI_NAND *((volatile unsigned long *)(NAND_FLASH_BASE + 0x04))
61 #define MCI_SD *((volatile unsigned long *)(SD_MCI_BASE + 0x04))
63 extern bool sd_enabled
;
65 /* FIXME: target tree is including ./debug-target.h rather than the one in
66 * sansa-fuze/, even though deps contains the correct one
67 * if I put the below into a sansa-fuze/debug-target.h, it doesn't work*/
68 #if defined(SANSA_FUZE) || defined(SANSA_E200V2) || defined(SANSA_C200V2)
70 #include "dbop-as3525.h"
73 static inline unsigned read_cp15 (void)
77 "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n" : "=r"(cp15_value
));
81 static int calc_freq(int clk
)
83 unsigned int prediv
= ((unsigned int)CGU_PROC
>>2) & 0x3;
84 unsigned int postdiv
= ((unsigned int)CGU_PROC
>>4) & 0xf;
85 #if CONFIG_CPU == AS3525
89 /* clk_main = clk_int = 24MHz oscillator */
91 if(CGU_PLLASUP
& (1<<3))
94 /*assume 24MHz oscillator only input available */
95 out_div
= ((CGU_PLLA
>>13) & 0x3); /* bits 13:14 */
96 if (out_div
== 3) /* for 11 NO=4 */
98 if(out_div
) /* NO = 0 not allowed */
99 return ((2 * (CGU_PLLA
& 0xff))*CLK_MAIN
)/
100 (((CGU_PLLA
>>8) & 0x1f)*out_div
);
103 if(CGU_PLLBSUP
& (1<<3))
106 /*assume 24MHz oscillator only input available */
107 out_div
= ((CGU_PLLB
>>13) & 0x3); /* bits 13:14 */
108 if (out_div
== 3) /* for 11 NO=4 */
110 if(out_div
) /* NO = 0 not allowed */
111 return ((2 * (CGU_PLLB
& 0xff))*CLK_MAIN
)/
112 (((CGU_PLLB
>>8) & 0x1f)*out_div
);
120 if(CGU_PLLASUP
& (1<<3))
123 f
= (CGU_PLLA
& 0x7F) + 1;
124 r
= ((CGU_PLLA
>> 7) & 0x7) + 1;
125 od
= (CGU_PLLA
>> 10) & 1 ? 2 : 1;
126 return (CLK_MAIN
/ 2) * f
/ (r
* od
);
129 if(CGU_PLLBSUP
& (1<<3))
132 f
= (CGU_PLLB
& 0x7F) + 1;
133 r
= ((CGU_PLLB
>> 7) & 0x7) + 1;
134 od
= (CGU_PLLB
>> 10) & 1 ? 2 : 1;
135 return (CLK_MAIN
/ 2) * f
/ (r
* od
);
138 #if CONFIG_CPU == AS3525 /* not in arm926-ejs */
139 if (!(read_cp15()>>30)) /* fastbus */
140 return calc_freq(CLK_PCLK
);
141 else /* Synch or Asynch bus*/
142 #endif /* CONFIG_CPU == AS3525 */
143 return calc_freq(CLK_FCLK
);
145 switch(CGU_PROC
& 3) {
147 return (CLK_MAIN
* (8 - prediv
)) / (8 * (postdiv
+ 1));
149 return (calc_freq(CLK_PLLA
) * (8 - prediv
)) /
152 return (calc_freq(CLK_PLLB
) * (8 - prediv
)) /
158 #if CONFIG_CPU == AS3525
159 switch(CGU_PERI
& 3) {
161 /* bits 1:0 of CGU_PERI always read as 0 and source = FCLK */
165 return CLK_MAIN
/(((CGU_PERI
>>2)& 0xf)+1);
167 return calc_freq(CLK_PLLA
)/(((CGU_PERI
>>2)& 0xf)+1);
169 return calc_freq(CLK_PLLB
)/(((CGU_PERI
>>2)& 0xf)+1);
172 return calc_freq(CLK_FCLK
)/(((CGU_PERI
>>2)& 0xf)+1);
175 return calc_freq(CLK_EXTMEM
)/(((CGU_PERI
>>6)& 0x1)+1);
177 switch(CGU_IDE
& 3) {
179 return CLK_MAIN
/(((CGU_IDE
>>2)& 0xf)+1);
181 return calc_freq(CLK_PLLA
)/(((CGU_IDE
>>2)& 0xf)+1);
183 return calc_freq(CLK_PLLB
)/(((CGU_IDE
>>2)& 0xf)+1);
188 return calc_freq(CLK_PCLK
)/AS3525_I2C_PRESCALER
;
190 switch((CGU_AUDIO
>>12) & 3) {
192 return CLK_MAIN
/(((CGU_AUDIO
>>14) & 0x1ff)+1);
194 return calc_freq(CLK_PLLA
)/(((CGU_AUDIO
>>14) & 0x1ff)+1);
196 return calc_freq(CLK_PLLB
)/(((CGU_AUDIO
>>14) & 0x1ff)+1);
201 switch(CGU_AUDIO
& 3) {
203 return CLK_MAIN
/(((CGU_AUDIO
>>2) & 0x1ff)+1);
205 return calc_freq(CLK_PLLA
)/(((CGU_AUDIO
>>2) & 0x1ff)+1);
207 return calc_freq(CLK_PLLB
)/(((CGU_AUDIO
>>2) & 0x1ff)+1);
212 return calc_freq(CLK_PCLK
)/((CGU_DBOP
& 7)+1);
213 #if CONFIG_CPU == AS3525
214 case CLK_SD_MCLK_NAND
:
215 if(!(MCI_NAND
& (1<<8)))
217 else if(MCI_NAND
& (1<<10))
218 return calc_freq(CLK_IDE
);
220 return calc_freq(CLK_IDE
)/(((MCI_NAND
& 0xff)+1)*2);
221 case CLK_SD_MCLK_MSD
:
222 if(!(MCI_SD
& (1<<8)))
224 else if(MCI_SD
& (1<<10))
225 return calc_freq(CLK_PCLK
);
227 return calc_freq(CLK_PCLK
)/(((MCI_SD
& 0xff)+1)*2);
230 switch(CGU_USB
& 3) { /* 0-> div=1 other->div=1/(2*n) */
232 if (!((CGU_USB
>>2) & 0x7))
235 return CLK_MAIN
/(2*((CGU_USB
>>2) & 0x7));
237 if (!((CGU_USB
>>2) & 0x7))
238 return calc_freq(CLK_PLLA
);
240 return calc_freq(CLK_PLLA
)/(2*((CGU_USB
>>2) & 0x7));
242 if (!((CGU_USB
>>2) & 0x7))
243 return calc_freq(CLK_PLLB
);
245 return calc_freq(CLK_PLLB
)/(2*((CGU_USB
>>2) & 0x7));
254 bool __dbg_hw_info(void)
257 #if CONFIG_CPU == AS3525
259 #ifdef HAVE_MULTIDRIVE
262 #endif /* CONFIG_CPU == AS3525 */
265 lcd_setfont(FONT_SYSFIXED
);
274 lcd_puts(0, line
++, "[Submodel:]");
275 lcd_putsf(0, line
++, "C200v2 variant %d", c200v2_variant
);
277 int btn
= button_get_w_tmo(HZ
/10);
278 if(btn
== (DEBUG_CANCEL
|BUTTON_REL
))
280 else if(btn
== (BUTTON_DOWN
|BUTTON_REL
))
288 lcd_puts(0, line
++, "[Clock Frequencies:]");
289 lcd_puts(0, line
++, " SET ACTUAL");
290 #if CONFIG_CPU == AS3525
291 lcd_putsf(0, line
++, "922T:%s %3dMHz",
292 (!(read_cp15()>>30)) ? "FAST " :
293 (read_cp15()>>31) ? "ASYNC" : "SYNC ",
295 lcd_putsf(0, line
++, "926ejs: %3dMHz",
297 calc_freq(CLK_PROC
)/1000000);
298 lcd_putsf(0, line
++, "PLLA:%3dMHz %3dMHz", AS3525_PLLA_FREQ
/1000000,
299 calc_freq(CLK_PLLA
)/1000000);
300 lcd_putsf(0, line
++, "PLLB: %3dMHz", calc_freq(CLK_PLLB
)/1000000);
301 lcd_putsf(0, line
++, "FCLK: %3dMHz", calc_freq(CLK_FCLK
)/1000000);
302 lcd_putsf(0, line
++, "DRAM:%3dMHz %3dMHz", AS3525_PCLK_FREQ
/1000000,
303 calc_freq(CLK_EXTMEM
)/1000000);
304 lcd_putsf(0, line
++, "PCLK:%3dMHz %3dMHz", AS3525_PCLK_FREQ
/1000000,
305 calc_freq(CLK_PCLK
)/1000000);
307 #if LCD_HEIGHT < 176 /* clip */
309 int btn
= button_get_w_tmo(HZ
/10);
310 if(btn
== (DEBUG_CANCEL
|BUTTON_REL
))
312 else if(btn
== (BUTTON_DOWN
|BUTTON_REL
))
319 #endif /* LCD_HEIGHT < 176 */
321 lcd_putsf(0, line
++, "IDE :%3dMHz %3dMHz", AS3525_IDE_FREQ
/1000000,
322 calc_freq(CLK_IDE
)/1000000);
323 lcd_putsf(0, line
++, "DBOP:%3dMHz %3dMHz", AS3525_DBOP_FREQ
/1000000,
324 calc_freq(CLK_DBOP
)/1000000);
325 lcd_putsf(0, line
++, "I2C :%3dkHz %3dkHz", AS3525_I2C_FREQ
/1000,
326 calc_freq(CLK_I2C
)/1000);
327 lcd_putsf(0, line
++, "I2SI: %s %3dMHz", (CGU_AUDIO
& (1<<23)) ?
328 "on " : "off" , calc_freq(CLK_I2SI
)/1000000);
329 lcd_putsf(0, line
++, "I2SO: %s %3dMHz", (CGU_AUDIO
& (1<<11)) ?
330 "on " : "off", calc_freq(CLK_I2SO
)/1000000);
331 #if CONFIG_CPU == AS3525
332 /* If disabled, enable SD cards so we can read the registers */
333 if(sd_enabled
== false)
336 last_nand
= MCI_NAND
;
337 #ifdef HAVE_MULTIDRIVE
343 lcd_putsf(0, line
++, "SD :%3dMHz %3dMHz",
344 ((AS3525_IDE_FREQ
/ 1000000) /
345 ((last_nand
& MCI_CLOCK_BYPASS
)? 1:(((last_nand
& 0xff)+1) * 2))),
346 calc_freq(CLK_SD_MCLK_NAND
)/1000000);
347 #ifdef HAVE_MULTIDRIVE
348 lcd_putsf(0, line
++, "uSD :%3dMHz %3dMHz",
349 ((AS3525_PCLK_FREQ
/ 1000000) /
350 ((last_sd
& MCI_CLOCK_BYPASS
) ? 1: (((last_sd
& 0xff) + 1) * 2))),
351 calc_freq(CLK_SD_MCLK_MSD
)/1000000);
353 #endif /* CONFIG_CPU == AS3525 */
354 lcd_putsf(0, line
++, "USB : %3dMHz", calc_freq(CLK_USB
)/1000000);
356 #if LCD_HEIGHT < 176 /* clip */
358 int btn
= button_get_w_tmo(HZ
/10);
359 if(btn
== (DEBUG_CANCEL
|BUTTON_REL
))
361 else if(btn
== (BUTTON_DOWN
|BUTTON_REL
))
368 #endif /* LCD_HEIGHT < 176 */
370 lcd_putsf(0, line
++, "MMU : %s CVDDP:%4d", (read_cp15() & CP15_MMU
) ?
371 " on" : "off", adc_read(ADC_CVDD
) * 25);
372 lcd_putsf(0, line
++, "Icache:%s Dcache:%s",
373 (read_cp15() & CP15_IC
) ? " on" : "off",
374 (read_cp15() & CP15_DC
) ? " on" : "off");
377 int btn
= button_get_w_tmo(HZ
/10);
378 if(btn
== (DEBUG_CANCEL
|BUTTON_REL
))
380 else if(btn
== (BUTTON_DOWN
|BUTTON_REL
))
388 lcd_putsf(0, line
++, "CGU_PLLA :%8x", (unsigned int)(CGU_PLLA
));
389 lcd_putsf(0, line
++, "CGU_PLLB :%8x", (unsigned int)(CGU_PLLB
));
390 lcd_putsf(0, line
++, "CGU_PROC :%8x", (unsigned int)(CGU_PROC
));
391 lcd_putsf(0, line
++, "CGU_PERI :%8x", (unsigned int)(CGU_PERI
));
392 lcd_putsf(0, line
++, "CGU_IDE :%8x", (unsigned int)(CGU_IDE
));
393 lcd_putsf(0, line
++, "CGU_DBOP :%8x", (unsigned int)(CGU_DBOP
));
394 lcd_putsf(0, line
++, "CGU_AUDIO :%8x", (unsigned int)(CGU_AUDIO
));
395 lcd_putsf(0, line
++, "CGU_USB :%8x", (unsigned int)(CGU_USB
));
397 #if LCD_HEIGHT < 176 /* clip */
399 int btn
= button_get_w_tmo(HZ
/10);
400 if(btn
== (DEBUG_CANCEL
|BUTTON_REL
))
402 else if(btn
== (BUTTON_DOWN
|BUTTON_REL
))
409 #endif /* LCD_HEIGHT < 176 */
411 lcd_putsf(0, line
++, "I2C2_CPSR :%8x", (unsigned int)(I2C2_CPSR1
<<8 |
413 #if CONFIG_CPU == AS3525
414 lcd_putsf(0, line
++, "MCI_NAND :%8x", (unsigned int)(MCI_NAND
));
415 lcd_putsf(0, line
++, "MCI_SD :%8x", (unsigned int)(MCI_SD
));
417 lcd_putsf(0, line
++, "CGU_MEMSTK:%8x", (unsigned int)(CGU_MEMSTICK
));
418 lcd_putsf(0, line
++, "CGU_SDSLOT:%8x", (unsigned int)(CGU_SDSLOT
));
422 int btn
= button_get_w_tmo(HZ
/10);
423 if(btn
== (DEBUG_CANCEL
|BUTTON_REL
))
425 else if(btn
== (BUTTON_DOWN
|BUTTON_REL
))
431 lcd_setfont(FONT_UI
);
435 bool __dbg_ports(void)
439 lcd_setfont(FONT_SYSFIXED
);
448 lcd_puts(0, line
++, "[GPIO Vals and Dirs]");
449 lcd_putsf(0, line
++, "GPIOA: %2x DIR: %2x", GPIOA_DATA
, GPIOA_DIR
);
450 lcd_putsf(0, line
++, "GPIOB: %2x DIR: %2x", GPIOB_DATA
, GPIOB_DIR
);
451 lcd_putsf(0, line
++, "GPIOC: %2x DIR: %2x", GPIOC_DATA
, GPIOC_DIR
);
452 lcd_putsf(0, line
++, "GPIOD: %2x DIR: %2x", GPIOD_DATA
, GPIOD_DIR
);
455 lcd_puts(0, line
++, "[DBOP_DIN]");
456 lcd_putsf(0, line
++, "DBOP_DIN: %4x", dbop_debug());
459 lcd_puts(0, line
++, "[CP15]");
460 lcd_putsf(0, line
++, "CP15: 0x%8x", read_cp15());
462 if (button_get_w_tmo(HZ
/10) == (DEBUG_CANCEL
|BUTTON_REL
))
465 btn
= button_get_w_tmo(HZ
/10);
466 if(btn
== (DEBUG_CANCEL
|BUTTON_REL
))
468 else if(btn
== (BUTTON_DOWN
|BUTTON_REL
))
472 #if CONFIG_CPU == AS3525 /* as3525v2 channels are different */
473 #define BATTEMP_UNIT 5/2 /* 2.5mV */
474 static const char *adc_name
[13] = {
489 #elif CONFIG_CPU == AS3525v2
490 #define BATTEMP_UNIT 2 /* 2mV */
491 static const char *adc_name
[16] = {
518 lcd_putsf(0, line
++, "%s: %d mV", adc_name
[i
], adc_read(i
) * 5);
521 lcd_putsf(0, line
++, "%s: %d mV", adc_name
[i
],
522 adc_read(i
) * BATTEMP_UNIT
);
523 #if LCD_HEIGHT < 176 /* clip */
526 btn
= button_get_w_tmo(HZ
/10);
527 if(btn
== (DEBUG_CANCEL
|BUTTON_REL
))
529 else if(btn
== (BUTTON_DOWN
|BUTTON_REL
))
536 #endif /* LCD_HEIGHT < 176 */
539 lcd_putsf(0, line
++, "%s: %d mV", adc_name
[i
], adc_read(i
));
542 lcd_putsf(0, line
++, "%s: %d uA", adc_name
[i
], adc_read(i
));
543 #if CONFIG_CPU == AS3525 /* different units */
544 lcd_putsf(0, line
++, "%s: %d mV", adc_name
[i
], adc_read(i
)*5/2);
545 #elif CONFIG_CPU == AS3525v2
547 lcd_putsf(0, line
++, "%s: %d mV", adc_name
[i
], adc_read(i
));
551 btn
= button_get_w_tmo(HZ
/10);
552 if(btn
== (DEBUG_CANCEL
|BUTTON_REL
))
554 else if(btn
== (BUTTON_DOWN
|BUTTON_REL
))
560 lcd_setfont(FONT_UI
);