firmware/drivers/tuner/lv24020lp.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  * Tuner driver for the Sanyo LV24020LP
  10  *
  11  * Copyright (C) 2007 Ivan Zupan
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; either version 2
  16  * of the License, or (at your option) any later version.
  17  *
  18  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  19  * KIND, either express or implied.
  20  *
  21  ****************************************************************************/
  22
  23 #include <stdbool.h>
  24 #include <stdlib.h>
  25 #include "config.h"
  26 #include "thread.h"
  27 #include "kernel.h"
  28 #include "tuner.h" /* tuner abstraction interface */
  29 #include "power.h"
  30 #include "fmradio.h" /* physical interface driver */
  31 #include "sound.h"
  32 #include "system.h"
  33
  34 #ifndef BOOTLOADER
  35
  36 static struct mutex tuner_mtx;
  37
  38 /* define to enable tuner logging */
  39 #undef SANYO_TUNER_LOG_FILE
  40 #undef SANYO_TUNER_LOGF
  41
  42 #ifdef SANYO_TUNER_LOG_FILE
  43 #include "file.h"
  44
  45 static int fd_log = -1;
  46
  47 #define TUNER_LOG_OPEN()    if (fd_log < 0) \
  48                                 fd_log = creat("/tuner_dump.txt", 0666)
  49 /* syncing required because close() is never called */
  50 #define TUNER_LOG_SYNC()    fsync(fd_log)
  51 #define TUNER_LOG(s...)     fdprintf(fd_log, s)
  52
  53 #elif defined(SANYO_TUNER_LOGF)
  54 /*#define LOGF_ENABLE*/
  55 #include "logf.h"
  56
  57 #define TUNER_LOG_OPEN()
  58 #define TUNER_LOG_SYNC()
  59 #define TUNER_LOG(s...)     logf(s)
  60
  61 #else
  62 #define TUNER_LOG_OPEN()
  63 #define TUNER_LOG_SYNC()
  64 #define TUNER_LOG(s...)
  65 #endif /* SANYO_TUNER_LOG */
  66
  67 /** tuner register defines **/
  68
  69 #if defined(SANSA_E200) || defined(SANSA_C200)
  70 #define TUNER_GPIO_OUTPUT_EN  GPIOH_OUTPUT_EN
  71 #define TUNER_GPIO_OUTPUT_VAL GPIOH_OUTPUT_VAL
  72 #define TUNER_GPIO_INPUT_VAL  GPIOH_INPUT_VAL
  73 #define FM_NRW_PIN      3
  74 #define FM_CLOCK_PIN    4
  75 #define FM_DATA_PIN     5
  76
  77 #elif defined(IAUDIO_7)
  78 #define TUNER_GPIO_OUTPUT_EN  GPIOA_DIR
  79 #define TUNER_GPIO_OUTPUT_VAL GPIOA
  80 #define TUNER_GPIO_INPUT_VAL  GPIOA
  81 #define FM_CLOCK_PIN    5
  82 #define FM_DATA_PIN     6
  83 #define FM_NRW_PIN      7
  84 #elif defined(COWON_D2)
  85 #define TUNER_GPIO_OUTPUT_EN  GPIOC_DIR
  86 #define TUNER_GPIO_OUTPUT_VAL GPIOC
  87 #define TUNER_GPIO_INPUT_VAL  GPIOC
  88 #define FM_NRW_PIN      31
  89 #define FM_CLOCK_PIN    29
  90 #define FM_DATA_PIN     30
  91
  92 #else
  93 #error GPIOs undefined for this target
  94 #endif
  95
  96 #define FM_CLK_DELAY    1
  97
  98 /* block 1 registers */
  99
 100 /* R */
 101 #define CHIP_ID     0x00
 102
 103 /* W */
 104 #define BLK_SEL     0x01
 105     #define BLK1 0x01
 106     #define BLK2 0x02
 107
 108 /* W */
 109 #define MSRC_SEL    0x02
 110     #define MSR_O   (1 << 7)
 111     #define AFC_LVL (1 << 6)
 112     #define AFC_SPD (1 << 5)
 113     #define MSS_SD  (1 << 2)
 114     #define MSS_FM  (1 << 1)
 115     #define MSS_IF  (1 << 0)
 116
 117 /* W */
 118 #define FM_OSC      0x03
 119
 120 /* W */
 121 #define SD_OSC      0x04
 122
 123 /* W */
 124 #define IF_OSC      0x05
 125
 126 /* W */
 127 #define CNT_CTRL    0x06
 128     #define CNT1_CLR  (1 << 7)
 129     #define CTAB(x)   ((x) & (0x7 << 4))
 130         #define CTAB_STOP_2     (0x0 << 4)
 131         #define CTAB_STOP_8     (0x1 << 4)
 132         #define CTAB_STOP_32    (0x2 << 4)
 133         #define CTAB_STOP_128   (0x3 << 4)
 134         #define CTAB_STOP_512   (0x4 << 4)
 135         #define CTAB_STOP_2048  (0x5 << 4)
 136         #define CTAB_STOP_8192  (0x6 << 4)
 137         #define CTAB_STOP_32768 (0x7 << 4)
 138     #define SWP_CNT_L (1 << 3)
 139     #define CNT_EN    (1 << 2)
 140     #define CNT_SEL   (1 << 1)
 141     #define CNT_SET   (1 << 0)
 142
 143 /* W */
 144 #define IRQ_MSK 0x08
 145     #define IM_MS   (1 << 6)
 146     #define IRQ_LVL (1 << 3)
 147     #define IM_AFC  (1 << 2)
 148     #define IM_FS   (1 << 1)
 149     #define IM_CNT2 (1 << 0)
 150
 151 /* W */
 152 #define FM_CAP      0x09
 153
 154 /* R */
 155 #define CNT_L       0x0a /* Counter register low value */
 156
 157 /* R */
 158 #define CNT_H       0x0b /* Counter register high value */
 159
 160 /* R */
 161 #define CTRL_STAT   0x0c
 162     #define AFC_FLG (1 << 0)
 163
 164 /* R */
 165 #define RADIO_STAT  0x0d
 166     #define RSS_MS        (1 << 7)
 167     #define RSS_FS(x)     ((x) & 0x7f)
 168     #define RSS_FS_GET(x) ((x) & 0x7f)
 169     #define RSS_FS_SET(x) (x)
 170 /* Note: Reading this register will clear field strength and mono/stereo interrupt. */
 171
 172 /* R */
 173 #define IRQ_ID      0x0e
 174     #define II_CNT2  (1 << 5)
 175     #define II_AFC   (1 << 3)
 176     #define II_FS_MS (1 << 0)
 177
 178 /* W */
 179 #define IRQ_OUT     0x0f
 180
 181 /* block 2 registers - offset added in order to id and avoid manual
 182    switching */
 183 #define BLK2_START  0x10
 184
 185 /* W */
 186 #define RADIO_CTRL1 (0x02 + BLK2_START)
 187     #define EN_MEAS (1 << 7)
 188     #define EN_AFC  (1 << 6)
 189     #define DIR_AFC (1 << 3)
 190     #define RST_AFC (1 << 2)
 191
 192 /* W */
 193 #define IF_CENTER   (0x03 + BLK2_START)
 194
 195 /* W */
 196 #define IF_BW       (0x05 + BLK2_START)
 197
 198 /* W */
 199 #define RADIO_CTRL2 (0x06 + BLK2_START)
 200   #define VREF2      (1 << 7)
 201   #define VREF       (1 << 6)
 202   #define STABI_BP   (1 << 5)
 203   #define IF_PM_L    (1 << 4)
 204   #define AGCSP      (1 << 1)
 205   #define AM_ANT_BSW (1 << 0) /* ?? */
 206
 207 /* W */
 208 #define RADIO_CTRL3 (0x07 + BLK2_START)
 209     #define AGC_SLVL (1 << 7)
 210     #define VOLSH    (1 << 6)
 211     #define TB_ON    (1 << 5)
 212     #define AMUTE_L  (1 << 4)
 213     #define SE_FM    (1 << 3)
 214     #define SE_BE    (1 << 1)
 215     #define SE_EXT   (1 << 0) /* For LV24000=0, LV24001/24002=Ext source enab. */
 216
 217 /* W */
 218 #define STEREO_CTRL (0x08 + BLK2_START)
 219     #define FRCST       (1 << 7)
 220     #define FMCS(x)     ((x) & (0x7 << 4))
 221     #define FMCS_GET(x) (((x) & (0x7 << 4)) >> 4)
 222     #define FMCS_SET(x) ((x) << 4)
 223     #define AUTOSSR     (1 << 3)
 224     #define PILTCA      (1 << 2)
 225     #define SD_PM       (1 << 1)
 226     #define ST_M        (1 << 0)
 227
 228 /* W */
 229 #define AUDIO_CTRL1 (0x09 + BLK2_START)
 230     #define TONE_LVL(x)     ((x) & (0xf << 4))
 231     #define TONE_LVL_GET(x) (((x) & (0xf << 4)) >> 4)
 232     #define TONE_LVL_SET(x) ((x) << 4)
 233     #define VOL_LVL(x)      ((x) & 0xf)
 234     #define VOL_LVL_GET(x)  ((x) & 0xf)
 235     #define VOL_LVL_SET(x)  ((x) << 4)
 236
 237 /* W */
 238 #define AUDIO_CTRL2 (0x0a + BLK2_START)
 239     #define BASS_PP     (1 << 0)
 240     #define BASS_P      (1 << 1) /* BASS_P, BASS_N are mutually-exclusive */
 241     #define BASS_N      (1 << 2)
 242     #define TREB_P      (1 << 3) /* TREB_P, TREB_N are mutually-exclusive */
 243     #define TREB_N      (1 << 4)
 244     #define DEEMP       (1 << 5)
 245     #define BPFREQ(x)   ((x) & (0x3 << 6))
 246     #define BPFREQ_2_0K (0x0 << 6)
 247     #define BPFREQ_1_0K (0x1 << 6)
 248     #define BPFREQ_0_5K (0x2 << 6)
 249     #define BPFREQ_HIGH (0x3 << 6)
 250
 251 /* W */
 252 #define PW_SCTRL    (0x0b + BLK2_START)
 253     #define SS_CTRL(x)     ((x) & (0x7 << 5))
 254     #define SS_CTRL_GET(x) (((x) & (0x7 << 5)) >> 5)
 255     #define SS_CTRL_SET(x) ((x) << 5)
 256     #define SM_CTRL(x)     ((x) & (0x7 << 2))
 257     #define SM_CTRL_GET(x) (((x) & (0x7 << 2)) >> 2)
 258     #define SM_CTRL_SET(x) ((x) << 2)
 259     #define PW_HPA         (1 << 1) /* LV24002 only */
 260     #define PW_RAD         (1 << 0)
 261
 262 /* shadow for writeable registers */
 263 #define TUNER_POWERED           (1 << 0)
 264 #define TUNER_PRESENT           (1 << 1)
 265 #define TUNER_AWAKE             (1 << 2)
 266 #define TUNER_PRESENCE_CHECKED  (1 << 3)
 267 static unsigned tuner_status = 0;
 268
 269 static unsigned char lv24020lp_regs[0x1c];
 270
 271 static const int sw_osc_low  = 10;  /* 30; */
 272 static const int sw_osc_high = 240; /* 200; */
 273 static const int sw_cap_low  = 0;
 274 static const int sw_cap_high = 191;
 275
 276 /* linear coefficients used for tuning */
 277 static int coef_00, coef_01, coef_10, coef_11;
 278
 279 /* DAC control register set values */
 280 static int if_set, sd_set;
 281
 282 static inline bool tuner_awake(void)
 283 {
 284     return (tuner_status & TUNER_AWAKE) != 0;
 285 }
 286
 287 /* send a byte to the tuner - expects write mode to be current */
 288 static void lv24020lp_send_byte(unsigned int byte)
 289 {
 290     int i;
 291
 292     for (i = 0; i < 8; i++)
 293     {
 294         TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN);
 295
 296         if (byte & 1)
 297             TUNER_GPIO_OUTPUT_VAL |= (1 << FM_DATA_PIN);
 298         else
 299             TUNER_GPIO_OUTPUT_VAL &=  ~(1 << FM_DATA_PIN);
 300
 301         udelay(FM_CLK_DELAY);
 302
 303         TUNER_GPIO_OUTPUT_VAL |= (1 << FM_CLOCK_PIN);
 304         udelay(FM_CLK_DELAY);
 305
 306         byte >>= 1;
 307     }
 308 }
 309
 310 /* end a write cycle on the tuner */
 311 static void lv24020lp_end_write(void)
 312 {
 313     /* switch back to read mode */
 314     TUNER_GPIO_OUTPUT_EN &= ~(1 << FM_DATA_PIN);
 315     TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_NRW_PIN);
 316     udelay(FM_CLK_DELAY);
 317 }
 318
 319 /* prepare a write cycle on the tuner */
 320 static unsigned int lv24020lp_begin_write(unsigned int address)
 321 {
 322     /* Get register's block, translate address */
 323     unsigned int blk = (address >= BLK2_START) ?
 324                             (address -= BLK2_START, BLK2) : BLK1;
 325
 326     for (;;)
 327     {
 328         /* Prepare 3-wire bus pins for write cycle */
 329         TUNER_GPIO_OUTPUT_VAL |= (1 << FM_NRW_PIN);
 330         TUNER_GPIO_OUTPUT_EN |= (1 << FM_DATA_PIN);
 331         udelay(FM_CLK_DELAY);
 332
 333         /* current block == register block? */
 334         if (blk == lv24020lp_regs[BLK_SEL])
 335             return address;
 336
 337         /* switch block */
 338         lv24020lp_regs[BLK_SEL] = blk;
 339
 340         /* data first */
 341         lv24020lp_send_byte(blk);
 342         /* then address */
 343         lv24020lp_send_byte(BLK_SEL);
 344
 345         lv24020lp_end_write();
 346     }
 347 }
 348
 349 /* write a byte to a tuner register */
 350 static void lv24020lp_write(unsigned int address, unsigned int data)
 351 {
 352     /* shadow logical values but do logical=>physical remappings on some
 353        registers' data. */
 354     lv24020lp_regs[address] = data;
 355
 356     switch (address)
 357     {
 358     case FM_OSC:
 359         /* L: 000..255
 360          * P: 255..000 */
 361         data = 255 - data;
 362         break;
 363     case FM_CAP:
 364         /* L: 000..063, 064..191
 365          * P: 255..192, 127..000 */
 366         data = ((data < 64) ? 255 : (255 - 64)) - data;
 367         break;
 368     case RADIO_CTRL1:
 369         /* L: data
 370          * P: data | always "1" bits */
 371         data |= (1 << 4) | (1 << 1) | (1 << 0);
 372         break;
 373     }
 374
 375     /* Check if interface is turned on */
 376     if (!(tuner_status & TUNER_POWERED))
 377         return;
 378
 379     address = lv24020lp_begin_write(address);
 380
 381     /* data first */
 382     lv24020lp_send_byte(data);
 383     /* then address */
 384     lv24020lp_send_byte(address);
 385
 386     lv24020lp_end_write();
 387 }
 388
 389 /* helpers to set/clear register bits */
 390 static void lv24020lp_write_set(unsigned int address, unsigned int bits)
 391 {
 392     lv24020lp_write(address, lv24020lp_regs[address] | bits);
 393 }
 394
 395 static void lv24020lp_write_clear(unsigned int address, unsigned int bits)
 396 {
 397     lv24020lp_write(address, lv24020lp_regs[address] & ~bits);
 398 }
 399
 400 /* read a byte from a tuner register */
 401 static unsigned int lv24020lp_read(unsigned int address)
 402 {
 403     int i;
 404     unsigned int toread;
 405
 406     /* Check if interface is turned on */
 407     if (!(tuner_status & TUNER_POWERED))
 408         return 0;
 409
 410     address = lv24020lp_begin_write(address);
 411
 412     /* address */
 413     lv24020lp_send_byte(address);
 414
 415     lv24020lp_end_write();
 416
 417     /* data */
 418     toread = 0;
 419     for (i = 0; i < 8; i++)
 420     {
 421         TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN);
 422         udelay(FM_CLK_DELAY);
 423
 424         if (TUNER_GPIO_INPUT_VAL & (1 << FM_DATA_PIN))
 425             toread |= (1 << i);
 426
 427         TUNER_GPIO_OUTPUT_VAL |= (1 << FM_CLOCK_PIN);
 428         udelay(FM_CLK_DELAY);
 429     }
 430
 431     return toread;
 432 }
 433
 434 /* enables auto frequency centering */
 435 static void enable_afc(bool enabled)
 436 {
 437     unsigned int radio_ctrl1 = lv24020lp_regs[RADIO_CTRL1];
 438
 439     if (enabled)
 440     {
 441         radio_ctrl1 &= ~RST_AFC;
 442         radio_ctrl1 |= EN_AFC;
 443     }
 444     else
 445     {
 446         radio_ctrl1 |= RST_AFC;
 447         radio_ctrl1 &= ~EN_AFC;
 448     }
 449
 450     lv24020lp_write(RADIO_CTRL1, radio_ctrl1);
 451 }
 452
 453 static int calculate_coef(unsigned fkhz)
 454 {
 455     /* Overflow below 66000kHz --
 456        My tuner tunes down to a min of ~72600kHz but datasheet mentions
 457        66000kHz as the minimum. ?? Perhaps 76000kHz was intended? */
 458     return fkhz < 66000 ?
 459         0x7fffffff : 0x81d1a47efc5cb700ull / ((uint64_t)fkhz*fkhz);
 460 }
 461
 462 static int interpolate_x(int expected_y, int x1, int x2, int y1, int y2)
 463 {
 464     return y1 == y2 ?
 465         0 : (int64_t)(expected_y - y1)*(x2 - x1) / (y2 - y1) + x1;
 466 }
 467
 468 static int interpolate_y(int expected_x, int x1, int x2, int y1, int y2)
 469 {
 470     return x1 == x2 ?
 471         0 : (int64_t)(expected_x - x1)*(y2 - y1) / (x2 - x1) + y1;
 472 }
 473
 474 /* this performs measurements of IF, FM and Stereo frequencies
 475  * Input can be: MSS_FM, MSS_IF, MSS_SD */
 476 static int tuner_measure(unsigned char type, int scale, int duration)
 477 {
 478     int64_t finval;
 479
 480     /* enable measuring */
 481     lv24020lp_write_set(MSRC_SEL, type);
 482     lv24020lp_write_clear(CNT_CTRL, CNT_SEL);
 483     lv24020lp_write_set(RADIO_CTRL1, EN_MEAS);
 484
 485     /* reset counter */
 486     lv24020lp_write_set(CNT_CTRL, CNT1_CLR);
 487     lv24020lp_write_clear(CNT_CTRL, CNT1_CLR);
 488
 489     /* start counter, delay for specified time and stop it */
 490     lv24020lp_write_set(CNT_CTRL, CNT_EN);
 491     udelay(duration*1000 - 16);
 492     lv24020lp_write_clear(CNT_CTRL, CNT_EN);
 493
 494     /* read tick count */
 495     finval = (lv24020lp_read(CNT_H) << 8) | lv24020lp_read(CNT_L);
 496
 497     /* restore measure mode */
 498     lv24020lp_write_clear(RADIO_CTRL1, EN_MEAS);
 499     lv24020lp_write_clear(MSRC_SEL, type);
 500
 501     /* convert value */
 502     if (type == MSS_FM)
 503         finval = scale*finval*256 / duration;
 504     else
 505         finval = scale*finval / duration;
 506
 507     /* This function takes a loooong time and other stuff needs
 508        running by now */
 509     yield();
 510
 511     return (int)finval;
 512 }
 513
 514 /* set the FM oscillator frequency */
 515 static void set_frequency(int freq)
 516 {
 517     int coef, cap_value, osc_value;
 518     int f1, f2, x1, x2;
 519     int count;
 520
 521     TUNER_LOG_OPEN();
 522
 523     TUNER_LOG("set_frequency(%d)\n", freq);
 524
 525     enable_afc(false);
 526
 527     /* MHz -> kHz */
 528     freq /= 1000;
 529
 530     TUNER_LOG("Select cap:\n");
 531
 532     coef = calculate_coef(freq);
 533     cap_value = interpolate_x(coef, sw_cap_low, sw_cap_high,
 534                     coef_00, coef_01);
 535
 536     osc_value = sw_osc_low;
 537     lv24020lp_write(FM_OSC, osc_value);
 538
 539     /* Just in case - don't go into infinite loop */
 540     for (count = 0; count < 30; count++)
 541     {
 542         int y0 = interpolate_y(cap_value, sw_cap_low, sw_cap_high,
 543                                 coef_00, coef_01);
 544         int y1 = interpolate_y(cap_value, sw_cap_low, sw_cap_high,
 545                                 coef_10, coef_11);
 546         int coef_fcur, cap_new, coef_cor, range;
 547
 548         lv24020lp_write(FM_CAP, cap_value);
 549
 550         range     = y1 - y0;
 551         f1        = tuner_measure(MSS_FM, 1, 16);
 552         coef_fcur = calculate_coef(f1);
 553         coef_cor  = calculate_coef((f1*1000 + 32*256) / 1000);
 554         y0        = coef_cor;
 555         y1        = y0 + range;
 556
 557         TUNER_LOG("%d %d %d %d %d %d %d %d\n",
 558                   f1, cap_value, coef, coef_fcur, coef_cor, y0, y1, range);
 559
 560         if (coef >= y0 && coef <= y1)
 561         {
 562             osc_value = interpolate_x(coef, sw_osc_low, sw_osc_high,
 563                                         y0, y1);
 564
 565             if (osc_value >= sw_osc_low && osc_value <= sw_osc_high)
 566                 break;
 567         }
 568
 569         cap_new = interpolate_x(coef, cap_value, sw_cap_high,
 570                                 coef_fcur, coef_01);
 571
 572         if (cap_new == cap_value)
 573         {
 574             if (coef < coef_fcur)
 575                 cap_value++;
 576             else
 577                 cap_value--;
 578         }
 579         else
 580         {
 581             cap_value = cap_new;
 582         }
 583     }
 584
 585     TUNER_LOG("osc_value: %d\n", osc_value);
 586
 587     TUNER_LOG("Tune:\n");
 588
 589     x1 = sw_osc_low, x2 = sw_osc_high;
 590     /* FM_OSC already at SW_OSC low and f1 is already the measured
 591        frequency */
 592
 593     do
 594     {
 595         int x2_new;
 596
 597         lv24020lp_write(FM_OSC, x2);
 598         f2 = tuner_measure(MSS_FM, 1, 16);
 599
 600         if (abs(f2 - freq) <= 16)
 601         {
 602             TUNER_LOG("%d %d %d %d\n", f1, f2, x1, x2);
 603             break;
 604         }
 605
 606         x2_new = interpolate_x(freq, x1, x2, f1, f2);
 607
 608         x1 = x2, f1 = f2, x2 = x2_new;
 609         TUNER_LOG("%d %d %d %d\n", f1, f2, x1, x2);
 610     }
 611     while (x2 != 0);
 612
 613     if (x2 == 0)
 614     {
 615         /* May still be close enough */
 616         TUNER_LOG("tuning failed - diff: %d\n", f2 - freq);
 617     }
 618
 619     enable_afc(true);
 620
 621     TUNER_LOG("\n");
 622
 623     TUNER_LOG_SYNC();
 624 }
 625
 626 #define TOO_SMALL       (1 << 0)
 627 #define TOO_BIG         (1 << 1)
 628 #define APPROACH_UP_1   (1 << 2)
 629 #define APPROACH_DOWN_1 (1 << 3)
 630
 631 static void fine_step_tune(int (*setcmp)(int regval), int regval, int step)
 632 {
 633     /* Registers are not always stable, timeout if best fit not found soon
 634        enough */
 635     unsigned long abort = current_tick + HZ*2;
 636     int flags = 0;
 637
 638     while (TIME_BEFORE(current_tick, abort))
 639     {
 640         int cmp;
 641
 642         regval = regval + step;
 643
 644         cmp = setcmp(regval);
 645
 646         if (cmp == 0)
 647             break;
 648
 649         step = abs(step);
 650
 651         if (cmp < 0)
 652         {
 653             flags |= TOO_SMALL;
 654             if (step == 1)
 655                 flags |= APPROACH_UP_1;
 656         }
 657         else
 658         {
 659             step = -step;
 660             flags |= TOO_BIG;
 661             if (step == -1)
 662                 step |= APPROACH_DOWN_1;
 663         }
 664
 665         if ((flags & APPROACH_UP_1) && (flags & APPROACH_DOWN_1))
 666             break;  /* approached with step=1: best fit value found */
 667
 668         if ((flags & TOO_SMALL) && (flags & TOO_BIG))
 669         {
 670             step /= 2;
 671             if (step == 0)
 672                 step = 1;
 673             flags &= ~(TOO_SMALL | TOO_BIG);
 674         }
 675     }
 676 }
 677
 678 static int if_setcmp(int regval)
 679 {
 680     lv24020lp_write(IF_OSC, regval);
 681     lv24020lp_write(IF_CENTER, regval);
 682     lv24020lp_write(IF_BW, 65*regval/100);
 683
 684     if_set = tuner_measure(MSS_IF, 1000, 32);
 685
 686     /* This register is bounces around by a few hundred Hz and doesn't seem
 687        to be precisely tuneable. Just do 110000 +/- 500 since it's not very
 688        critical it seems. */
 689     if (abs(if_set - 110000) <= 500)
 690         return 0;
 691
 692     return if_set < 110000 ? -1 : 1;
 693 }
 694
 695 static int sd_setcmp(int regval)
 696 {
 697     lv24020lp_write(SD_OSC, regval);
 698
 699     sd_set = tuner_measure(MSS_SD, 1000, 32);
 700
 701     if (abs(sd_set - 38300) <= 31)
 702         return 0;
 703
 704     return sd_set < 38300 ? -1 : 1;
 705 }
 706
 707 static void set_sleep(bool sleep)
 708 {
 709     if (sleep || tuner_awake())
 710         return;
 711
 712     if ((tuner_status & (TUNER_PRESENT | TUNER_POWERED)) !=
 713         (TUNER_PRESENT | TUNER_POWERED))
 714         return;
 715
 716     enable_afc(false);
 717
 718     /* 2. Calibrate the IF frequency at 110 kHz: */
 719     lv24020lp_write_clear(RADIO_CTRL2, IF_PM_L);
 720     fine_step_tune(if_setcmp, 0x80, 8);
 721     lv24020lp_write_set(RADIO_CTRL2, IF_PM_L);
 722
 723     /* 3. Calibrate the stereo decoder clock at 38.3 kHz: */
 724     lv24020lp_write_set(STEREO_CTRL, SD_PM);
 725     fine_step_tune(sd_setcmp, 0x80, 8);
 726     lv24020lp_write_clear(STEREO_CTRL, SD_PM);
 727
 728     /* calculate FM tuning coefficients */
 729     lv24020lp_write(FM_CAP, sw_cap_low);
 730     lv24020lp_write(FM_OSC, sw_osc_low);
 731     coef_00 = calculate_coef(tuner_measure(MSS_FM, 1, 64));
 732
 733     lv24020lp_write(FM_CAP, sw_cap_high);
 734     coef_01 = calculate_coef(tuner_measure(MSS_FM, 1, 64));
 735
 736     lv24020lp_write(FM_CAP, sw_cap_low);
 737     lv24020lp_write(FM_OSC, sw_osc_high);
 738     coef_10 = calculate_coef(tuner_measure(MSS_FM, 1, 64));
 739
 740     lv24020lp_write(FM_CAP, sw_cap_high);
 741     coef_11 = calculate_coef(tuner_measure(MSS_FM, 1, 64));
 742
 743     /* set various audio level settings */
 744     lv24020lp_write(AUDIO_CTRL1, TONE_LVL_SET(0) | VOL_LVL_SET(0));
 745     lv24020lp_write_set(RADIO_CTRL2, AGCSP);
 746     lv24020lp_write_set(RADIO_CTRL3, VOLSH);
 747     lv24020lp_write(STEREO_CTRL, FMCS_SET(7) | AUTOSSR);
 748     lv24020lp_write(PW_SCTRL, SS_CTRL_SET(3) | SM_CTRL_SET(1) |
 749                     PW_RAD);
 750
 751     tuner_status |= TUNER_AWAKE;
 752 }
 753
 754 static int lp24020lp_tuned(void)
 755 {
 756     return RSS_FS(lv24020lp_read(RADIO_STAT)) < 0x1f;
 757 }
 758
 759 static int lv24020lp_debug_info(int setting)
 760 {
 761     int val = -1;
 762
 763     if (setting >= LV24020LP_DEBUG_FIRST && setting <= LV24020LP_DEBUG_LAST)
 764     {
 765         val = 0;
 766
 767         if (tuner_awake())
 768         {
 769             switch (setting)
 770             {
 771             /* tuner-specific debug info */
 772             case LV24020LP_CTRL_STAT:
 773                 val = lv24020lp_read(CTRL_STAT);
 774                 break;
 775
 776             case LV24020LP_REG_STAT:
 777                 val = lv24020lp_read(RADIO_STAT);
 778                 break;
 779
 780             case LV24020LP_MSS_FM:
 781                 val = tuner_measure(MSS_FM, 1, 16);
 782                 break;
 783
 784             case LV24020LP_MSS_IF:
 785                 val = tuner_measure(MSS_IF, 1000, 16);
 786                 break;
 787
 788             case LV24020LP_MSS_SD:
 789                 val = tuner_measure(MSS_SD, 1000, 16);
 790                 break;
 791
 792             case LV24020LP_IF_SET:
 793                 val = if_set;
 794                 break;
 795
 796             case LV24020LP_SD_SET:
 797                 val = sd_set;
 798                 break;
 799             }
 800         }
 801     }
 802
 803     return val;
 804 }
 805
 806 /** Public interfaces **/
 807 void lv24020lp_init(void)
 808 {
 809     mutex_init(&tuner_mtx);
 810 }
 811
 812 void lv24020lp_lock(void)
 813 {
 814     mutex_lock(&tuner_mtx);
 815 }
 816
 817 void lv24020lp_unlock(void)
 818 {
 819     mutex_unlock(&tuner_mtx);
 820 }
 821
 822 /* This function expects the driver to be locked externally */
 823 void lv24020lp_power(bool status)
 824 {
 825     static const unsigned char tuner_defaults[][2] =
 826     {
 827         /* Block 1 writeable  registers */
 828         { MSRC_SEL,    AFC_LVL },
 829         { FM_OSC,      0x80 },
 830         { SD_OSC,      0x80 },
 831         { IF_OSC,      0x80 },
 832         { CNT_CTRL,    CNT1_CLR | SWP_CNT_L },
 833         { IRQ_MSK,     0x00 }, /* IRQ_LVL -> Low to High */
 834         { FM_CAP,      0x80 },
 835      /* { IRQ_OUT,     0x00 }, No action on this register (skip) */
 836         /* Block 2 writeable registers */
 837         { RADIO_CTRL1, EN_AFC },
 838         { IF_CENTER,   0x80 },
 839         { IF_BW,       65*0x80 / 100 }, /* 65% of IF_OSC */
 840         { RADIO_CTRL2, IF_PM_L },
 841         { RADIO_CTRL3, AGC_SLVL | SE_FM },
 842         { STEREO_CTRL, FMCS_SET(4) | AUTOSSR },
 843         { AUDIO_CTRL1, TONE_LVL_SET(7) | VOL_LVL_SET(7) },
 844         { AUDIO_CTRL2, BPFREQ_HIGH },   /* deemphasis 50us */
 845         { PW_SCTRL,    SS_CTRL_SET(3) | SM_CTRL_SET(3) | PW_RAD },
 846     };
 847
 848     unsigned i;
 849
 850     if (status)
 851     {
 852         tuner_status |= (TUNER_PRESENCE_CHECKED | TUNER_POWERED);
 853
 854         /* if tuner is present, CHIP ID is 0x09 */
 855         if (lv24020lp_read(CHIP_ID) == 0x09)
 856         {
 857             tuner_status |= TUNER_PRESENT;
 858
 859             /* After power-up, the LV2400x needs to be initialized as
 860                follows: */
 861
 862             /* 1. Write default values to the registers: */
 863             lv24020lp_regs[BLK_SEL] = 0; /* Force a switch on the first */
 864             for (i = 0; i < ARRAYLEN(tuner_defaults); i++)
 865                 lv24020lp_write(tuner_defaults[i][0], tuner_defaults[i][1]);
 866
 867             /* Complete the startup calibration if the tuner is woken */
 868             sleep(HZ/10);
 869         }
 870     }
 871     else
 872     {
 873         /* Power off */
 874         if (tuner_status & TUNER_PRESENT)
 875             lv24020lp_write_clear(PW_SCTRL, PW_RAD);
 876
 877         tuner_status &= ~(TUNER_POWERED | TUNER_AWAKE);
 878     }
 879 }
 880
 881 int lv24020lp_set(int setting, int value)
 882 {
 883     int val = 1;
 884
 885     mutex_lock(&tuner_mtx);
 886
 887     switch(setting)
 888     {
 889     case RADIO_SLEEP:
 890         set_sleep(value);
 891         break;
 892
 893     case RADIO_FREQUENCY:
 894         set_frequency(value);
 895         break;
 896
 897     case RADIO_SCAN_FREQUENCY:
 898         /* TODO: really implement this */
 899         set_frequency(value);
 900         val = lp24020lp_tuned();
 901         break;
 902
 903     case RADIO_MUTE:
 904         if (value)
 905             lv24020lp_write_clear(RADIO_CTRL3, AMUTE_L);
 906         else
 907             lv24020lp_write_set(RADIO_CTRL3, AMUTE_L);
 908         break;
 909
 910     case RADIO_REGION:
 911         if (lv24020lp_region_data[value])
 912             lv24020lp_write_set(AUDIO_CTRL2, DEEMP);
 913         else
 914             lv24020lp_write_clear(AUDIO_CTRL2, DEEMP);
 915         break;
 916
 917     case RADIO_FORCE_MONO:
 918         if (value)
 919             lv24020lp_write_set(STEREO_CTRL, ST_M);
 920         else
 921             lv24020lp_write_clear(STEREO_CTRL, ST_M);
 922         break;
 923
 924     default:
 925         value = -1;
 926     }
 927
 928     mutex_unlock(&tuner_mtx);
 929
 930     return val;
 931 }
 932
 933 int lv24020lp_get(int setting)
 934 {
 935     int val = -1;
 936
 937     mutex_lock(&tuner_mtx);
 938
 939     switch(setting)
 940     {
 941     case RADIO_TUNED:
 942         /* TODO: really implement this */
 943         val = lp24020lp_tuned();
 944         break;
 945
 946     case RADIO_STEREO:
 947         val = (lv24020lp_read(RADIO_STAT) & RSS_MS) != 0;
 948         break;
 949
 950     case RADIO_PRESENT:
 951     {
 952         bool fmstatus = true;
 953
 954         if (!(tuner_status & TUNER_PRESENCE_CHECKED))
 955             fmstatus = tuner_power(true);
 956
 957         val = (tuner_status & TUNER_PRESENT) != 0;
 958
 959         if (!fmstatus)
 960             tuner_power(false);
 961         break;
 962         }
 963
 964     default:
 965         val = lv24020lp_debug_info(setting);
 966     }
 967
 968     mutex_unlock(&tuner_mtx);
 969
 970     return val;
 971 }
 972 #endif /* BOOTLOADER */