firmware/target/arm/ata-sd-pp.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2006 Daniel Ankers
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21 #include "config.h" /* for HAVE_MULTIDRIVE */
  22 #include "fat.h"
  23 #include "hotswap.h"
  24 #ifdef HAVE_HOTSWAP
  25 #include "sd-pp-target.h"
  26 #endif
  27 #include "ata_idle_notify.h"
  28 #include "system.h"
  29 #include <string.h>
  30 #include "thread.h"
  31 #include "led.h"
  32 #include "disk.h"
  33 #include "cpu.h"
  34 #include "panic.h"
  35 #include "usb.h"
  36 #include "sd.h"
  37 #include "storage.h"
  38
  39 #define SECTOR_SIZE     512
  40 #define BLOCKS_PER_BANK 0x7a7800
  41
  42 /* Comparing documentations of various MMC/SD controllers revealed, */
  43 /* that this controller seems to be a mix of PXA27x, PXA255 and */
  44 /* some PP specific stuff. The register and bit definitions are */
  45 /* taken from the 'PXA27x Developers Manual', as it appears to be */
  46 /* the closest match. Known differences and obscurities are commented.*/
  47
  48 #define MMC_STRPCL      (*(volatile unsigned int *)(0x70008200))
  49 #define MMC_STAT        (*(volatile unsigned int *)(0x70008204))
  50 #define MMC_CLKRT       (*(volatile unsigned int *)(0x70008208))
  51 #define MMC_SPI         (*(volatile unsigned int *)(0x7000820c))
  52 #define MMC_CMDAT       (*(volatile unsigned int *)(0x70008210))
  53 #define MMC_RESTO       (*(volatile unsigned int *)(0x70008214))
  54 #define MMC_RDTO        (*(volatile unsigned int *)(0x70008218))
  55 #define MMC_BLKLEN      (*(volatile unsigned int *)(0x7000821c))
  56 #define MMC_NUMBLK      (*(volatile unsigned int *)(0x70008220))
  57 #define MMC_I_MASK      (*(volatile unsigned int *)(0x70008224))
  58 #define MMC_CMD         (*(volatile unsigned int *)(0x70008228))
  59 #define MMC_ARGH        (*(volatile unsigned int *)(0x7000822c))
  60 #define MMC_ARGL        (*(volatile unsigned int *)(0x70008230))
  61 #define MMC_RES         (*(volatile unsigned int *)(0x70008234))
  62
  63 /* PXA255/27x have separate RX/TX FIFOs with 32x8 bit */
  64 /* PP502x has a combined Data FIFO with 16x16 bit */
  65 #define MMC_DATA_FIFO   (*(volatile unsigned int *)(0x70008280))
  66
  67 /* PP specific registers, no other controller seem to have such. */
  68 #define MMC_SD_STATE    (*(volatile unsigned int *)(0x70008238))
  69 #define MMC_INIT_1      (*(volatile unsigned int *)(0x70008240))
  70 #define MMC_INIT_2      (*(volatile unsigned int *)(0x70008244))
  71
  72 /* MMC_STAT bits */
  73 #define STAT_SDIO_SUSPEND_ACK (1 << 16)
  74 #define STAT_SDIO_INT         (1 << 15)
  75 #define STAT_RD_STALLED       (1 << 14)
  76 #define STAT_END_CMD_RES      (1 << 13)
  77 #define STAT_PRG_DONE         (1 << 12)
  78 #define STAT_DATA_TRAN_DONE   (1 << 11)
  79 #define STAT_SPI_WR_ERR       (1 << 10)
  80 #define STAT_FLASH_ERR        (1 << 9)
  81 #define STAT_CLK_EN           (1 << 8)
  82 #define STAT_RECV_FIFO_FULL   (1 << 7)  /* taken from PXA255 */
  83 #define STAT_XMIT_FIFO_EMPTY  (1 << 6)  /* taken from PXA255 */
  84 #define STAT_RES_CRC_ERR      (1 << 5)
  85 #define STAT_DAT_ERR_TOKEN    (1 << 4)
  86 #define STAT_CRC_RD_ERR       (1 << 3)
  87 #define STAT_CRC_WR_ERR       (1 << 2)
  88 #define STAT_TIME_OUT_RES     (1 << 1)
  89 #define STAT_TIME_OUT_READ    (1)
  90 #define STAT_ERROR_BITS       (0x3f)
  91
  92 /* MMC_CMDAT bits */
  93 /* Some of the bits used by the OF don't make much sense with these */
  94 /* definitions. So they're probably different between PXA and PP502x */
  95 /* Bits 0-5 appear to match though. */
  96 #define CMDAT_SDIO_RESUME  (1 << 13)
  97 #define CMDAT_SDIO_SUSPEND (1 << 12)
  98 #define CMDAT_SDIO_INT_EN  (1 << 11)
  99 #define CMDAT_STOP_TRAN    (1 << 10)
 100 #define CMDAT_SD_4DAT      (1 << 8)
 101 #define CMDAT_DMA_EN       (1 << 7)
 102 #define CMDAT_INIT         (1 << 6)
 103 #define CMDAT_BUSY         (1 << 5)
 104 #define CMDAT_STRM_BLK     (1 << 4)
 105 #define CMDAT_WR_RD        (1 << 3)
 106 #define CMDAT_DATA_EN      (1 << 2)
 107 #define CMDAT_RES_TYPE3    (3)
 108 #define CMDAT_RES_TYPE2    (2)
 109 #define CMDAT_RES_TYPE1    (1)
 110
 111 /* MMC_I_MASK bits */
 112 /* PP502x apparently only has bits 0-3 */
 113 #define I_MASK_SDIO_SUSPEND_ACK  (1 << 12)
 114 #define I_MASK_SDIO_INT          (1 << 11)
 115 #define I_MASK_RD_STALLED        (1 << 10)
 116 #define I_MASK_RES_ERR           (1 << 9)
 117 #define I_MASK_DAT_ERR           (1 << 8)
 118 #define I_MASK_TINT              (1 << 7)
 119 #define I_MASK_TXFIFO_WR_REQ     (1 << 6)
 120 #define I_MASK_RXFIFO_RD_REQ     (1 << 5)
 121 #define I_MASK_CLK_IS_OFF        (1 << 4)
 122 #define I_MASK_STOP_CMD          (1 << 3)
 123 #define I_MASK_END_CMD_RES       (1 << 2)
 124 #define I_MASK_PRG_DONE          (1 << 1)
 125 #define I_MASK_DATA_TRAN_DONE    (1 << 0)
 126
 127 #define FIFO_LEN        16          /* FIFO is 16 words deep */
 128
 129 #define EC_OK                    0
 130 #define EC_FAILED                1
 131 #define EC_NOCARD                2
 132 #define EC_WAIT_STATE_FAILED     3
 133 #define EC_CHECK_TIMEOUT_FAILED  4
 134 #define EC_POWER_UP              5
 135 #define EC_READ_TIMEOUT          6
 136 #define EC_WRITE_TIMEOUT         7
 137 #define EC_TRAN_SEL_BANK         8
 138 #define EC_TRAN_READ_ENTRY       9
 139 #define EC_TRAN_READ_EXIT       10
 140 #define EC_TRAN_WRITE_ENTRY     11
 141 #define EC_TRAN_WRITE_EXIT      12
 142 #define EC_FIFO_SEL_BANK_EMPTY  13
 143 #define EC_FIFO_SEL_BANK_DONE   14
 144 #define EC_FIFO_ENA_BANK_EMPTY  15
 145 #define EC_FIFO_READ_FULL       16
 146 #define EC_FIFO_WR_EMPTY        17
 147 #define EC_FIFO_WR_DONE         18
 148 #define EC_COMMAND              19
 149 #define NUM_EC                  20
 150
 151 /* for compatibility */
 152 static long last_disk_activity = -1;
 153
 154 /** static, private data **/
 155 static bool initialized = false;
 156
 157 static long next_yield = 0;
 158 #define MIN_YIELD_PERIOD 1000
 159
 160 static tCardInfo card_info[2];
 161 static tCardInfo *currcard = NULL; /* current active card */
 162
 163 struct sd_card_status
 164 {
 165     int retry;
 166     int retry_max;
 167 };
 168
 169 static struct sd_card_status sd_status[NUM_DRIVES] =
 170 {
 171     { 0, 1  },
 172 #ifdef HAVE_MULTIDRIVE
 173     { 0, 10 }
 174 #endif
 175 };
 176
 177 /* Shoot for around 75% usage */
 178 static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x1c0)/sizeof(long)];
 179 static const char         sd_thread_name[] = "ata/sd";
 180 static struct mutex       sd_mtx SHAREDBSS_ATTR;
 181 static struct event_queue sd_queue;
 182
 183 static int sd_first_drive = 0;
 184
 185 /* Posted when card plugged status has changed */
 186 #define SD_HOTSWAP    1
 187 /* Actions taken by sd_thread when card status has changed */
 188 enum sd_thread_actions
 189 {
 190     SDA_NONE      = 0x0,
 191     SDA_UNMOUNTED = 0x1,
 192     SDA_MOUNTED   = 0x2
 193 };
 194
 195 /* Private Functions */
 196
 197 static unsigned int check_time[NUM_EC];
 198
 199 static inline bool sd_check_timeout(long timeout, int id)
 200 {
 201     return !TIME_AFTER(USEC_TIMER, check_time[id] + timeout);
 202 }
 203
 204 static bool sd_poll_status(unsigned int trigger, long timeout)
 205 {
 206     long t = USEC_TIMER;
 207
 208     while ((MMC_STAT & trigger) == 0)
 209     {
 210         long time = USEC_TIMER;
 211
 212         if (TIME_AFTER(time, next_yield))
 213         {
 214             long ty = USEC_TIMER;
 215             yield();
 216             timeout += USEC_TIMER - ty;
 217             next_yield = ty + MIN_YIELD_PERIOD;
 218         }
 219
 220         if (TIME_AFTER(time, t + timeout))
 221             return false;
 222     }
 223
 224     return true;
 225 }
 226
 227 static int sd_command(unsigned int cmd, unsigned long arg1,
 228                       unsigned long *response, unsigned int cmdat)
 229 {
 230     int i, words; /* Number of 16 bit words to read from MMC_RES */
 231     unsigned int data[9];
 232
 233     MMC_CMD = cmd;
 234     MMC_ARGH = (unsigned int)((arg1 & 0xffff0000) >> 16);
 235     MMC_ARGL = (unsigned int)((arg1 & 0xffff));
 236     MMC_CMDAT  = cmdat;
 237
 238     if (!sd_poll_status(STAT_END_CMD_RES, 100000))
 239         return -EC_COMMAND;
 240
 241     if ((MMC_STAT & STAT_ERROR_BITS) != 0)
 242         /* Error sending command */
 243         return -EC_COMMAND - (MMC_STAT & STAT_ERROR_BITS)*100;
 244
 245     if (cmd == SD_GO_IDLE_STATE)
 246         return 0; /* no response here */
 247
 248     words = (cmdat == CMDAT_RES_TYPE2) ? 9 : 3;
 249
 250     for (i = 0; i < words; i++) /* MMC_RES is read MSB first */
 251         data[i] = MMC_RES; /* Read most significant 16-bit word */
 252
 253     if (response == NULL)
 254     {
 255         /* response discarded */
 256     }
 257     else if (cmdat == CMDAT_RES_TYPE2)
 258     {
 259         /* Response type 2 has the following structure:
 260          * [135:135] Start Bit - '0'
 261          * [134:134] Transmission bit - '0'
 262          * [133:128] Reserved - '111111'
 263          * [127:001] CID or CSD register including internal CRC7
 264          * [000:000] End Bit - '1'
 265          */
 266         response[3] = (data[0]<<24) + (data[1]<<8) + (data[2]>>8);
 267         response[2] = (data[2]<<24) + (data[3]<<8) + (data[4]>>8);
 268         response[1] = (data[4]<<24) + (data[5]<<8) + (data[6]>>8);
 269         response[0] = (data[6]<<24) + (data[7]<<8) + (data[8]>>8);
 270     }
 271     else
 272     {
 273         /* Response types 1, 1b, 3, 6, 7 have the following structure:
 274          * Types 4 and 5 are not supported.
 275          *
 276          *     [47] Start bit - '0'
 277          *     [46] Transmission bit - '0'
 278          *  [45:40] R1, R1b, R6, R7: Command index
 279          *          R3: Reserved - '111111'
 280          *   [39:8] R1, R1b: Card Status
 281          *          R3: OCR Register
 282          *          R6: [31:16] RCA
 283          *              [15: 0] Card Status Bits 23, 22, 19, 12:0
 284          *                     [23] COM_CRC_ERROR
 285          *                     [22] ILLEGAL_COMMAND
 286          *                     [19] ERROR
 287          *                   [12:9] CURRENT_STATE
 288          *                      [8] READY_FOR_DATA
 289          *                    [7:6]
 290          *                      [5] SD_APP_CMD
 291          *                      [4]
 292          *                      [3] AKE_SEQ_ERROR
 293          *                      [2] Reserved
 294          *                    [1:0] Reserved for test mode
 295          *          R7: [19:16] Voltage accepted
 296          *              [15:8]  echo-back of check pattern
 297          *    [7:1] R1, R1b: CRC7
 298          *          R3: Reserved - '1111111'
 299          *      [0] End Bit - '1'
 300          */
 301         response[0] = (data[0]<<24) + (data[1]<<8) + (data[2]>>8);
 302     }
 303
 304     return 0;
 305 }
 306
 307 static int sd_wait_for_state(unsigned int state, int id)
 308 {
 309     unsigned long response = 0;
 310     unsigned int timeout = 0x80000;
 311
 312     check_time[id] = USEC_TIMER;
 313
 314     while (1)
 315     {
 316         int ret = sd_command(SD_SEND_STATUS, currcard->rca, &response, CMDAT_RES_TYPE1);
 317         long us;
 318
 319         if (ret < 0)
 320             return ret*100 - id;
 321
 322         if (((response >> 9) & 0xf) == state)
 323         {
 324             MMC_SD_STATE = state;
 325             return 0;
 326         }
 327
 328         if (!sd_check_timeout(timeout, id))
 329             return -EC_WAIT_STATE_FAILED*100 - id;
 330
 331         us = USEC_TIMER;
 332         if (TIME_AFTER(us, next_yield))
 333         {
 334             yield();
 335             timeout += USEC_TIMER - us;
 336             next_yield = us + MIN_YIELD_PERIOD;
 337         }
 338     }
 339 }
 340
 341 static inline void copy_read_sectors_fast(unsigned char **buf)
 342 {
 343     /* Copy one chunk of 16 words using best method for start alignment */
 344     switch ( (intptr_t)*buf & 3 )
 345     {
 346     case 0:
 347         asm volatile (
 348             "ldmia  %[data], { r2-r9 }          \r\n"
 349             "orr    r2, r2, r3, lsl #16         \r\n"
 350             "orr    r4, r4, r5, lsl #16         \r\n"
 351             "orr    r6, r6, r7, lsl #16         \r\n"
 352             "orr    r8, r8, r9, lsl #16         \r\n"
 353             "stmia  %[buf]!, { r2, r4, r6, r8 } \r\n"
 354             "ldmia  %[data], { r2-r9 }          \r\n"
 355             "orr    r2, r2, r3, lsl #16         \r\n"
 356             "orr    r4, r4, r5, lsl #16         \r\n"
 357             "orr    r6, r6, r7, lsl #16         \r\n"
 358             "orr    r8, r8, r9, lsl #16         \r\n"
 359             "stmia  %[buf]!, { r2, r4, r6, r8 } \r\n"
 360             : [buf]"+&r"(*buf)
 361             : [data]"r"(&MMC_DATA_FIFO)
 362             : "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9"
 363         );
 364         break;
 365     case 1:
 366         asm volatile (
 367             "ldmia  %[data], { r2-r9 }          \r\n"
 368             "orr    r3, r2, r3, lsl #16         \r\n"
 369             "strb   r3, [%[buf]], #1            \r\n"
 370             "mov    r3, r3, lsr #8              \r\n"
 371             "strh   r3, [%[buf]], #2            \r\n"
 372             "mov    r3, r3, lsr #16             \r\n"
 373             "orr    r3, r3, r4, lsl #8          \r\n"
 374             "orr    r3, r3, r5, lsl #24         \r\n"
 375             "mov    r5, r5, lsr #8              \r\n"
 376             "orr    r5, r5, r6, lsl #8          \r\n"
 377             "orr    r5, r5, r7, lsl #24         \r\n"
 378             "mov    r7, r7, lsr #8              \r\n"
 379             "orr    r7, r7, r8, lsl #8          \r\n"
 380             "orr    r7, r7, r9, lsl #24         \r\n"
 381             "mov    r2, r9, lsr #8              \r\n"
 382             "stmia  %[buf]!, { r3, r5, r7 }     \r\n"
 383             "ldmia  %[data], { r3-r10 }         \r\n"
 384             "orr    r2, r2, r3, lsl #8          \r\n"
 385             "orr    r2, r2, r4, lsl #24         \r\n"
 386             "mov    r4, r4, lsr #8              \r\n"
 387             "orr    r4, r4, r5, lsl #8          \r\n"
 388             "orr    r4, r4, r6, lsl #24         \r\n"
 389             "mov    r6, r6, lsr #8              \r\n"
 390             "orr    r6, r6, r7, lsl #8          \r\n"
 391             "orr    r6, r6, r8, lsl #24         \r\n"
 392             "mov    r8, r8, lsr #8              \r\n"
 393             "orr    r8, r8, r9, lsl #8          \r\n"
 394             "orr    r8, r8, r10, lsl #24        \r\n"
 395             "mov    r10, r10, lsr #8            \r\n"
 396             "stmia  %[buf]!, { r2, r4, r6, r8 } \r\n"
 397             "strb   r10, [%[buf]], #1           \r\n"
 398             : [buf]"+&r"(*buf)
 399             : [data]"r"(&MMC_DATA_FIFO)
 400             : "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
 401         );
 402         break;
 403     case 2:
 404         asm volatile (
 405             "ldmia  %[data], { r2-r9 }          \r\n"
 406             "strh   r2, [%[buf]], #2            \r\n"
 407             "orr    r3, r3, r4, lsl #16         \r\n"
 408             "orr    r5, r5, r6, lsl #16         \r\n"
 409             "orr    r7, r7, r8, lsl #16         \r\n"
 410             "stmia  %[buf]!, { r3, r5, r7 }     \r\n"
 411             "ldmia  %[data], { r2-r8, r10 }     \r\n"
 412             "orr    r2, r9, r2, lsl #16         \r\n"
 413             "orr    r3, r3, r4, lsl #16         \r\n"
 414             "orr    r5, r5, r6, lsl #16         \r\n"
 415             "orr    r7, r7, r8, lsl #16         \r\n"
 416             "stmia  %[buf]!, { r2, r3, r5, r7 } \r\n"
 417             "strh   r10, [%[buf]], #2           \r\n"
 418             : [buf]"+&r"(*buf)
 419             : [data]"r"(&MMC_DATA_FIFO)
 420             : "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
 421         );
 422         break;
 423     case 3:
 424         asm volatile (
 425             "ldmia  %[data], { r2-r9 }          \r\n"
 426             "orr    r3, r2, r3, lsl #16         \r\n"
 427             "strb   r3, [%[buf]], #1            \r\n"
 428             "mov    r3, r3, lsr #8              \r\n"
 429             "orr    r3, r3, r4, lsl #24         \r\n"
 430             "mov    r4, r4, lsr #8              \r\n"
 431             "orr    r5, r4, r5, lsl #8          \r\n"
 432             "orr    r5, r5, r6, lsl #24         \r\n"
 433             "mov    r6, r6, lsr #8              \r\n"
 434             "orr    r7, r6, r7, lsl #8          \r\n"
 435             "orr    r7, r7, r8, lsl #24         \r\n"
 436             "mov    r8, r8, lsr #8              \r\n"
 437             "orr    r2, r8, r9, lsl #8          \r\n"
 438             "stmia  %[buf]!, { r3, r5, r7 }     \r\n"
 439             "ldmia  %[data], { r3-r10 }         \r\n"
 440             "orr    r2, r2, r3, lsl #24         \r\n"
 441             "mov    r3, r3, lsr #8              \r\n"
 442             "orr    r4, r3, r4, lsl #8          \r\n"
 443             "orr    r4, r4, r5, lsl #24         \r\n"
 444             "mov    r5, r5, lsr #8              \r\n"
 445             "orr    r6, r5, r6, lsl #8          \r\n"
 446             "orr    r6, r6, r7, lsl #24         \r\n"
 447             "mov    r7, r7, lsr #8              \r\n"
 448             "orr    r8, r7, r8, lsl #8          \r\n"
 449             "orr    r8, r8, r9, lsl #24         \r\n"
 450             "mov    r9, r9, lsr #8              \r\n"
 451             "orr    r10, r9, r10, lsl #8        \r\n"
 452             "stmia  %[buf]!, { r2, r4, r6, r8 } \r\n"
 453             "strh   r10, [%[buf]], #2           \r\n"
 454             "mov    r10, r10, lsr #16           \r\n"
 455             "strb   r10, [%[buf]], #1           \r\n"
 456             : [buf]"+&r"(*buf)
 457             : [data]"r"(&MMC_DATA_FIFO)
 458             : "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
 459         );
 460         break;
 461     }
 462 }
 463
 464 static inline void copy_read_sectors_slow(unsigned char** buf)
 465 {
 466     int cnt = FIFO_LEN;
 467     int t;
 468
 469     /* Copy one chunk of 16 words */
 470     asm volatile (
 471     "1:                                     \r\n"
 472         "ldrh   %[t], [%[data]]             \r\n"
 473         "strb   %[t], [%[buf]], #1          \r\n"
 474         "mov    %[t], %[t], lsr #8          \r\n"
 475         "strb   %[t], [%[buf]], #1          \r\n"
 476         "subs   %[cnt], %[cnt], #1          \r\n"
 477         "bgt    1b                          \r\n"
 478         : [cnt]"+&r"(cnt), [buf]"+&r"(*buf),
 479           [t]"=&r"(t)
 480         : [data]"r"(&MMC_DATA_FIFO)
 481     );
 482 }
 483
 484 /* Writes have to be kept slow for now */
 485 static inline void copy_write_sectors(const unsigned char** buf)
 486 {
 487     int cnt = FIFO_LEN - 1;
 488     unsigned t;
 489     long time;
 490
 491     time = USEC_TIMER + 3;
 492     if  (((intptr_t)*buf & 3) == 0)
 493     {
 494         asm volatile (
 495             "ldmia  %[buf]!, { r3, r5, r7, r9 } \r\n"
 496             "mov    r4, r3, lsr #16             \r\n"
 497             "mov    r6, r5, lsr #16             \r\n"
 498             "mov    r8, r7, lsr #16             \r\n"
 499             "mov    r10, r9, lsr #16            \r\n"
 500             "stmia  %[data], { r3-r10 }         \r\n"
 501             "ldmia  %[buf]!, { r3, r5, r7, r9 } \r\n"
 502             "mov    r4, r3, lsr #16             \r\n"
 503             "mov    r6, r5, lsr #16             \r\n"
 504             "mov    r8, r7, lsr #16             \r\n"
 505             "mov    %[t], r9, lsr #16           \r\n"
 506             "stmia  %[data], { r3-r9 }          \r\n"
 507             : [buf]"+&r"(*buf), [t]"=&r"(t)
 508             : [data]"r"(&MMC_DATA_FIFO)
 509             : "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
 510         );
 511     }
 512     else
 513     {
 514         do
 515         {
 516             t  = *(*buf)++;
 517             t |= *(*buf)++ << 8;
 518             MMC_DATA_FIFO = t;
 519         } while (--cnt > 0); /* tail loop is faster */
 520         t  = *(*buf)++;
 521         t |= *(*buf)++ << 8;
 522     }
 523     /* Don't write the last word before at least 3 usec have elapsed since FIFO_EMPTY */
 524     /* This prevents the 'two bytes inserted' bug. */
 525
 526     while (!TIME_AFTER(USEC_TIMER, time));
 527     MMC_DATA_FIFO = t;
 528 }
 529
 530 static int sd_select_bank(unsigned char bank)
 531 {
 532     unsigned char card_data[512];
 533     const unsigned char* write_buf;
 534     int i, ret;
 535
 536     memset(card_data, 0, 512);
 537
 538     ret = sd_wait_for_state(SD_TRAN, EC_TRAN_SEL_BANK);
 539     if (ret < 0)
 540         return ret;
 541
 542     MMC_BLKLEN = 512;
 543     MMC_NUMBLK = 1;
 544
 545     ret = sd_command(35, 0, NULL, /* CMD35 is vendor specific */
 546                      0x1c00 | CMDAT_WR_RD | CMDAT_DATA_EN | CMDAT_RES_TYPE1);
 547     if (ret < 0)
 548         return ret;
 549
 550     MMC_SD_STATE = SD_PRG;
 551
 552     card_data[0] = bank;
 553
 554     /* Write the card data */
 555     write_buf = card_data;
 556     for (i = 0; i < SD_BLOCK_SIZE/2; i += FIFO_LEN)
 557     {
 558         /* Wait for the FIFO to empty */
 559         if (sd_poll_status(STAT_XMIT_FIFO_EMPTY, 10000))
 560         {
 561             copy_write_sectors(&write_buf); /* Copy one chunk of 16 words */
 562             continue;
 563         }
 564
 565         return -EC_FIFO_SEL_BANK_EMPTY;
 566     }
 567
 568     if (!sd_poll_status(STAT_PRG_DONE, 10000))
 569         return -EC_FIFO_SEL_BANK_DONE;
 570
 571     currcard->current_bank = bank;
 572
 573     return 0;
 574 }
 575
 576 static void sd_card_mux(int card_no)
 577 {
 578 /* Set the current card mux */
 579 #if defined(SANSA_E200)
 580     if (card_no == 0)
 581     {
 582         GPO32_VAL |= 0x4;
 583
 584         GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x7a);
 585         GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x7a);
 586         GPIO_SET_BITWISE(GPIOD_ENABLE,  0x1f);
 587         GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x1f);
 588         GPIO_SET_BITWISE(GPIOD_OUTPUT_EN,  0x1f);
 589
 590         outl((inl(0x70000014) & ~(0x3ffff)) | 0x255aa, 0x70000014);
 591     }
 592     else
 593     {
 594         GPO32_VAL &= ~0x4;
 595
 596         GPIO_CLEAR_BITWISE(GPIOD_ENABLE, 0x1f);
 597         GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
 598         GPIO_SET_BITWISE(GPIOA_ENABLE, 0x7a);
 599         GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x7a);
 600         GPIO_SET_BITWISE( GPIOA_OUTPUT_EN, 0x7a);
 601
 602         outl(inl(0x70000014) & ~(0x3ffff), 0x70000014);
 603     }
 604 #elif defined(SANSA_C200)
 605     if (card_no == 0)
 606     {
 607         GPO32_VAL |= 0x4;
 608
 609         GPIO_CLEAR_BITWISE(GPIOD_ENABLE, 0x1f);
 610         GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
 611         GPIO_SET_BITWISE(GPIOA_ENABLE, 0x7a);
 612         GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x7a);
 613         GPIO_SET_BITWISE( GPIOA_OUTPUT_EN, 0x7a);
 614
 615         outl(inl(0x70000014) & ~(0x3ffff), 0x70000014);
 616     }
 617     else
 618     {
 619         GPO32_VAL &= ~0x4;
 620
 621         GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x7a);
 622         GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x7a);
 623         GPIO_SET_BITWISE(GPIOD_ENABLE,  0x1f);
 624         GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x1f);
 625         GPIO_SET_BITWISE(GPIOD_OUTPUT_EN,  0x1f);
 626
 627         outl((inl(0x70000014) & ~(0x3ffff)) | 0x255aa, 0x70000014);
 628     }
 629 #elif defined(PHILIPS_SA9200)
 630     /* only 1 "card" (no external memory card) */
 631     (void)card_no;
 632
 633     GPIO_SET_BITWISE(GPIOH_ENABLE, 0x80);
 634     GPIO_SET_BITWISE(GPIOH_OUTPUT_EN, 0x80);
 635
 636     outl(0x255aa, 0x70000014);
 637
 638     GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x04);
 639     GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x04);
 640
 641     GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x7a);
 642     GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x7a);
 643
 644     GPIO_SET_BITWISE(GPIOH_OUTPUT_VAL, 0x80);
 645     GPIO_SET_BITWISE(GPIOH_OUTPUT_EN, 0x80);
 646 #endif
 647 }
 648
 649 static void sd_init_device(int card_no)
 650 {
 651 /* SD Protocol registers */
 652 #ifdef HAVE_HOTSWAP
 653     unsigned long response = 0;
 654 #endif
 655     unsigned int  i;
 656     unsigned char carddata[512];
 657     unsigned char *dataptr;
 658     unsigned long temp_reg[4];
 659     int ret;
 660
 661 /* Enable and initialise controller */
 662     MMC_CLKRT = 6;  /* switch to lowest clock rate */
 663
 664 /* Initialise card data as blank */
 665     memset(currcard, 0, sizeof(*currcard));
 666
 667 /* Switch card mux to card to initialize */
 668     sd_card_mux(card_no);
 669
 670 /* Init NAND */
 671     MMC_INIT_1 |=  (1 << 15);
 672     MMC_INIT_2 |=  (1 << 15);
 673     MMC_INIT_2 &= ~(3 << 12);
 674     MMC_INIT_2 |=  (1 << 13);
 675     MMC_INIT_1 &= ~(3 << 12);
 676     MMC_INIT_1 |=  (1 << 13);
 677
 678     DEV_EN |= DEV_ATA; /* Enable controller */
 679     DEV_RS |= DEV_ATA; /* Reset controller */
 680     DEV_RS &=~DEV_ATA; /* Clear Reset */
 681
 682     MMC_SD_STATE = SD_TRAN;
 683
 684     MMC_I_MASK = 0xf;  /* disable interrupts */
 685
 686     ret = sd_command(SD_GO_IDLE_STATE, 0, NULL, 0x100);
 687     if (ret < 0)
 688         goto card_init_error;
 689
 690     check_time[EC_POWER_UP] = USEC_TIMER;
 691
 692 #ifdef HAVE_HOTSWAP
 693     /* Check for SDHC:
 694        - non-SDHC cards simply ignore SD_SEND_IF_COND (CMD8) and we get error -219,
 695          which we can just ignore and assume we're dealing with standard SD.
 696        - SDHC cards echo back the argument into the response. This is how we
 697          tell if the card is SDHC.
 698      */
 699     ret = sd_command(SD_SEND_IF_COND,0x1aa, &response,
 700                      CMDAT_DATA_EN | CMDAT_RES_TYPE3);
 701     if ( (ret < 0) && (ret!=-219) )
 702             goto card_init_error;
 703 #endif
 704
 705     while ((currcard->ocr & (1 << 31)) == 0) /* until card is powered up */
 706     {
 707         ret = sd_command(SD_APP_CMD, currcard->rca, NULL, CMDAT_RES_TYPE1);
 708         if (ret < 0)
 709             goto card_init_error;
 710
 711 #ifdef HAVE_HOTSWAP
 712         if(response == 0x1aa)
 713         {
 714             /* SDHC */
 715             ret = sd_command(SD_APP_OP_COND, (1<<30)|0x100000,
 716                              &currcard->ocr, CMDAT_RES_TYPE3);
 717         }
 718         else
 719 #endif /* HAVE_HOTSWAP */
 720         {
 721             /* SD Standard */
 722             ret = sd_command(SD_APP_OP_COND, 0x100000, &currcard->ocr,
 723                              CMDAT_RES_TYPE3);
 724         }
 725
 726         if (ret < 0)
 727             goto card_init_error;
 728
 729         if (!sd_check_timeout(5000000, EC_POWER_UP))
 730         {
 731             ret = -EC_POWER_UP;
 732             goto card_init_error;
 733         }
 734     }
 735
 736     ret = sd_command(SD_ALL_SEND_CID, 0, temp_reg, CMDAT_RES_TYPE2);
 737     if (ret < 0)
 738         goto card_init_error;
 739
 740     for(i=0; i<4; i++)
 741         currcard->cid[i] = temp_reg[3-i];
 742
 743     ret = sd_command(SD_SEND_RELATIVE_ADDR, 0, &currcard->rca, CMDAT_RES_TYPE1);
 744     if (ret < 0)
 745         goto card_init_error;
 746
 747     ret = sd_command(SD_SEND_CSD, currcard->rca, temp_reg, CMDAT_RES_TYPE2);
 748     if (ret < 0)
 749         goto card_init_error;
 750
 751     for(i=0; i<4; i++)
 752         currcard->csd[i] = temp_reg[3-i];
 753
 754     sd_parse_csd(currcard);
 755
 756     MMC_CLKRT = 0;  /* switch to highest clock rate */
 757
 758     ret = sd_command(SD_SELECT_CARD, currcard->rca, NULL,
 759                      0x80 | CMDAT_RES_TYPE1);
 760     if (ret < 0)
 761         goto card_init_error;
 762
 763     ret = sd_command(SD_APP_CMD, currcard->rca, NULL, CMDAT_RES_TYPE1);
 764     if (ret < 0)
 765         goto card_init_error;
 766
 767     ret = sd_command(SD_SET_BUS_WIDTH, currcard->rca | 2, NULL,
 768                      CMDAT_RES_TYPE1); /* 4 bit */
 769     if (ret < 0)
 770         goto card_init_error;
 771
 772     ret = sd_command(SD_SET_BLOCKLEN, currcard->blocksize, NULL,
 773                      CMDAT_RES_TYPE1);
 774     if (ret < 0)
 775         goto card_init_error;
 776
 777     MMC_BLKLEN = currcard->blocksize;
 778
 779     /* If this card is >4GB & not SDHC, then we need to enable bank switching */
 780     if( (currcard->numblocks >= BLOCKS_PER_BANK) &&
 781         ((currcard->ocr & (1<<30)) == 0) )
 782     {
 783         MMC_SD_STATE = SD_TRAN;
 784         MMC_NUMBLK = 1;
 785
 786         ret = sd_command(SD_SWITCH_FUNC, 0x80ffffef, NULL,
 787                          0x1c00 | CMDAT_DATA_EN | CMDAT_RES_TYPE1);
 788         if (ret < 0)
 789             goto card_init_error;
 790
 791         /* Read 512 bytes from the card.
 792         The first 512 bits contain the status information
 793         TODO: Do something useful with this! */
 794         dataptr = carddata;
 795         for (i = 0; i < SD_BLOCK_SIZE/2; i += FIFO_LEN)
 796         {
 797             /* Wait for the FIFO to be full */
 798             if (sd_poll_status(STAT_RECV_FIFO_FULL, 100000))
 799             {
 800                 copy_read_sectors_slow(&dataptr);
 801                 continue;
 802             }
 803
 804             ret = -EC_FIFO_ENA_BANK_EMPTY;
 805             goto card_init_error;
 806         }
 807     }
 808
 809     currcard->initialized = 1;
 810     return;
 811
 812     /* Card failed to initialize so disable it */
 813 card_init_error:
 814     currcard->initialized = ret;
 815 }
 816
 817 /* lock must already be aquired */
 818 static void sd_select_device(int card_no)
 819 {
 820     currcard = &card_info[card_no];
 821
 822     if (card_no == 0)
 823     {
 824         /* Main card always gets a chance */
 825         sd_status[0].retry = 0;
 826     }
 827
 828     if (currcard->initialized > 0)
 829     {
 830         /* This card is already initialized - switch to it */
 831         sd_card_mux(card_no);
 832         return;
 833     }
 834
 835     if (currcard->initialized == 0)
 836     {
 837         /* Card needs (re)init */
 838         sd_init_device(card_no);
 839     }
 840 }
 841
 842 /* API Functions */
 843
 844 int sd_read_sectors(IF_MD2(int drive,) unsigned long start, int incount,
 845                      void* inbuf)
 846 {
 847 #ifndef HAVE_MULTIDRIVE
 848     const int drive = 0;
 849 #endif
 850     int ret;
 851     unsigned char *buf, *buf_end;
 852     unsigned int bank;
 853
 854     /* TODO: Add DMA support. */
 855
 856     mutex_lock(&sd_mtx);
 857     sd_enable(true);
 858     led(true);
 859
 860 sd_read_retry:
 861     if (drive != 0 && !card_detect_target())
 862     {
 863         /* no external sd-card inserted */
 864         ret = -EC_NOCARD;
 865         goto sd_read_error;
 866     }
 867
 868     sd_select_device(drive);
 869
 870     if (currcard->initialized < 0)
 871     {
 872         ret = currcard->initialized;
 873         goto sd_read_error;
 874     }
 875
 876     last_disk_activity = current_tick;
 877
 878     /* Only switch banks with non-SDHC cards */
 879     if((currcard->ocr & (1<<30))==0)
 880     {
 881         bank = start / BLOCKS_PER_BANK;
 882
 883         if (currcard->current_bank != bank)
 884         {
 885             ret = sd_select_bank(bank);
 886             if (ret < 0)
 887                 goto sd_read_error;
 888         }
 889
 890         start -= bank * BLOCKS_PER_BANK;
 891     }
 892
 893     ret = sd_wait_for_state(SD_TRAN, EC_TRAN_READ_ENTRY);
 894     if (ret < 0)
 895         goto sd_read_error;
 896
 897     MMC_NUMBLK = incount;
 898
 899 #ifdef HAVE_HOTSWAP
 900     if(currcard->ocr & (1<<30) )
 901     {
 902         /* SDHC */
 903         ret = sd_command(SD_READ_MULTIPLE_BLOCK, start, NULL,
 904                          0x1c00 | CMDAT_BUSY | CMDAT_DATA_EN | CMDAT_RES_TYPE1);
 905     }
 906     else
 907 #endif
 908     {
 909         ret = sd_command(SD_READ_MULTIPLE_BLOCK, start * SD_BLOCK_SIZE, NULL,
 910                          0x1c00 | CMDAT_BUSY | CMDAT_DATA_EN | CMDAT_RES_TYPE1);
 911     }
 912     if (ret < 0)
 913         goto sd_read_error;
 914
 915     /* TODO: Don't assume SD_BLOCK_SIZE == SECTOR_SIZE */
 916
 917     buf_end = (unsigned char *)inbuf + incount * currcard->blocksize;
 918     for (buf = inbuf; buf < buf_end;)
 919     {
 920         /* Wait for the FIFO to be full */
 921         if (sd_poll_status(STAT_RECV_FIFO_FULL, 0x80000))
 922         {
 923             copy_read_sectors_fast(&buf); /* Copy one chunk of 16 words */
 924             /* TODO: Switch bank if necessary */
 925             continue;
 926         }
 927
 928         ret = -EC_FIFO_READ_FULL;
 929         goto sd_read_error;
 930     }
 931
 932     last_disk_activity = current_tick;
 933
 934     ret = sd_command(SD_STOP_TRANSMISSION, 0, NULL, CMDAT_RES_TYPE1);
 935     if (ret < 0)
 936         goto sd_read_error;
 937
 938     ret = sd_wait_for_state(SD_TRAN, EC_TRAN_READ_EXIT);
 939     if (ret < 0)
 940         goto sd_read_error;
 941
 942     while (1)
 943     {
 944         led(false);
 945         sd_enable(false);
 946         mutex_unlock(&sd_mtx);
 947
 948         return ret;
 949
 950 sd_read_error:
 951         if (sd_status[drive].retry < sd_status[drive].retry_max
 952             && ret != -EC_NOCARD)
 953         {
 954             sd_status[drive].retry++;
 955             currcard->initialized = 0;
 956             goto sd_read_retry;
 957         }
 958     }
 959 }
 960
 961 int sd_write_sectors(IF_MD2(int drive,) unsigned long start, int count,
 962                       const void* outbuf)
 963 {
 964 /* Write support is not finished yet */
 965 /* TODO: The standard suggests using ACMD23 prior to writing multiple blocks
 966    to improve performance */
 967 #ifndef HAVE_MULTIDRIVE
 968     const int drive = 0;
 969 #endif
 970     int ret;
 971     const unsigned char *buf, *buf_end;
 972     unsigned int bank;
 973
 974     mutex_lock(&sd_mtx);
 975     sd_enable(true);
 976     led(true);
 977
 978 sd_write_retry:
 979     if (drive != 0 && !card_detect_target())
 980     {
 981         /* no external sd-card inserted */
 982         ret = -EC_NOCARD;
 983         goto sd_write_error;
 984     }
 985
 986     sd_select_device(drive);
 987
 988     if (currcard->initialized < 0)
 989     {
 990         ret = currcard->initialized;
 991         goto sd_write_error;
 992     }
 993
 994     /* Only switch banks with non-SDHC cards */
 995     if((currcard->ocr & (1<<30))==0)
 996     {
 997         bank = start / BLOCKS_PER_BANK;
 998
 999         if (currcard->current_bank != bank)
1000         {
1001             ret = sd_select_bank(bank);
1002             if (ret < 0)
1003                 goto sd_write_error;
1004         }
1005
1006         start -= bank * BLOCKS_PER_BANK;
1007     }
1008
1009     check_time[EC_WRITE_TIMEOUT] = USEC_TIMER;
1010
1011     ret = sd_wait_for_state(SD_TRAN, EC_TRAN_WRITE_ENTRY);
1012     if (ret < 0)
1013         goto sd_write_error;
1014
1015     MMC_NUMBLK = count;
1016
1017 #ifdef HAVE_HOTSWAP
1018     if(currcard->ocr & (1<<30) )
1019     {
1020         /* SDHC */
1021         ret = sd_command(SD_WRITE_MULTIPLE_BLOCK, start, NULL,
1022                          CMDAT_WR_RD | CMDAT_DATA_EN | CMDAT_RES_TYPE1);
1023     }
1024     else
1025 #endif
1026     {
1027         ret = sd_command(SD_WRITE_MULTIPLE_BLOCK, start*SD_BLOCK_SIZE, NULL,
1028                          CMDAT_WR_RD | CMDAT_DATA_EN | CMDAT_RES_TYPE1);
1029     }
1030     if (ret < 0)
1031         goto sd_write_error;
1032
1033     buf_end = outbuf + count * currcard->blocksize - 2*FIFO_LEN;
1034
1035     for (buf = outbuf; buf <= buf_end;)
1036     {
1037         if (buf == buf_end)
1038         {
1039             /* Set MMC_SD_STATE to SD_PRG for the last buffer fill */
1040             MMC_SD_STATE = SD_PRG;
1041         }
1042
1043         copy_write_sectors(&buf); /* Copy one chunk of 16 words */
1044         /* TODO: Switch bank if necessary */
1045
1046         /* Wait for the FIFO to empty */
1047         if (!sd_poll_status(STAT_XMIT_FIFO_EMPTY, 0x80000))
1048         {
1049             ret = -EC_FIFO_WR_EMPTY;
1050             goto sd_write_error;
1051         }
1052     }
1053
1054     last_disk_activity = current_tick;
1055
1056     if (!sd_poll_status(STAT_PRG_DONE, 0x80000))
1057     {
1058         ret = -EC_FIFO_WR_DONE;
1059         goto sd_write_error;
1060     }
1061
1062     ret = sd_command(SD_STOP_TRANSMISSION, 0, NULL, CMDAT_RES_TYPE1);
1063     if (ret < 0)
1064         goto sd_write_error;
1065
1066     ret = sd_wait_for_state(SD_TRAN, EC_TRAN_WRITE_EXIT);
1067     if (ret < 0)
1068         goto sd_write_error;
1069
1070     while (1)
1071     {
1072         led(false);
1073         sd_enable(false);
1074         mutex_unlock(&sd_mtx);
1075
1076         return ret;
1077
1078 sd_write_error:
1079         if (sd_status[drive].retry < sd_status[drive].retry_max
1080             && ret != -EC_NOCARD)
1081         {
1082             sd_status[drive].retry++;
1083             currcard->initialized = 0;
1084             goto sd_write_retry;
1085         }
1086     }
1087 }
1088
1089 static void sd_thread(void) __attribute__((noreturn));
1090 static void sd_thread(void)
1091 {
1092     struct queue_event ev;
1093     bool idle_notified = false;
1094
1095     while (1)
1096     {
1097         queue_wait_w_tmo(&sd_queue, &ev, HZ);
1098
1099         switch ( ev.id )
1100         {
1101 #ifdef HAVE_HOTSWAP
1102         case SYS_HOTSWAP_INSERTED:
1103         case SYS_HOTSWAP_EXTRACTED:
1104             fat_lock();          /* lock-out FAT activity first -
1105                                     prevent deadlocking via disk_mount that
1106                                     would cause a reverse-order attempt with
1107                                     another thread */
1108             mutex_lock(&sd_mtx); /* lock-out card activity - direct calls
1109                                     into driver that bypass the fat cache */
1110
1111             /* We now have exclusive control of fat cache and ata */
1112
1113             disk_unmount(sd_first_drive+1); /* release "by force", ensure file
1114                                         descriptors aren't leaked and any busy
1115                                         ones are invalid if mounting */
1116
1117             /* Force card init for new card, re-init for re-inserted one or
1118              * clear if the last attempt to init failed with an error. */
1119             card_info[1].initialized = 0;
1120             sd_status[1].retry = 0;
1121
1122             if (ev.id == SYS_HOTSWAP_INSERTED)
1123                 disk_mount(sd_first_drive+1);
1124
1125             queue_broadcast(SYS_FS_CHANGED, 0);
1126
1127             /* Access is now safe */
1128             mutex_unlock(&sd_mtx);
1129             fat_unlock();
1130             break;
1131 #endif
1132         case SYS_TIMEOUT:
1133             if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
1134             {
1135                 idle_notified = false;
1136             }
1137             else
1138             {
1139                 /* never let a timer wrap confuse us */
1140                 next_yield = USEC_TIMER;
1141
1142                 if (!idle_notified)
1143                 {
1144                     call_storage_idle_notifys(false);
1145                     idle_notified = true;
1146                 }
1147             }
1148             break;
1149         case SYS_USB_CONNECTED:
1150             usb_acknowledge(SYS_USB_CONNECTED_ACK);
1151             /* Wait until the USB cable is extracted again */
1152             usb_wait_for_disconnect(&sd_queue);
1153
1154             break;
1155         case SYS_USB_DISCONNECTED:
1156             usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
1157             break;
1158         }
1159     }
1160 }
1161
1162 void sd_enable(bool on)
1163 {
1164     if(on)
1165     {
1166         DEV_EN |= DEV_ATA; /* Enable controller */
1167     }
1168     else
1169     {
1170         DEV_EN &= ~DEV_ATA; /* Disable controller */
1171     }
1172 }
1173
1174 #ifdef HAVE_HOTSWAP
1175 void card_enable_monitoring_target(bool on)
1176 {
1177     if (on)
1178     {
1179 #ifdef SANSA_E200
1180         GPIO_SET_BITWISE(GPIOA_INT_EN, 0x80);
1181 #elif defined(SANSA_C200)
1182         GPIO_SET_BITWISE(GPIOL_INT_EN, 0x08);
1183 #endif
1184     }
1185     else
1186     {
1187 #ifdef SANSA_E200
1188         GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
1189 #elif defined(SANSA_C200)
1190         GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
1191 #endif
1192     }
1193 }
1194 #endif
1195
1196 int sd_init(void)
1197 {
1198     int ret = 0;
1199
1200     if (!initialized)
1201         mutex_init(&sd_mtx);
1202
1203     mutex_lock(&sd_mtx);
1204
1205     led(false);
1206
1207     if (!initialized)
1208     {
1209         initialized = true;
1210
1211         /* init controller */
1212 #if defined(PHILIPS_SA9200)
1213         GPIOA_ENABLE = 0x00;
1214         GPIO_SET_BITWISE(GPIOD_ENABLE, 0x01);
1215 #else
1216         outl(inl(0x70000088) & ~(0x4), 0x70000088);
1217         outl(inl(0x7000008c) & ~(0x4), 0x7000008c);
1218         GPO32_ENABLE |= 0x4;
1219
1220         GPIO_SET_BITWISE(GPIOG_ENABLE, (0x3 << 5));
1221         GPIO_SET_BITWISE(GPIOG_OUTPUT_EN, (0x3 << 5));
1222         GPIO_SET_BITWISE(GPIOG_OUTPUT_VAL, (0x3 << 5));
1223 #endif
1224
1225 #ifdef HAVE_HOTSWAP
1226         /* enable card detection port - mask interrupt first */
1227 #ifdef SANSA_E200
1228         GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
1229
1230         GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x80);
1231         GPIO_SET_BITWISE(GPIOA_ENABLE, 0x80);
1232 #elif defined SANSA_C200
1233         GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
1234
1235         GPIO_CLEAR_BITWISE(GPIOL_OUTPUT_EN, 0x08);
1236         GPIO_SET_BITWISE(GPIOL_ENABLE, 0x08);
1237 #endif
1238 #endif
1239         sd_select_device(0);
1240
1241         if (currcard->initialized < 0)
1242             ret = currcard->initialized;
1243
1244         queue_init(&sd_queue, true);
1245         create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
1246             sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE)
1247             IF_COP(, CPU));
1248
1249         /* enable interupt for the mSD card */
1250         sleep(HZ/10);
1251 #ifdef HAVE_HOTSWAP
1252 #ifdef SANSA_E200
1253         CPU_INT_EN = HI_MASK;
1254         CPU_HI_INT_EN = GPIO0_MASK;
1255
1256         GPIOA_INT_LEV = (0x80 << 8) | (~GPIOA_INPUT_VAL & 0x80);
1257
1258         GPIOA_INT_CLR = 0x80;
1259 #elif defined SANSA_C200
1260         CPU_INT_EN = HI_MASK;
1261         CPU_HI_INT_EN = GPIO2_MASK;
1262
1263         GPIOL_INT_LEV = (0x08 << 8) | (~GPIOL_INPUT_VAL & 0x08);
1264
1265         GPIOL_INT_CLR = 0x08;
1266 #endif
1267 #endif
1268     }
1269
1270     mutex_unlock(&sd_mtx);
1271
1272     return ret;
1273 }
1274
1275 tCardInfo *card_get_info_target(int card_no)
1276 {
1277     return &card_info[card_no];
1278 }
1279
1280 bool card_detect_target(void)
1281 {
1282 #ifdef HAVE_HOTSWAP
1283 #ifdef SANSA_E200
1284     return (GPIOA_INPUT_VAL & 0x80) == 0; /* low active */
1285 #elif defined SANSA_C200
1286     return (GPIOL_INPUT_VAL & 0x08) != 0; /* high active */
1287 #endif
1288 #else
1289     return false;
1290 #endif
1291 }
1292
1293 #ifdef HAVE_HOTSWAP
1294 static int sd1_oneshot_callback(struct timeout *tmo)
1295 {
1296     (void)tmo;
1297
1298     /* This is called only if the state was stable for 300ms - check state
1299      * and post appropriate event. */
1300     if (card_detect_target())
1301         queue_broadcast(SYS_HOTSWAP_INSERTED, 0);
1302     else
1303         queue_broadcast(SYS_HOTSWAP_EXTRACTED, 0);
1304
1305     return 0;
1306 }
1307
1308 /* called on insertion/removal interrupt */
1309 void microsd_int(void)
1310 {
1311     static struct timeout sd1_oneshot;
1312
1313 #ifdef SANSA_E200
1314     GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
1315     GPIOA_INT_LEV = (0x80 << 8) | (~GPIOA_INPUT_VAL & 0x80);
1316     GPIOA_INT_CLR = 0x80;
1317     GPIO_SET_BITWISE(GPIOA_INT_EN, 0x80);
1318
1319 #elif defined SANSA_C200
1320     GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
1321     GPIOL_INT_LEV = (0x08 << 8) | (~GPIOL_INPUT_VAL & 0x08);
1322     GPIOL_INT_CLR = 0x08;
1323     GPIO_SET_BITWISE(GPIOL_INT_EN, 0x08);
1324 #endif
1325     timeout_register(&sd1_oneshot, sd1_oneshot_callback, (3*HZ/10), 0);
1326 }
1327 #endif /* HAVE_HOTSWAP */
1328
1329 long sd_last_disk_activity(void)
1330 {
1331     return last_disk_activity;
1332 }
1333
1334 #ifdef HAVE_HOTSWAP
1335 bool sd_removable(IF_MD_NONVOID(int drive))
1336 {
1337 #ifndef HAVE_MULTIDRIVE
1338     const int drive=0;
1339 #endif
1340     return (drive==1);
1341 }
1342
1343 bool sd_present(IF_MD_NONVOID(int drive))
1344 {
1345 #ifndef HAVE_MULTIDRIVE
1346     const int drive=0;
1347 #endif
1348     return (card_info[drive].initialized && card_info[drive].numblocks > 0);
1349 }
1350 #endif
1351
1352 #ifdef CONFIG_STORAGE_MULTI
1353 int sd_num_drives(int first_drive)
1354 {
1355     /* Store which logical drive number(s) we have been assigned */
1356     sd_first_drive = first_drive;
1357
1358 #ifdef HAVE_MULTIDRIVE
1359     return 2;
1360 #else
1361     return 1;
1362 #endif
1363 }
1364 #endif