firmware/rolo.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2002 Randy D. Wood
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include "config.h"
  23 #include "lcd.h"
  24 #include "lcd-remote.h"
  25 #include "thread.h"
  26 #include "kernel.h"
  27 #include "sprintf.h"
  28 #include "button.h"
  29 #include "file.h"
  30 #include "audio.h"
  31 #include "system.h"
  32 #include "i2c.h"
  33 #include "adc.h"
  34 #include "string.h"
  35 #include "buffer.h"
  36 #include "storage.h"
  37 #include "rolo.h"
  38
  39 #ifdef MI4_FORMAT
  40 #include "crc32-mi4.h"
  41 #undef FIRMWARE_OFFSET_FILE_CRC
  42 #undef FIRMWARE_OFFSET_FILE_DATA
  43 #define FIRMWARE_OFFSET_FILE_CRC     0xC
  44 #define FIRMWARE_OFFSET_FILE_DATA    0x200
  45 #endif
  46
  47 #if !defined(IRIVER_IFP7XX_SERIES)
  48 /* FIX: this doesn't work on iFP */
  49
  50 #define IRQ0_EDGE_TRIGGER 0x80
  51
  52 #ifdef CPU_PP
  53 /* Handle the COP properly - it needs to jump to a function outside SDRAM while
  54  * the new firmware is being loaded, and then jump to the start of SDRAM
  55  * TODO: Use the mailboxes built into the PP processor for this
  56  */
  57
  58 #if NUM_CORES > 1
  59 volatile unsigned char IDATA_ATTR cpu_message = 0;
  60 volatile unsigned char IDATA_ATTR cpu_reply = 0;
  61 extern int cop_idlestackbegin[];
  62
  63 void rolo_restart_cop(void) ICODE_ATTR;
  64 void rolo_restart_cop(void)
  65 {
  66     if (CURRENT_CORE == CPU)
  67     {
  68         /* There should be free thread slots aplenty */
  69         create_thread(rolo_restart_cop, cop_idlestackbegin, IDLE_STACK_SIZE,
  70                       0, "rolo COP" IF_PRIO(, PRIORITY_REALTIME)
  71                       IF_COP(, COP));
  72         return;
  73     }
  74
  75     COP_INT_DIS = -1;
  76
  77     /* Invalidate cache */
  78     cpucache_invalidate();
  79
  80     /* Disable cache */
  81     CACHE_CTL = CACHE_CTL_DISABLE;
  82
  83     /* Tell the main core that we're ready to reload */
  84     cpu_reply = 1;
  85
  86     /* Wait while RoLo loads the image into SDRAM */
  87     /* TODO: Accept checksum failure gracefully */
  88     while(cpu_message != 1);
  89
  90     /* Acknowledge the CPU and then reload */
  91     cpu_reply = 2;
  92
  93     asm volatile(
  94         "mov   r0, %0   \n"
  95         "mov   pc, r0   \n"
  96         : : "I"(DRAM_START)
  97     );
  98 }
  99 #endif /* NUM_CORES > 1 */
 100 #endif /* CPU_PP */
 101
 102 static void rolo_error(const char *text)
 103 {
 104     lcd_clear_display();
 105     lcd_puts(0, 0, "ROLO error:");
 106     lcd_puts_scroll(0, 1, text);
 107     lcd_update();
 108     button_get(true);
 109     button_get(true);
 110     button_get(true);
 111     lcd_stop_scroll();
 112 }
 113
 114 #if CONFIG_CPU == SH7034 || CONFIG_CPU == IMX31L
 115 /* these are in assembler file "descramble.S" for SH7034 */
 116 extern unsigned short descramble(const unsigned char* source,
 117                                  unsigned char* dest, int length);
 118 /* this is in firmware/target/arm/imx31/rolo_restart.c for IMX31 */
 119 extern void rolo_restart(const unsigned char* source, unsigned char* dest,
 120                          int length);
 121 #else
 122
 123 /* explicitly put this code in iram, ICODE_ATTR is defined to be null for some
 124    targets that are low on iram, like the gigabeat F/X */
 125 void rolo_restart(const unsigned char* source, unsigned char* dest,
 126                   long length) __attribute__ ((section(".icode")));
 127 void rolo_restart(const unsigned char* source, unsigned char* dest,
 128                   long length)
 129 {
 130     long i;
 131     unsigned char* localdest = dest;
 132
 133     /* This is the equivalent of a call to memcpy() but this must be done from
 134        iram to avoid overwriting itself and we don't want to depend on memcpy()
 135        always being in iram */
 136     for(i = 0;i < length;i++)
 137         *localdest++ = *source++;
 138
 139 #if defined(CPU_COLDFIRE)
 140     asm (
 141         "movec.l %0,%%vbr    \n"
 142         "move.l  (%0)+,%%sp  \n"
 143         "move.l  (%0),%0     \n"
 144         "jmp     (%0)        \n"
 145         : : "a"(dest)
 146     );
 147 #elif defined(CPU_PP)
 148     CPU_INT_DIS = -1;
 149
 150     /* Flush cache */
 151     cpucache_flush();
 152
 153     /* Disable cache */
 154     CACHE_CTL = CACHE_CTL_DISABLE;
 155
 156     /* Reset the memory mapping registers to zero */
 157     {
 158         volatile unsigned long *mmap_reg;
 159         for (mmap_reg = &MMAP_FIRST; mmap_reg <= &MMAP_LAST; mmap_reg++)
 160             *mmap_reg = 0;
 161     }
 162
 163 #if NUM_CORES > 1
 164     /* Tell the COP it's safe to continue rebooting */
 165     cpu_message = 1;
 166
 167     /* Wait for the COP to tell us it is rebooting */
 168     while(cpu_reply != 2);
 169 #endif
 170
 171     asm volatile(
 172         "mov   pc, %0   \n"
 173         : : "r"(DRAM_START)
 174     );
 175
 176 #elif defined(CPU_ARM)
 177 #ifdef HAVE_CPUCACHE_INVALIDATE
 178     /* Flush and invalidate caches */
 179     cpucache_invalidate();
 180 #endif
 181     asm volatile(
 182         "mov   pc, %0            \n"
 183         : : "r"(dest)
 184     );
 185 #elif defined(CPU_MIPS)
 186     __dcache_writeback_all();
 187     asm volatile(
 188         "jr     %0               \n"
 189         : : "r"(dest)
 190     );
 191 #endif
 192 }
 193 #endif
 194
 195 /* This is assigned in the linker control file */
 196 extern unsigned long loadaddress;
 197
 198 /***************************************************************************
 199  *
 200  * Name: rolo_load_app(char *filename,int scrambled)
 201  * Filename must be a fully defined filename including the path and extension
 202  *
 203  ***************************************************************************/
 204 int rolo_load(const char* filename)
 205 {
 206     int fd;
 207     long length;
 208 #if defined(CPU_COLDFIRE) || defined(CPU_ARM) || defined(CPU_MIPS)
 209 #if !defined(MI4_FORMAT)
 210     int i;
 211 #endif
 212     unsigned long checksum,file_checksum;
 213 #else
 214     long file_length;
 215     unsigned short checksum,file_checksum;
 216 #endif
 217     unsigned char* ramstart = (void*)&loadaddress;
 218
 219     lcd_clear_display();
 220     lcd_puts(0, 0, "ROLO...");
 221     lcd_puts(0, 1, "Loading");
 222     lcd_update();
 223 #ifdef HAVE_REMOTE_LCD
 224     lcd_remote_clear_display();
 225     lcd_remote_puts(0, 0, "ROLO...");
 226     lcd_remote_puts(0, 1, "Loading");
 227     lcd_remote_update();
 228 #endif
 229
 230     audio_stop();
 231
 232     fd = open(filename, O_RDONLY);
 233     if(-1 == fd) {
 234         rolo_error("File not found");
 235         return -1;
 236     }
 237
 238     length = filesize(fd) - FIRMWARE_OFFSET_FILE_DATA;
 239
 240 #if CONFIG_CPU != SH7034
 241     /* Read and save checksum */
 242     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 243     if (read(fd, &file_checksum, 4) != 4) {
 244         rolo_error("Error Reading checksum");
 245         return -1;
 246     }
 247
 248 #if !defined(MI4_FORMAT)
 249     /* Rockbox checksums are big-endian */
 250     file_checksum = betoh32(file_checksum);
 251 #endif
 252
 253 #if defined(CPU_PP) && NUM_CORES > 1
 254     lcd_puts(0, 2, "Waiting for coprocessor...");
 255     lcd_update();
 256     rolo_restart_cop();
 257     /* Wait for COP to be in safe code */
 258     while(cpu_reply != 1);
 259     lcd_puts(0, 2, "                          ");
 260     lcd_update();
 261 #endif
 262
 263     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 264
 265     if (read(fd, audiobuf, length) != length) {
 266         rolo_error("Error Reading File");
 267         return -1;
 268     }
 269
 270 #ifdef MI4_FORMAT
 271     /* Check CRC32 to see if we have a valid file */
 272     chksum_crc32gentab();
 273     checksum = chksum_crc32 (audiobuf, length);
 274 #else
 275     checksum = MODEL_NUMBER;
 276
 277     for(i = 0;i < length;i++) {
 278         checksum += audiobuf[i];
 279     }
 280 #endif
 281
 282     /* Verify checksum against file header */
 283     if (checksum != file_checksum) {
 284         rolo_error("Checksum Error");
 285         return -1;
 286     }
 287
 288 #ifdef HAVE_STORAGE_FLUSH
 289     lcd_puts(0, 1, "Flushing storage buffers");
 290     lcd_update();
 291     storage_flush();
 292 #endif
 293
 294     lcd_puts(0, 1, "Executing");
 295     lcd_update();
 296 #ifdef HAVE_REMOTE_LCD
 297     lcd_remote_puts(0, 1, "Executing");
 298     lcd_remote_update();
 299 #endif
 300     adc_close();
 301
 302 #if CONFIG_CPU != IMX31L /* We're not finished yet */
 303 #ifdef CPU_ARM
 304     /* Should do these together since some ARM version should never have
 305      * FIQ disabled and not IRQ (imx31 errata). */
 306     disable_interrupt(IRQ_FIQ_STATUS);
 307 #else
 308     /* Some targets have a higher disable level than HIGEST_IRQ_LEVEL */
 309     set_irq_level(DISABLE_INTERRUPTS);
 310 #endif
 311 #endif /* CONFIG_CPU == IMX31L */
 312
 313 #else /* CONFIG_CPU == SH7034 */
 314     /* Read file length from header and compare to real file length */
 315     lseek(fd, FIRMWARE_OFFSET_FILE_LENGTH, SEEK_SET);
 316     if(read(fd, &file_length, 4) != 4) {
 317         rolo_error("Error Reading File Length");
 318         return -1;
 319     }
 320     if (length != file_length) {
 321         rolo_error("File length mismatch");
 322         return -1;
 323     }
 324
 325     /* Read and save checksum */
 326     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 327     if (read(fd, &file_checksum, 2) != 2) {
 328         rolo_error("Error Reading checksum");
 329         return -1;
 330     }
 331     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 332
 333     /* verify that file can be read and descrambled */
 334     if ((audiobuf + (2*length)+4) >= audiobufend) {
 335         rolo_error("Not enough room to load file");
 336         return -1;
 337     }
 338
 339     if (read(fd, &audiobuf[length], length) != (int)length) {
 340         rolo_error("Error Reading File");
 341         return -1;
 342     }
 343
 344     lcd_puts(0, 1, "Descramble");
 345     lcd_update();
 346
 347     checksum = descramble(audiobuf + length, audiobuf, length);
 348
 349     /* Verify checksum against file header */
 350     if (checksum != file_checksum) {
 351         rolo_error("Checksum Error");
 352         return -1;
 353     }
 354
 355 #ifdef HAVE_STORAGE_FLUSH
 356     lcd_puts(0, 1, "Flushing      ");
 357     lcd_update();
 358     storage_flush();
 359 #endif
 360
 361     lcd_puts(0, 1, "Executing     ");
 362     lcd_update();
 363
 364     set_irq_level(HIGHEST_IRQ_LEVEL);
 365
 366     /* Calling these 2 initialization routines was necessary to get the
 367        the origional Archos version of the firmware to load and execute. */
 368     system_init();           /* Initialize system for restart */
 369     i2c_init();              /* Init i2c bus - it seems like a good idea */
 370     ICR = IRQ0_EDGE_TRIGGER; /* Make IRQ0 edge triggered */
 371     TSTR = 0xE0;             /* disable all timers */
 372     /* model-specific de-init, needed when flashed */
 373     /* Especially the Archos software is picky about this */
 374 #if defined(ARCHOS_RECORDER) || defined(ARCHOS_RECORDERV2) || \
 375     defined(ARCHOS_FMRECORDER)
 376     PAIOR = 0x0FA0;
 377 #endif
 378 #endif
 379     rolo_restart(audiobuf, ramstart, length);
 380
 381     return 0; /* this is never reached */
 382     (void)checksum; (void)file_checksum;
 383 }
 384 #else  /* !defined(IRIVER_IFP7XX_SERIES) */
 385 int rolo_load(const char* filename)
 386 {
 387     /* dummy */
 388     (void)filename;
 389     return 0;
 390 }
 391
 392 #endif /* !defined(IRIVER_IFP7XX_SERIES) */