firmware/export/tcc780x.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2007 Rob Purchase
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21 #ifndef __TCC780X_H__
  22 #define __TCC780X_H__
  23
  24 #define CACHEALIGN_BITS (5)
  25
  26 #define TTB_SIZE      (0x4000)
  27 /* must be 16Kb (0x4000) aligned */
  28 #define TTB_BASE_ADDR (0x20000000 + (MEMORYSIZE*1024*1024) - TTB_SIZE)
  29 #define TTB_BASE      ((unsigned long *)TTB_BASE_ADDR) /* End of memory */
  30
  31 /* General-purpose IO */
  32
  33 #define PORTCFG0    (*(volatile unsigned long *)0xF005A000)
  34 #define PORTCFG1    (*(volatile unsigned long *)0xF005A004)
  35 #define PORTCFG2    (*(volatile unsigned long *)0xF005A008)
  36 #define PORTCFG3    (*(volatile unsigned long *)0xF005A00C)
  37
  38 #define GPIOA       (*(volatile unsigned long *)0xF005A020)
  39 #define GPIOB       (*(volatile unsigned long *)0xF005A040)
  40 #define GPIOC       (*(volatile unsigned long *)0xF005A060)
  41 #define GPIOD       (*(volatile unsigned long *)0xF005A080)
  42 #define GPIOE       (*(volatile unsigned long *)0xF005A0A0)
  43
  44 #define GPIOA_DIR   (*(volatile unsigned long *)0xF005A024)
  45 #define GPIOB_DIR   (*(volatile unsigned long *)0xF005A044)
  46 #define GPIOC_DIR   (*(volatile unsigned long *)0xF005A064)
  47 #define GPIOD_DIR   (*(volatile unsigned long *)0xF005A084)
  48 #define GPIOE_DIR   (*(volatile unsigned long *)0xF005A0A4)
  49
  50 #define GPIOA_SET   (*(volatile unsigned long *)0xF005A028)
  51 #define GPIOB_SET   (*(volatile unsigned long *)0xF005A048)
  52 #define GPIOC_SET   (*(volatile unsigned long *)0xF005A068)
  53 #define GPIOD_SET   (*(volatile unsigned long *)0xF005A088)
  54 #define GPIOE_SET   (*(volatile unsigned long *)0xF005A0A8)
  55
  56 #define GPIOA_CLEAR (*(volatile unsigned long *)0xF005A02C)
  57 #define GPIOB_CLEAR (*(volatile unsigned long *)0xF005A04C)
  58 #define GPIOC_CLEAR (*(volatile unsigned long *)0xF005A06C)
  59 #define GPIOD_CLEAR (*(volatile unsigned long *)0xF005A08C)
  60 #define GPIOE_CLEAR (*(volatile unsigned long *)0xF005A0AC)
  61
  62 /* Clock Generator */
  63
  64 #define CLKCTRL    (*(volatile unsigned long *)0xF3000000)
  65 #define PLL0CFG    (*(volatile unsigned long *)0xF3000004)
  66 #define PLL1CFG    (*(volatile unsigned long *)0xF3000008)
  67 #define CLKDIVC    (*(volatile unsigned long *)0xF300000C)
  68 #define CLKDIVC1   (*(volatile unsigned long *)0xF3000010)
  69 #define MODECTR    (*(volatile unsigned long *)0xF3000014)
  70 #define BCLKCTR    (*(volatile unsigned long *)0xF3000018)
  71 #define SWRESET    (*(volatile unsigned long *)0xF300001C)
  72 #define PCLKCFG0   (*(volatile unsigned long *)0xF3000020)
  73 #define PCLK_SDMMC (*(volatile unsigned long *)0xF3000024)
  74 #define PCLKCFG2   (*(volatile unsigned long *)0xF3000028)
  75 #define PCLKCFG3   (*(volatile unsigned long *)0xF300002C)
  76 #define PCLK_LCD   (*(volatile unsigned long *)0xF3000030)
  77 #define PCLKCFG5   (*(volatile unsigned long *)0xF3000034)
  78 #define PCLKCFG6   (*(volatile unsigned long *)0xF3000038)
  79 #define PCLKCFG7   (*(volatile unsigned long *)0xF300003C)
  80 #define PCLKCFG8   (*(volatile unsigned long *)0xF3000040)
  81 #define PCLK_TCT   (*(volatile unsigned long *)0xF3000044)
  82 #define PCLKCFG10  (*(volatile unsigned long *)0xF3000048)
  83 #define PCLKCFG11  (*(volatile unsigned long *)0xF300004C)
  84 #define PCLK_ADC   (*(volatile unsigned long *)0xF3000050)
  85 #define PCLK_DAI   (*(volatile unsigned long *)0xF3000054)
  86 #define PCLKCFG14  (*(volatile unsigned long *)0xF3000058)
  87 #define PCLK_RFREQ (*(volatile unsigned long *)0xF300005C)
  88 #define PCLKCFG16  (*(volatile unsigned long *)0xF3000060)
  89 #define PCLKCFG17  (*(volatile unsigned long *)0xF3000064)
  90
  91 #define PCK_EN (1<<28)
  92
  93 #define CKSEL_PLL0 0
  94 #define CKSEL_PLL1 1
  95 #define CKSEL_XIN  4
  96
  97 /* Device bits for SWRESET & BCLKCTR */
  98
  99 #define DEV_USBD  (1<<1)
 100 #define DEV_LCDC  (1<<2)
 101 #define DEV_SDMMC (1<<6)
 102 #define DEV_NAND  (1<<9)
 103 #define DEV_DAI   (1<<14)
 104 #define DEV_ECC   (1<<16)
 105 #define DEV_RTC   (1<<21)
 106 #define DEV_SDRAM (1<<22)
 107 #define DEV_COP   (1<<23)
 108 #define DEV_ADC   (1<<24)
 109 #define DEV_TIMER (1<<26)
 110 #define DEV_CPU   (1<<27)
 111 #define DEV_IRQ   (1<<28)
 112 #define DEV_MAIN  (1<<31)
 113
 114 /* IRQ Controller */
 115
 116 #define IEN     (*(volatile unsigned long *)0xF3001000)
 117 #define CREQ    (*(volatile unsigned long *)0xF3001004)
 118 #define IRQSEL  (*(volatile unsigned long *)0xF300100C)
 119 #define MREQ    (*(volatile unsigned long *)0xF3001014)
 120 #define POL     (*(volatile unsigned long *)0xF300101C)
 121 #define MIRQ    (*(volatile unsigned long *)0xF3001028)
 122 #define MFIQ    (*(volatile unsigned long *)0xF300102C)
 123 #define TMODE   (*(volatile unsigned long *)0xF3001030)
 124 #define TMODEA  (*(volatile unsigned long *)0xF300103C)
 125 #define ALLMASK (*(volatile unsigned long *)0xF3001044)
 126 #define VAIRQ   (*(volatile unsigned long *)0xF3001080)
 127 #define VAFIQ   (*(volatile unsigned long *)0xF3001084)
 128 #define VNIRQ   (*(volatile unsigned long *)0xF3001088)
 129 #define VNFIQ   (*(volatile unsigned long *)0xF300108C)
 130 #define VCTRL   (*(volatile unsigned long *)0xF3001090)
 131
 132 #define IRQ_PRIORITY_TABLE ((volatile unsigned int *)0xF30010A0)
 133
 134 #define EXT0_IRQ_MASK   (1<<0)
 135 #define EXT3_IRQ_MASK   (1<<3)
 136 #define TIMER0_IRQ_MASK (1<<6)
 137 #define DAI_RX_IRQ_MASK (1<<14)
 138 #define DAI_TX_IRQ_MASK (1<<15)
 139 #define USBD_IRQ_MASK   (1<<21)
 140 #define ADC_IRQ_MASK    (1<<30)
 141
 142 /* Timer / Counters */
 143
 144 /* Note: Timers 0-3 have a 16 bit counter, 4-5 have 20 bits */
 145 #define TCFG(_x_) (*(volatile unsigned int *)(0xF3003000+0x10*(_x_)))
 146 #define TCNT(_x_) (*(volatile unsigned int *)(0xF3003004+0x10*(_x_)))
 147 #define TREF(_x_) (*(volatile unsigned int *)(0xF3003008+0x10*(_x_)))
 148
 149 #define TIREQ     (*(volatile unsigned long *)0xF3003060)
 150
 151 /* TCFG flags */
 152 #define TCFG_EN    (1<<0)   /* enable timer */
 153 #define TCFG_CONT  (1<<1)   /* continue from zero once TREF is reached */
 154 #define TCFG_PWM   (1<<2)   /* PWM mode */
 155 #define TCFG_IEN   (1<<3)   /* IRQ enable */
 156 #define TCFG_SEL   (1<<4)   /* clock source & divider */
 157 #define TCFG_POL   (1<<7)   /* polarity */
 158 #define TCFG_CLEAR (1<<8)   /* reset TCNT to zero */
 159 #define TCFG_STOP  (1<<9)   /* stop counting once TREF reached */
 160
 161 /* TIREQ flags */
 162 #define TIREQ_TI0  (1<<0)   /* Timer N IRQ flag */
 163 #define TIREQ_TI1  (1<<1)
 164 #define TIREQ_TI2  (1<<2)
 165 #define TIREQ_TI3  (1<<3)
 166 #define TIREQ_TI4  (1<<4)
 167 #define TIREQ_TI5  (1<<5)
 168
 169 #define TIREQ_TF0  (1<<8)   /* Timer N reference value reached */
 170 #define TIREQ_TF1  (1<<9)
 171 #define TIREQ_TF2  (1<<10)
 172 #define TIREQ_TF3  (1<<11)
 173 #define TIREQ_TF4  (1<<12)
 174 #define TIREQ_TF5  (1<<13)
 175
 176 #define TC32EN     (*(volatile unsigned long *)0xF3003080)
 177 #define TC32LDV    (*(volatile unsigned long *)0xF3003084)
 178 #define TC32MCNT   (*(volatile unsigned long *)0xF3003094)
 179 #define TC32IRQ    (*(volatile unsigned long *)0xF3003098)
 180
 181 /* ADC */
 182
 183 #define ADCCON     (*(volatile unsigned long *)0xF3004000)
 184 #define ADCDATA    (*(volatile unsigned long *)0xF3004004)
 185 #define ADCCONA    (*(volatile unsigned long *)0xF3004080)
 186 #define ADCSTATUS  (*(volatile unsigned long *)0xF3004084)
 187 #define ADCCFG     (*(volatile unsigned long *)0xF3004088)
 188
 189 /* Memory Controller */
 190
 191 #define SDCFG      (*(volatile unsigned long *)0xF1000000)
 192 #define SDFSM      (*(volatile unsigned long *)0xF1000004)
 193 #define MCFG       (*(volatile unsigned long *)0xF1000008)
 194 #define CSCFG0     (*(volatile unsigned long *)0xF1000010)
 195 #define CSCFG1     (*(volatile unsigned long *)0xF1000014)
 196 #define CSCFG2     (*(volatile unsigned long *)0xF1000018)
 197 #define CSCFG3     (*(volatile unsigned long *)0xF100001C)
 198 #define CLKCFG     (*(volatile unsigned long *)0xF1000020)
 199 #define SDCMD      (*(volatile unsigned long *)0xF1000024)
 200
 201 #define SDCFG1     (*(volatile unsigned long *)0xF1001000)
 202 #define MCFG1      (*(volatile unsigned long *)0xF1001008)
 203
 204 /* DAI */
 205
 206 #define DADO_L0     (*(volatile unsigned long *)0xF0059020)
 207 #define DADO_R0     (*(volatile unsigned long *)0xF0059024)
 208 #define DADO_L1     (*(volatile unsigned long *)0xF0059028)
 209 #define DADO_R1     (*(volatile unsigned long *)0xF005902c)
 210 #define DADO_L2     (*(volatile unsigned long *)0xF0059030)
 211 #define DADO_R2     (*(volatile unsigned long *)0xF0059034)
 212 #define DADO_L3     (*(volatile unsigned long *)0xF0059038)
 213 #define DADO_R3     (*(volatile unsigned long *)0xF005903c)
 214 #define DADO_L(_x_) (*(volatile unsigned int *)(0xF0059020+8*(_x_)))
 215 #define DADO_R(_x_) (*(volatile unsigned int *)(0xF0059024+8*(_x_)))
 216 #define DAMR        (*(volatile unsigned long *)0xF0059040)
 217 #define DAVC        (*(volatile unsigned long *)0xF0059044)
 218
 219 /* Misc */
 220
 221 #define ECFG0      (*(volatile unsigned long *)0xF300500C)
 222 #define MBCFG      (*(volatile unsigned long *)0xF3005020)
 223
 224 #define TCC780_VER (*(volatile unsigned long *)0xE0001FFC)
 225
 226 /* NAND Flash Controller */
 227
 228 #define NFC_CMD    (*(volatile unsigned long *)0xF0053000)
 229 #define NFC_SADDR  (*(volatile unsigned long *)0xF005300C)
 230 #define NFC_SDATA  (*(volatile unsigned long *)0xF0053040)
 231 #define NFC_WDATA  (*(volatile unsigned long *)0xF0053010)
 232 #define NFC_CTRL   (*(volatile unsigned long *)0xF0053050)
 233     #define NFC_16BIT (1<<26)
 234     #define NFC_CS0   (1<<23)
 235     #define NFC_CS1   (1<<22)
 236     #define NFC_READY (1<<20)
 237 #define NFC_IREQ   (*(volatile unsigned long *)0xF0053060)
 238 #define NFC_RST    (*(volatile unsigned long *)0xF0053064)
 239
 240 /* ECC Controller */
 241
 242 #define ECC_CTRL       (*(volatile unsigned long *)0xF005B000)
 243     #define ECC_ENC       (1<<27)
 244     #define ECC_READY     (1<<26)
 245     #define ECC_M4EN      (1<<6)
 246 #define ECC_BASE       (*(volatile unsigned long *)0xF005B004)
 247 #define ECC_CLR        (*(volatile unsigned long *)0xF005B00C)
 248 #define MLC_ECC0W      (*(volatile unsigned long *)0xF005B030)
 249 #define MLC_ECC1W      (*(volatile unsigned long *)0xF005B034)
 250 #define MLC_ECC2W      (*(volatile unsigned long *)0xF005B038)
 251 #define ECC_ERRADDR(x) (*(volatile unsigned long *)(0xF005B050+4*(x)))
 252 #define ECC_ERRDATA(x) (*(volatile unsigned long *)(0xF005B060+4*(x)))
 253 #define ECC_ERR_NUM    (*(volatile unsigned long *)0xF005B070)
 254
 255 /* SD/MMC Controller */
 256
 257 #define SDICLK      (*(volatile unsigned long *)0xF0058004)
 258 #define SDIARGU     (*(volatile unsigned long *)0xF0058008)
 259 #define SDICMD      (*(volatile unsigned long *)0xF005800C)
 260 #define SDIRSPCMD   (*(volatile unsigned long *)0xF0058010)
 261 #define SDIRSPARGU0 (*(volatile unsigned long *)0xF0058014)
 262 #define SDIRSPARGU1 (*(volatile unsigned long *)0xF0058018)
 263 #define SDIRSPARGU2 (*(volatile unsigned long *)0xF005801C)
 264 #define SDIRSPARGU3 (*(volatile unsigned long *)0xF0058020)
 265 #define SDIDTIMER   (*(volatile unsigned long *)0xF0058024)
 266 #define SDIDCTRL2   (*(volatile unsigned long *)0xF0058028)
 267 #define SDIDCTRL    (*(volatile unsigned long *)0xF005802C)
 268 #define SDISTATUS   (*(volatile unsigned long *)0xF0058030)
 269 #define SDIIFLAG    (*(volatile unsigned long *)0xF0058034)
 270 #define SDIWDATA    (*(volatile unsigned long *)0xF0058038)
 271 #define SDIRDATA    (*(volatile unsigned long *)0xF005803C)
 272 #define SDIIENABLE  (*(volatile unsigned long *)0xF0058040)
 273
 274 #define SDICMD_RES_TYPE1  1
 275 #define SDICMD_RES_TYPE1b 2
 276 #define SDICMD_RES_TYPE2  3
 277 #define SDICMD_RES_TYPE3  4
 278 #define SDICMD_RES_TYPE4  5
 279 #define SDICMD_RES_TYPE5  6
 280 #define SDICMD_RES_TYPE6  7
 281
 282 #define SDISTATUS_RESP_RCVD      (1<<7)
 283 #define SDISTATUS_FIFO_LOAD_REQ  (1<<17)
 284 #define SDISTATUS_FIFO_FETCH_REQ (1<<18)
 285 #define SDISTATUS_CMD_PATH_RDY   (1<<21)
 286 #define SDISTATUS_MULTIBLOCK_END (1<<25)
 287
 288 /* USB 2.0 device system MMR base address */
 289 #define USB_BASE 0xf0010000
 290
 291 #define USB_NUM_ENDPOINTS 3
 292 #define USB_DEVBSS_ATTR   IBSS_ATTR
 293
 294 /* Timer frequency */
 295 /* Timer is based on PCK_TCT (set to 2Mhz in system.c) */
 296 #define TIMER_FREQ (2000000)
 297
 298 #endif