firmware/target/arm/s3c2440/gigabeat-fx/system-target.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2007 by Greg White
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21 #ifndef SYSTEM_TARGET_H
  22 #define SYSTEM_TARGET_H
  23
  24 #include "system-arm.h"
  25 #include "mmu-arm.h"
  26
  27 #define CPUFREQ_DEFAULT 98784000
  28 #define CPUFREQ_NORMAL  98784000
  29 #define CPUFREQ_MAX    296352000
  30
  31 /* Functions to set and clear regiser bits atomically */
  32
  33 /* Set and clear register bits */
  34 void s3c_regmod32(volatile unsigned long *reg, unsigned long bits,
  35                   unsigned long mask);
  36 /* Set register bits */
  37 void s3c_regset32(volatile unsigned long *reg, unsigned long bits);
  38 /* Clear register bits */
  39 void s3c_regclr32(volatile unsigned long *reg, unsigned long bits);
  40
  41 #define HAVE_INVALIDATE_ICACHE
  42 static inline void invalidate_icache(void)
  43 {
  44     clean_dcache();
  45     asm volatile(
  46         "mov r0, #0 \n"
  47         "mcr p15, 0, r0, c7, c5, 0 \n"
  48         : : : "r0"
  49     );
  50 }
  51
  52 #endif /* SYSTEM_TARGET_H */