1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright © 2010 Tobias Diedrich
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
26 #include "clock-target.h"
31 /*#define LOGF_ENABLE*/
37 #if defined(USE_ROCKBOX_USB)
39 #include "usb-drv-as3525.h"
41 static struct usb_endpoint endpoints
[USB_NUM_EPS
][2];
44 * dma/setup descriptors and buffers should avoid sharing
45 * a cacheline with other data.
46 * dmadescs may share with each other, since we only access them uncached.
48 static struct usb_dev_dma_desc dmadescs
[USB_NUM_EPS
][2] __attribute__((aligned(32)));
49 /* reuse unused EP2 OUT descriptor here */
50 static struct usb_dev_setup_buf
*setup_desc
= (void*)&dmadescs
[2][1];
52 #if AS3525_MCLK_SEL != AS3525_CLK_PLLB
53 static inline void usb_enable_pll(void)
55 CGU_COUNTB
= CGU_LOCK_CNT
;
56 CGU_PLLB
= AS3525_PLLB_SETTING
;
57 CGU_PLLBSUP
= 0; /* enable PLLB */
58 while(!(CGU_INTCTRL
& CGU_PLLB_LOCK
)); /* wait until PLLB is locked */
61 static inline void usb_disable_pll(void)
63 CGU_PLLBSUP
= CGU_PLL_POWERDOWN
;
66 static inline void usb_enable_pll(void)
70 static inline void usb_disable_pll(void)
73 #endif /* AS3525_MCLK_SEL != AS3525_CLK_PLLB */
80 /* delay is in milliseconds */
81 static inline void usb_delay(int delay
)
86 static void usb_phy_on(void)
89 CGU_USB
= 1<<5 /* enable */
90 | (CLK_DIV(AS3525_PLLB_FREQ
, 48000000) / 2) << 2
91 | 2; /* source = PLLB */
94 ascodec_write(AS3515_USB_UTIL
, ascodec_read(AS3515_USB_UTIL
) | (1<<4));
98 CCU_SRC
= CCU_SRC_USB_AHB_EN
|CCU_SRC_USB_PHY_EN
;
99 CCU_SRL
= CCU_SRL_MAGIC_NUMBER
;
101 CCU_SRC
= CCU_SRC_USB_AHB_EN
;
103 CCU_SRC
= CCU_SRL
= 0;
105 USB_GPIO_CSR
= USB_GPIO_TX_ENABLE_N
106 | USB_GPIO_TX_BIT_STUFF_EN
108 | USB_GPIO_CLK_SEL10
; /* 0x06180000; */
111 static void usb_phy_suspend(void)
113 USB_GPIO_CSR
|= USB_GPIO_ASESSVLD_EXT
|
114 USB_GPIO_BSESSVLD_EXT
|
115 USB_GPIO_VBUS_VLD_EXT
;
117 USB_GPIO_CSR
|= USB_GPIO_VBUS_VLD_EXT_SEL
;
121 static void usb_phy_resume(void)
123 USB_GPIO_CSR
&= ~(USB_GPIO_ASESSVLD_EXT
|
124 USB_GPIO_BSESSVLD_EXT
|
125 USB_GPIO_VBUS_VLD_EXT
);
127 USB_GPIO_CSR
&= ~USB_GPIO_VBUS_VLD_EXT_SEL
;
131 static void setup_desc_init(struct usb_dev_setup_buf
*desc
)
133 struct usb_dev_setup_buf
*uc_desc
= AS3525_UNCACHED_ADDR(desc
);
135 uc_desc
->status
= USB_DMA_DESC_BS_HST_RDY
;
136 uc_desc
->resv
= 0xffffffff;
137 uc_desc
->data1
= 0xffffffff;
138 uc_desc
->data2
= 0xffffffff;
141 static void dma_desc_init(int ep
, int dir
)
143 struct usb_dev_dma_desc
*desc
= &dmadescs
[ep
][dir
];
144 struct usb_dev_dma_desc
*uc_desc
= AS3525_UNCACHED_ADDR(desc
);
146 endpoints
[ep
][dir
].uc_desc
= uc_desc
;
148 uc_desc
->status
= USB_DMA_DESC_BS_DMA_DONE
| \
149 USB_DMA_DESC_LAST
| \
150 USB_DMA_DESC_ZERO_LEN
;
151 uc_desc
->resv
= 0xffffffff;
152 uc_desc
->data_ptr
= 0;
153 uc_desc
->next_desc
= 0;
156 static void reset_endpoints(int init
)
159 int mps
= i
== 0 ? 64 : (usb_drv_port_speed() ? 512 : 64);
162 * OUT EP 2 is an alias for OUT EP 0 on this HW!
164 * Resonates with "3 bidirectional- plus 1 in-endpoints in device mode"
165 * from the datasheet, but why ep2 and not ep3?
167 * Reserve it here so we will skip over it in request_endpoint().
169 endpoints
[2][1].state
|= EP_STATE_ALLOCATED
;
171 for(i
= 0; i
< USB_NUM_EPS
; i
++) {
173 endpoints
[i
][0].state
= 0;
174 wakeup_init(&endpoints
[i
][0].complete
);
176 if (i
!= 2) { /* Skip the OUT EP0 alias */
177 endpoints
[i
][1].state
= 0;
178 wakeup_init(&endpoints
[i
][1].complete
);
179 USB_OEP_SUP_PTR(i
) = 0;
184 USB_IEP_CTRL (i
) = USB_EP_CTRL_FLUSH
|USB_EP_CTRL_SNAK
;
185 USB_IEP_MPS (i
) = mps
; /* in bytes */
186 /* We don't care about the 'IN token received' event */
187 USB_IEP_STS_MASK(i
) = USB_EP_STAT_IN
; /* OF: 0x840 */
188 USB_IEP_TXFSIZE (i
) = mps
/2; /* in dwords => mps*2 bytes */
189 USB_IEP_STS (i
) = 0xffffffff; /* clear status */
190 USB_IEP_DESC_PTR(i
) = 0;
192 if (i
!= 2) { /* Skip the OUT EP0 alias */
194 USB_OEP_CTRL (i
) = USB_EP_CTRL_FLUSH
|USB_EP_CTRL_SNAK
;
195 USB_OEP_MPS (i
) = (mps
/2 << 23) | mps
;
196 USB_OEP_STS_MASK(i
) = 0x0000; /* OF: 0x1800 */
197 USB_OEP_RXFR (i
) = 0; /* Always 0 in OF trace? */
198 USB_OEP_STS (i
) = 0xffffffff; /* clear status */
199 USB_OEP_DESC_PTR(i
) = 0;
203 setup_desc_init(setup_desc
);
204 USB_OEP_SUP_PTR(0) = (int)setup_desc
;
207 void usb_drv_init(void)
209 logf("usb_drv_init() !!!!\n");
213 /* length regulator: normal operation */
214 ascodec_write(AS3514_CVDD_DCDC3
, ascodec_read(AS3514_CVDD_DCDC3
) | 1<<2);
217 CGU_PERI
|= CGU_USB_CLOCK_ENABLE
;
220 CCU_SRC
= CCU_SRC_USB_AHB_EN
;
221 CCU_SRL
= CCU_SRL_MAGIC_NUMBER
;
223 CCU_SRC
= CCU_SRL
= 0;
225 USB_GPIO_CSR
= USB_GPIO_TX_ENABLE_N
226 | USB_GPIO_TX_BIT_STUFF_EN
228 | USB_GPIO_CLK_SEL10
; /* 0x06180000; */
230 /* bug workaround according to linux patch */
231 USB_DEV_CFG
= (USB_DEV_CFG
& ~3) | 1; /* full speed */
233 /* enable soft disconnect */
234 USB_DEV_CTRL
|= USB_DEV_CTRL_SOFT_DISCONN
;
238 USB_DEV_CTRL
|= USB_DEV_CTRL_SOFT_DISCONN
;
240 /* We don't care about SVC or SOF events */
241 /* Right now we don't handle suspend, so mask those too */
242 USB_DEV_INTR_MASK
= USB_DEV_INTR_SVC
|
244 USB_DEV_INTR_USB_SUSPEND
|
245 USB_DEV_INTR_EARLY_SUSPEND
;
247 USB_DEV_CFG
= USB_DEV_CFG_STAT_ACK
|
248 USB_DEV_CFG_UNI_DIR
|
249 USB_DEV_CFG_PI_16BIT
|
251 USB_DEV_CFG_SELF_POWERED
|
252 USB_DEV_CFG_CSR_PRG
|
253 USB_DEV_CFG_PHY_ERR_DETECT
;
255 USB_DEV_CTRL
= USB_DEV_CTRL_BLEN_1DWORD
|
256 USB_DEV_CTRL_DESC_UPDATE
|
257 USB_DEV_CTRL_THRES_ENABLE
|
261 USB_DEV_EP_INTR_MASK
&= ~((1<<0) | (1<<16)); /* ep 0 */
265 /* clear pending interrupts */
266 USB_DEV_EP_INTR
= 0xffffffff;
267 USB_DEV_INTR
= 0xffffffff;
269 VIC_INT_ENABLE
= INTERRUPT_USB
;
272 USB_DEV_CTRL
&= ~USB_DEV_CTRL_SOFT_DISCONN
;
274 USB_GPIO_CSR
= USB_GPIO_TX_ENABLE_N
275 | USB_GPIO_TX_BIT_STUFF_EN
278 | USB_GPIO_CLK_SEL10
; /* 0x06180000; */
282 void usb_drv_exit(void)
284 USB_DEV_CTRL
|= (1<<10); /* soft disconnect */
286 * mask all interrupts _before_ writing to VIC_INT_EN_CLEAR,
287 * or else the core might latch the interrupt while
288 * the write ot VIC_INT_EN_CLEAR is in the pipeline and
289 * so cause a fake spurious interrupt.
291 USB_DEV_EP_INTR_MASK
= 0xffffffff;
292 USB_DEV_INTR_MASK
= 0xffffffff;
293 VIC_INT_EN_CLEAR
= INTERRUPT_USB
;
295 CGU_PERI
&= ~CGU_USB_CLOCK_ENABLE
;
296 /* Disable UVDD generating LDO */
297 ascodec_write(AS3515_USB_UTIL
, ascodec_read(AS3515_USB_UTIL
) & ~(1<<4));
299 logf("usb_drv_exit() !!!!\n");
302 int usb_drv_port_speed(void)
304 return (USB_DEV_STS
& USB_DEV_STS_MASK_SPD
) ? 0 : 1;
307 int usb_drv_request_endpoint(int type
, int dir
)
309 int d
= dir
== USB_DIR_IN
? 0 : 1;
310 int i
= 1; /* skip the control EP */
312 for(; i
< USB_NUM_EPS
; i
++) {
313 if (endpoints
[i
][d
].state
& EP_STATE_ALLOCATED
)
316 endpoints
[i
][d
].state
|= EP_STATE_ALLOCATED
;
318 if (dir
== USB_DIR_IN
) {
319 USB_IEP_CTRL(i
) = USB_EP_CTRL_FLUSH
|
323 USB_DEV_EP_INTR_MASK
&= ~(1<<i
);
325 USB_OEP_CTRL(i
) = USB_EP_CTRL_FLUSH
|
329 USB_DEV_EP_INTR_MASK
&= ~(1<<(16+i
));
331 /* logf("usb_drv_request_endpoint(%d, %d): returning %02x\n", type, dir, i | dir); */
335 logf("usb_drv_request_endpoint(%d, %d): no free endpoint found\n", type
, dir
);
339 void usb_drv_release_endpoint(int ep
)
342 int d
= ep
& USB_DIR_IN
? 0 : 1;
344 if (i
>= USB_NUM_EPS
)
347 * Check for control EP and ignore it.
348 * Unfortunately the usb core calls
349 * usb_drv_release_endpoint() for ep=0..(USB_NUM_ENDPOINTS-1),
350 * but doesn't request a new control EP after that...
352 if (i
== 0 || /* Don't mask control EP */
353 (i
== 2 && d
== 1)) /* See reset_endpoints(), EP2_OUT == EP0_OUT */
356 if (!(endpoints
[i
][d
].state
& EP_STATE_ALLOCATED
))
359 /* logf("usb_drv_release_endpoint(%d, %d)\n", i, d); */
360 endpoints
[i
][d
].state
= 0;
361 USB_DEV_EP_INTR_MASK
|= (1<<(16*d
+i
));
362 USB_EP_CTRL(i
, !d
) = USB_EP_CTRL_FLUSH
| USB_EP_CTRL_SNAK
;
365 void usb_drv_cancel_all_transfers(void)
367 logf("usb_drv_cancel_all_transfers()\n");
370 int flags
= disable_irq_save();
375 int usb_drv_recv(int ep
, void *ptr
, int len
)
377 struct usb_dev_dma_desc
*uc_desc
= endpoints
[ep
][1].uc_desc
;
380 logf("usb_drv_recv(%d,%x,%d)\n", ep
, (int)ptr
, len
);
383 logf("addr %08x not aligned!\n", (int)ptr
);
386 endpoints
[ep
][1].state
|= EP_STATE_BUSY
;
387 endpoints
[ep
][1].len
= len
;
388 endpoints
[ep
][1].rc
= -1;
390 /* remove data buffer from cache */
391 dump_dcache_range(ptr
, len
);
394 uc_desc
->status
= USB_DMA_DESC_BS_HST_RDY
|
398 uc_desc
->status
|= USB_DMA_DESC_ZERO_LEN
;
399 uc_desc
->data_ptr
= 0;
401 uc_desc
->data_ptr
= ptr
;
403 USB_OEP_DESC_PTR(ep
) = (int)&dmadescs
[ep
][1];
404 USB_OEP_STS(ep
) = USB_EP_STAT_OUT_RCVD
; /* clear status */
405 USB_OEP_CTRL(ep
) |= USB_EP_CTRL_CNAK
;
410 #if defined(LOGF_ENABLE)
411 static char hexbuf
[1025];
412 static char hextab
[16] = "0123456789abcdef";
414 char *make_hex(char *data
, int len
)
417 if (!((int)data
& 0x40000000))
418 data
= AS3525_UNCACHED_ADDR(data
); /* don't pollute the cache */
423 for (i
=0; i
<len
; i
++) {
424 hexbuf
[2*i
] = hextab
[(unsigned char)data
[i
] >> 4 ];
425 hexbuf
[2*i
+1] = hextab
[(unsigned char)data
[i
] & 0xf];
433 void ep_send(int ep
, void *ptr
, int len
)
435 struct usb_dev_dma_desc
*uc_desc
= endpoints
[ep
][0].uc_desc
;
437 endpoints
[ep
][0].state
|= EP_STATE_BUSY
;
438 endpoints
[ep
][0].len
= len
;
439 endpoints
[ep
][0].rc
= -1;
441 /* Make sure data is committed to memory */
442 clean_dcache_range(ptr
, len
);
444 logf("xx%s\n", make_hex(ptr
, len
));
446 uc_desc
->status
= USB_DMA_DESC_BS_HST_RDY
|
450 uc_desc
->status
|= USB_DMA_DESC_ZERO_LEN
;
452 uc_desc
->data_ptr
= ptr
;
454 USB_IEP_DESC_PTR(ep
) = (int)&dmadescs
[ep
][0];
455 USB_IEP_STS(ep
) = 0xffffffff; /* clear status */
457 USB_IEP_CTRL(ep
) |= USB_EP_CTRL_CNAK
| USB_EP_CTRL_PD
;
458 /* HW automatically sets NAK bit later */
461 int usb_drv_send(int ep
, void *ptr
, int len
)
463 logf("usb_drv_send(%d,%x,%d): ", ep
, (int)ptr
, len
);
466 ep_send(ep
, ptr
, len
);
467 while (endpoints
[ep
][0].state
& EP_STATE_BUSY
)
468 wakeup_wait(&endpoints
[ep
][0].complete
, TIMEOUT_BLOCK
);
470 return endpoints
[ep
][0].rc
;
473 int usb_drv_send_nonblocking(int ep
, void *ptr
, int len
)
475 logf("usb_drv_send_nonblocking(%d,%x,%d): ", ep
, (int)ptr
, len
);
477 endpoints
[ep
][0].state
|= EP_STATE_ASYNC
;
478 ep_send(ep
, ptr
, len
);
482 static void handle_in_ep(int ep
)
484 int ep_sts
= USB_IEP_STS(ep
) & ~USB_IEP_STS_MASK(ep
);
487 panicf("in_ep > 3?!");
489 USB_IEP_STS(ep
) = ep_sts
; /* ack */
491 if (ep_sts
& USB_EP_STAT_BNA
) { /* Buffer was not set up */
492 logf("ep%d IN, status %x (BNA)\n", ep
, ep_sts
);
493 panicf("ep%d IN 0x%x (BNA)", ep
, ep_sts
);
496 if (ep_sts
& USB_EP_STAT_TDC
) {
497 endpoints
[ep
][0].state
&= ~EP_STATE_BUSY
;
498 endpoints
[ep
][0].rc
= 0;
499 logf("EP%d %x %stx done len %x stat %08x\n",
500 ep
, ep_sts
, endpoints
[ep
][0].state
& EP_STATE_ASYNC
? "async " :"",
501 endpoints
[ep
][0].len
,
502 endpoints
[ep
][0].uc_desc
->status
);
503 if (endpoints
[ep
][0].state
& EP_STATE_ASYNC
) {
504 endpoints
[ep
][0].state
&= ~EP_STATE_ASYNC
;
505 usb_core_transfer_complete(ep
, USB_DIR_IN
, 0, endpoints
[ep
][0].len
);
507 wakeup_signal(&endpoints
[ep
][0].complete
);
509 ep_sts
&= ~USB_EP_STAT_TDC
;
513 logf("ep%d IN, hwstat %lx, epstat %x\n", ep
, USB_IEP_STS(ep
), endpoints
[ep
][0].state
);
514 panicf("ep%d IN 0x%x", ep
, ep_sts
);
517 /* HW automatically disables RDE, re-enable it */
518 /* But this an IN ep, I wonder... */
519 USB_DEV_CTRL
|= USB_DEV_CTRL_RDE
;
522 static void handle_out_ep(int ep
)
524 struct usb_ctrlrequest
*req
= (void*)AS3525_UNCACHED_ADDR(&setup_desc
->data1
);
525 int ep_sts
= USB_OEP_STS(ep
) & ~USB_OEP_STS_MASK(ep
);
526 struct usb_dev_dma_desc
*uc_desc
= endpoints
[ep
][1].uc_desc
;
529 panicf("out_ep > 3!?");
531 USB_OEP_STS(ep
) = ep_sts
; /* ACK */
533 if (ep_sts
& USB_EP_STAT_BNA
) { /* Buffer was not set up */
534 logf("ep%d OUT, status %x (BNA)\n", ep
, ep_sts
);
535 panicf("ep%d OUT 0x%x (BNA)", ep
, ep_sts
);
538 if (ep_sts
& USB_EP_STAT_OUT_RCVD
) {
539 int dma_sts
= uc_desc
->status
;
540 int dma_len
= dma_sts
& 0xffff;
542 if (!(dma_sts
& USB_DMA_DESC_ZERO_LEN
)) {
543 logf("EP%d OUT token, st:%08x len:%d frm:%x data=%s epstate=%d\n",
544 ep
, dma_sts
& 0xf8000000, dma_len
, (dma_sts
>> 16) & 0x7ff,
545 make_hex(uc_desc
->data_ptr
, dma_len
), endpoints
[ep
][1].state
);
547 * If parts of the just dmaed range are in cache, dump them now.
549 dump_dcache_range(uc_desc
->data_ptr
, dma_len
);
551 logf("EP%d OUT token, st:%08x frm:%x (no data)\n", ep
,
555 if (endpoints
[ep
][1].state
& EP_STATE_BUSY
) {
556 endpoints
[ep
][1].state
&= ~EP_STATE_BUSY
;
557 endpoints
[ep
][1].rc
= 0;
558 usb_core_transfer_complete(ep
, USB_DIR_OUT
, 0, dma_len
);
560 logf("EP%d OUT, but no one was listening?\n", ep
);
563 USB_OEP_CTRL(ep
) |= USB_EP_CTRL_SNAK
; /* make sure NAK is set */
565 ep_sts
&= ~USB_EP_STAT_OUT_RCVD
;
568 if (ep_sts
& USB_EP_STAT_SETUP_RCVD
) {
569 static struct usb_ctrlrequest req_copy
;
572 logf("t%ld:got SETUP packet: type=%d req=%d val=%d ind=%d len=%d\n",
580 usb_core_control_request(&req_copy
);
581 setup_desc_init(setup_desc
);
583 ep_sts
&= ~USB_EP_STAT_SETUP_RCVD
;
587 logf("ep%d OUT, status %x\n", ep
, ep_sts
);
588 panicf("ep%d OUT 0x%x", ep
, ep_sts
);
591 /* HW automatically disables RDE, re-enable it */
592 /* THEORY: Because we only set up one DMA buffer... */
593 USB_DEV_CTRL
|= USB_DEV_CTRL_RDE
;
596 /* interrupt service routine */
599 int ep
= USB_DEV_EP_INTR
& ~USB_DEV_EP_INTR_MASK
;
600 int intr
= USB_DEV_INTR
& ~USB_DEV_INTR_MASK
;
602 /* ACK interrupt sources */
603 USB_DEV_EP_INTR
= ep
;
606 /* Handle endpoint interrupts */
608 int onebit
= 31-__builtin_clz(ep
);
610 if (onebit
< 16) handle_in_ep(onebit
);
611 else handle_out_ep(onebit
-16);
613 ep
&= ~(1 << onebit
);
616 /* Handle general device interrupts */
618 if (intr
& USB_DEV_INTR_SET_INTERFACE
) {/* SET_INTERFACE received */
619 logf("set interface\n");
620 panicf("set interface");
621 intr
&= ~USB_DEV_INTR_SET_INTERFACE
;
623 if (intr
& USB_DEV_INTR_SET_CONFIG
) {/* SET_CONFIGURATION received */
625 * This is handled in HW, we have to fake a request here
628 static struct usb_ctrlrequest set_config
= {
629 bRequestType
: USB_TYPE_STANDARD
| USB_RECIP_DEVICE
,
630 bRequest
: USB_REQ_SET_CONFIGURATION
,
636 logf("set config\n");
638 set_config
.wValue
= USB_DEV_STS
& USB_DEV_STS_MASK_CFG
;
639 usb_core_control_request(&set_config
);
641 /* Tell the HW we handled the request */
642 USB_DEV_CTRL
|= USB_DEV_CTRL_APCSR_DONE
;
643 intr
&= ~USB_DEV_INTR_SET_CONFIG
;
645 if (intr
& USB_DEV_INTR_EARLY_SUSPEND
) {/* idle >3ms detected */
647 intr
&= ~USB_DEV_INTR_EARLY_SUSPEND
;
649 if (intr
& USB_DEV_INTR_USB_RESET
) {/* usb reset from host? */
652 usb_core_bus_reset();
653 intr
&= ~USB_DEV_INTR_USB_RESET
;
655 if (intr
& USB_DEV_INTR_USB_SUSPEND
) {/* suspend req from host? */
656 logf("usb suspend\n");
657 intr
&= ~USB_DEV_INTR_USB_SUSPEND
;
659 if (intr
& USB_DEV_INTR_SOF
) {/* sof received */
661 intr
&= ~USB_DEV_INTR_SOF
;
663 if (intr
& USB_DEV_INTR_SVC
) {/* device status changed */
664 logf("svc: %08x otg: %08x\n", (int)USB_DEV_STS
, (int)USB_OTG_CSR
);
665 intr
&= ~USB_DEV_INTR_SVC
;
667 if (intr
& USB_DEV_INTR_ENUM_DONE
) {/* speed enumeration complete */
668 int spd
= USB_DEV_STS
& USB_DEV_STS_MASK_SPD
; /* Enumerated Speed */
670 logf("speed enum complete: ");
671 if (spd
== USB_DEV_STS_SPD_HS
) logf("hs\n");
672 if (spd
== USB_DEV_STS_SPD_FS
) logf("fs\n");
673 if (spd
== USB_DEV_STS_SPD_LS
) logf("ls\n");
675 USB_PHY_EP0_INFO
= 0x00200000 |
678 USB_PHY_EP1_INFO
= 0x00200000 |
681 USB_PHY_EP2_INFO
= 0x00200001 |
684 USB_PHY_EP3_INFO
= 0x00200001 |
687 USB_DEV_CTRL
|= USB_DEV_CTRL_APCSR_DONE
;
688 USB_IEP_CTRL(0) |= USB_EP_CTRL_ACT
;
689 USB_OEP_CTRL(0) |= USB_EP_CTRL_ACT
;
690 intr
&= ~USB_DEV_INTR_ENUM_DONE
;
693 panicf("usb devirq 0x%x", intr
);
696 if (!(USB_DEV_CTRL
& USB_DEV_CTRL_RDE
)){
697 logf("re-enabling receive DMA\n");
698 USB_DEV_CTRL
|= USB_DEV_CTRL_RDE
;
703 /* (not essential? , not implemented in usb-tcc.c) */
704 void usb_drv_set_test_mode(int mode
)
709 /* handled internally by controller */
710 void usb_drv_set_address(int address
)
715 void usb_drv_stall(int ep
, bool stall
, bool in
)
717 if (stall
) USB_EP_CTRL(ep
, in
) |= USB_EP_CTRL_STALL
;
718 else USB_EP_CTRL(ep
, in
) &= ~USB_EP_CTRL_STALL
;
721 bool usb_drv_stalled(int ep
, bool in
)
723 return USB_EP_CTRL(ep
, in
) & USB_EP_CTRL_STALL
;
728 void usb_attach(void)
732 void usb_drv_init(void)
736 void usb_drv_exit(void)
740 int usb_drv_port_speed(void)
745 int usb_drv_request_endpoint(int type
, int dir
)
753 void usb_drv_release_endpoint(int ep
)
758 void usb_drv_cancel_all_transfers(void)
762 void usb_drv_set_test_mode(int mode
)
767 void usb_drv_set_address(int address
)
772 int usb_drv_recv(int ep
, void *ptr
, int len
)
781 int usb_drv_send(int ep
, void *ptr
, int len
)
790 int usb_drv_send_nonblocking(int ep
, void *ptr
, int len
)
799 void usb_drv_stall(int ep
, bool stall
, bool in
)
806 bool usb_drv_stalled(int ep
, bool in
)