firmware/target/arm/imx31/spi-imx31.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (c) 2007 Will Robertson
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21 #ifndef SPI_IMX31_H
  22 #define SPI_IMX31_H
  23
  24 #define USE_CSPI1_MODULE (1 << 0)
  25 #define USE_CSPI2_MODULE (1 << 1)
  26 #define USE_CSPI3_MODULE (1 << 2)
  27
  28 /* SPI_MODULE_MASK is set in target's config */
  29 enum spi_module_number
  30 {
  31     __CSPI_NUM_START = -1, /* The first will be 0 */
  32 #if (SPI_MODULE_MASK & USE_CSPI1_MODULE)
  33     CSPI1_NUM,
  34 #endif
  35 #if (SPI_MODULE_MASK & USE_CSPI2_MODULE)
  36     CSPI2_NUM,
  37 #endif
  38 #if (SPI_MODULE_MASK & USE_CSPI3_MODULE)
  39     CSPI3_NUM,
  40 #endif
  41     SPI_NUM_CSPI,
  42 };
  43
  44 struct cspi_map
  45 {
  46     volatile uint32_t rxdata;       /* 00h */
  47     volatile uint32_t txdata;       /* 04h */
  48     volatile uint32_t conreg;       /* 08h */
  49     volatile uint32_t intreg;       /* 0Ch */
  50     volatile uint32_t dmareg;       /* 10h */
  51     volatile uint32_t statreg;      /* 14h */
  52     volatile uint32_t periodreg;    /* 18h */
  53     volatile uint32_t skip1[0x69];  /* 1Ch */
  54     volatile uint32_t testreg;      /* 1C0h */
  55 };
  56
  57 struct spi_node
  58 {
  59     enum spi_module_number num; /* Module number (CSPIx_NUM) */
  60     unsigned long conreg;       /* CSPI conreg setup */
  61     unsigned long periodreg;    /* CSPI periodreg setup */
  62 };
  63
  64 struct spi_transfer_desc;
  65
  66 typedef void (*spi_transfer_cb_fn_type)(struct spi_transfer_desc *);
  67
  68 struct spi_transfer_desc
  69 {
  70     const struct spi_node *node;      /* node for this transfer */
  71     const void *txbuf;                /* buffer to transmit */
  72     void       *rxbuf;                /* buffer to receive */
  73     int         count;                /* number of elements */
  74     spi_transfer_cb_fn_type callback; /* function to call when done */
  75     struct spi_transfer_desc *next;   /* next transfer queued,
  76                                          spi layer sets this */
  77 };
  78
  79 /* NOTE: SPI updates the descrptor during the operation. Do not write
  80  * to it until completion notification is received. If no callback is
  81  * specified, the caller must find a way to ensure integrity.
  82  *
  83  * -1 will be written to 'count' if an error occurs, otherwise it will
  84  * be zero when completed.
  85  */
  86
  87 /* One-time init of SPI driver */
  88 void spi_init(void);
  89
  90 /* Enable the specified module for the node */
  91 void spi_enable_module(const struct spi_node *node);
  92
  93 /* Disabled the specified module for the node */
  94 void spi_disable_module(const struct spi_node *node);
  95
  96 /* Send and/or receive data on the specified node (asychronous) */
  97 bool spi_transfer(struct spi_transfer_desc *xfer);
  98
  99 #endif /* SPI_IMX31_H */