| blob | e7eb4b87f1513fcb10ae9210d49a73f28fee0017 |
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * JPEG assembly IDCT
11 *
12 * Copyright (C) 2009 Andrew Mahone asm versions of the C IDCT algorithms used
13 * jpeg_load.c with
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version 2
18 * of the License, or (at your option) any later version.
19 *
20 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
21 * KIND, either express or implied.
22 *
23 ****************************************************************************/
24 #include "config.h"
25 #include "apps/core_asmdefs.h"
27 .section .text
28 .align 2
29 .global jpeg_idct1h
30 .type jpeg_idct1h, %function
31 .global jpeg_idct2v
32 .type jpeg_idct2v, %function
33 .global jpeg_idct2h
34 .type jpeg_idct2h, %function
35 .global jpeg_idct4v
36 .type jpeg_idct4v, %function
37 .global jpeg_idct4h
38 .type jpeg_idct4h, %function
39 .global jpeg_idct8v
40 .type jpeg_idct8v, %function
41 .global jpeg_idct8h
42 .type jpeg_idct8h, %function
44 jpeg_idct1h:
45 /* In the common case of one pass through the loop, the extra add should be
46 cheaper than saving registers to stack and loading a the value 4112. */
47 1:
48 ldrsh r12, [r0]
49 add r12, r12, #4096
50 add r12, r12, #16
51 #if ARM_ARCH < 6
52 mov r12, r12, asr #5
53 cmp r12, #255
54 mvnhi r12, r12, asr #31
55 #else
56 usat r12, #8, r12, asr #5
57 #endif
58 strb r12, [r1]
59 add r0, r0, #16
60 add r1, r1, r3
61 cmp r0, r2
62 bcc 1b
63 bx lr
64 .size jpeg_idct1h, .-jpeg_idct1h
66 jpeg_idct2v:
67 #if ARM_ARCH < 6
68 /* Use SWAR tricks to fake partitioned add and subtract. This is slightly faster
69 than loading two values in each register and using shifts and strh, and
70 requires fewer fixup operations than splitting the values, calculating, and
71 merging.
72 */
73 stmdb sp!, { r4, lr }
74 1:
75 ldr r2, [r0]
76 ldr r3, [r0, #16]
77 eor r12, r2, r3
78 and r12, r12, #0x8000
79 bic r3, r3, #0x8000
80 bic r4, r2, #0x8000
81 add r4, r4, r3
82 eor r4, r4, r12
83 orr r2, r2, #0x8000
84 sub r2, r2, r3
85 eor r2, r2, r12
86 eor r2, r2, #0x8000
87 str r4, [r0]
88 str r2, [r0, #16]
89 add r0, r0, #4
90 cmp r0, r1
91 bcc 1b
92 ldmpc regs=r4
93 #else
94 /* ARMv6 offers partitioned adds and subtracts, used here to unroll the loop
95 to two columns.
96 */
97 1:
98 ldr r2, [r0]
99 ldr r3, [r0, #16]
100 sadd16 r12, r2, r3
101 ssub16 r2, r2, r3
102 str r12, [r0]
103 str r2, [r0, #16]
104 add r0, r0, #4
105 cmp r0, r1
106 bcc 1b
107 bx lr
108 #endif
109 .size jpeg_idct2v, .-jpeg_idct2v
111 jpeg_idct2h:
112 #if ARM_ARCH < 6
113 /* Using LDR and shifts here would costs two more ops, and is no faster as
114 results can not be stored merged.
115 */
116 stmdb sp!, { r4-r5, lr }
117 #if ARM_ARCH < 5
118 ldr r14, =4112
119 #else
120 ldrsh r14, .Lpool4+2
121 #endif
122 1:
123 ldrsh r12, [r0]
124 ldrsh r4, [r0, #2]
125 add r12, r12, r14
126 add r5, r12, r4
127 sub r4, r12, r4
128 mov r5, r5, asr #5
129 mov r4, r4, asr #5
130 cmp r5, #255
131 mvnhi r5, r5, asr #31
132 cmp r4, #255
133 mvnhi r4, r4, asr #31
134 strb r5, [r1]
135 strb r4, [r1, #pix8_size]
136 add r0, r0, #16
137 add r1, r1, r3
138 cmp r0, r2
139 bcc 1b
140 ldmpc regs=r4-r5
141 #else
142 stmdb sp!, { r4, lr }
143 ldrsh r14, .Lpool4+2
144 1:
145 ldr r12, [r0]
146 sadd16 r12, r12, r14
147 saddsubx r12, r12, r12
148 usat r4, #8, r12, asr #21
149 sxth r12, r12
150 usat r12, #8, r12, asr #5
151 strb r4, [r1]
152 strb r12, [r1, #pix8_size]
153 add r0, r0, #16
154 add r1, r1, r3
155 cmp r0, r2
156 bcc 1b
157 ldmia sp!, { r4, pc }
158 #endif
159 .size jpeg_idct2h, .-jpeg_idct2h
161 jpeg_idct4v:
162 #if ARM_ARCH < 5
163 stmdb sp!, { r4-r7, lr }
164 ldr r14, =-15137
165 ldr r12, =6270
166 1:
167 ldrsh r4, [r0, #32]
168 ldrsh r2, [r0]
169 ldrsh r5, [r0, #48]
170 ldrsh r3, [r0, #16]
171 add r6, r2, r4 /* r6 = tmp10 >> 2 = d0 + d2 */
172 sub r2, r2, r4 /* r2 = tmp12 >> 2= d0 - d2 */
173 add r4, r3, r5 /* r4 = z1 = d1 + d3 */
174 add r7, r4, r4, lsl #3
175 rsb r4, r4, r7, lsl #4
176 rsb r4, r4, r4, lsl #5 /* z1 *= 4433 */
177 add r4, r4, #1024
178 mla r3, r12, r3, r4 /* r3 = tmp2 = z1 + z2 * 6270 */
179 mla r5, r14, r5, r4 /* r5 = tmp0 = z1 - z3 * 15137 */
180 mov r6, r6, lsl #2 /* r6 <<= 2 */
181 mov r2, r2, lsl #2 /* r2 <<= 2 */
182 add r7, r6, r3, asr #11 /* r7 = o0 */
183 sub r3, r6, r3, asr #11 /* r3 = o3 */
184 add r6, r2, r5, asr #11 /* r6 = o1 */
185 sub r2, r2, r5, asr #11 /* r2 = o2 */
186 strh r7, [r0]
187 strh r3, [r0, #48]
188 strh r6, [r0, #16]
189 strh r2, [r0, #32]
190 add r0, r0, #2
191 cmp r0, r1
192 bcc 1b
193 ldmpc regs=r4-r7
194 #elif ARM_ARCH < 6
195 stmdb sp!, { r4-r8, lr }
196 mov r8, #1024
197 ldr r4, .Lpool4
198 ldr r5, .Lpool4+4
199 1:
200 ldrsh r14, [r0, #48]
201 ldrsh r3, [r0, #16]
202 ldrsh r12, [r0, #32]
203 ldrsh r2, [r0]
204 add r6, r3, r14 /* r6 = z1 = d1 + d3 */
205 add r7, r2, r12 /* r7 = tmp10 >> 2 = d0 + d2 */
206 smlabb r6, r5, r6, r8 /* z1 *= 4433 */
207 sub r2, r2, r12 /* r2 = tmp12 >> 2= d0 - d2 */
208 smlatb r3, r5, r3, r6 /* r3 = tmp2 = z1 + z2 * 6270 */
209 smlabb r14, r4, r14, r6 /* r14 = tmp0 = z1 - z3 * 15137 */
210 mov r7, r7, lsl #2
211 mov r2, r2, lsl #2
212 add r12, r7, r3, asr #11 /* r12 = o0 */
213 sub r7, r7, r3, asr #11 /* r7 = o3 */
214 add r3, r2, r14, asr #11 /* r3 = o1 */
215 sub r2, r2, r14, asr #11 /* r2 = o2 */
216 strh r12, [r0]
217 strh r7, [r0, #48]
218 strh r3, [r0, #16]
219 strh r2, [r0, #32]
220 add r0, r0, #2
221 cmp r0, r1
222 bcc 1b
223 ldmia sp!, { r4-r8, pc }
224 #else /* ARMv6+ */
225 stmdb sp!, { r4-r10, lr }
226 ldrd r2, .Lpool4
227 mov r12, #1024
228 1:
229 ldr r6, [r0, #32]
230 ldr r4, [r0]
231 ldr r7, [r0, #48]
232 ldr r5, [r0, #16]
233 /* this part is being done in parallel on two columns */
234 sadd16 r8, r4, r6 /* r8 = d0 + d2 */
235 ssub16 r4, r4, r6 /* r4 = d0 - d2 */
236 sadd16 r6, r5, r7 /* r6 = d1 + d3 */
237 /* there is no parallel shift operation, but we can fake it with bic
238 and lsl */
239 bic r8, r8, #0xc000
240 bic r4, r4, #0xc000
241 /* multiplication expands values beyond 16 bits, so this part needs to be
242 split. the values will be merged below so that the rest of the addition
243 can be done in parallel */
244 smlabb r9, r3, r6, r12 /* r9 = z1[0] = (d1 * d3) * 4433 + 1024 */
245 smlabt r6, r3, r6, r12 /* r6 = z1[1] = (d1 * d3) * 4433 + 1024 */
246 smlatb r10, r3, r5, r9 /* r10 = tmp2[0] = z1 + d1 * 6270 */
247 smlabb r14, r2, r7, r9 /* r14 = tmp0[0] = z1 - d3 * 15137 */
248 smlatt r5, r3, r5, r6 /* r5 = tmp2[1] */
249 smlabt r6, r2, r7, r6 /* r6 = tmp0[1] */
250 mov r8, r8, lsl #2 /* complete the parallel shift started */
251 mov r4, r4, lsl #2 /* with the earlier bic instructions */
252 /* tmp2 are in r10, r5; tmp0 are in r14, r6 */
253 /* tmp10, tmp12 are in r4, r8 */
254 mov r10, r10, asr #11
255 mov r14, r14, asr #11
256 pkhbt r5, r10, r5, lsl #5 /* parallel tmp2 */
257 pkhbt r6, r14, r6, lsl #5 /* parallel tmp0 */
258 sadd16 r10, r8, r5 /* d0 */
259 ssub16 r5, r8, r5 /* d3 */
260 sadd16 r14, r4, r6 /* d1 */
261 ssub16 r6, r4, r6 /* d2 */
262 str r10, [r0]
263 str r5, [r0, #48]
264 str r14, [r0, #16]
265 str r6, [r0, #32]
266 add r0, r0, #4
267 cmp r0, r1
268 bcc 1b
269 ldmia sp!, { r4-r10, pc }
270 #endif
271 .size jpeg_idct4v, .-jpeg_idct4v
273 #if ARM_ARCH > 4
274 .align 4
275 .Lpool4:
276 .short -15137
277 .short 4112
278 .short 4433
279 .short 6270
281 .align 2
282 #endif
284 jpeg_idct4h:
285 #if ARM_ARCH < 5
286 stmdb sp!, { r4-r10, lr }
287 ldr r10, =-15137
288 ldr r14, =4112
289 ldr r12, =6270
290 1:
291 ldrsh r4, [r0]
292 ldrsh r6, [r0, #4]
293 ldrsh r7, [r0, #6]
294 ldrsh r5, [r0, #2]
295 add r4, r4, r14
296 add r8, r4, r6 /* r8 = tmp10 >> 2 = d0 + d2 */
297 sub r4, r4, r6 /* r4 = tmp12 >> 2= d0 - d2 */
298 add r6, r5, r7 /* r6 = z1 = d1 + d3 */
299 add r9, r6, r6, lsl #3
300 rsb r6, r6, r9, lsl #4
301 rsb r6, r6, r6, lsl #5 /* z1 *= 4433 */
302 mla r7, r10, r7, r6 /* r5 = tmp0 = z1 - z3 * 15137 */
303 mla r5, r12, r5, r6 /* r3 = tmp2 = z1 + z2 * 6270 */
304 add r9, r5, r8, lsl #13 /* r7 = o0 */
305 rsb r5, r5, r8, lsl #13 /* r3 = o3 */
306 add r8, r7, r4, lsl #13 /* r6 = o1 */
307 rsb r4, r7, r4, lsl #13 /* r2 = o2 */
308 mov r9, r9, asr #18
309 mov r8, r8, asr #18
310 mov r4, r4, asr #18
311 mov r5, r5, asr #18
312 cmp r9, #255
313 mvnhi r9, r9, asr #31
314 cmp r8, #255
315 mvnhi r8, r8, asr #31
316 cmp r4, #255
317 mvnhi r4, r4, asr #31
318 cmp r5, #255
319 mvnhi r5, r5, asr #31
320 strb r9, [r1]
321 strb r8, [r1, #pix8_size]
322 strb r4, [r1, #2*pix8_size]
323 strb r5, [r1, #3*pix8_size]
324 add r0, r0, #16
325 add r1, r1, r3
326 cmp r0, r2
327 bcc 1b
328 ldmpc regs=r4-r10
329 #elif ARM_ARCH < 6 /* ARMv5 */
330 stmdb sp!, { r4-r9, lr }
331 ldr r4, .Lpool4
332 ldr r5, .Lpool4+4
333 1:
334 ldrsh r7, [r0, #6]
335 ldrsh r14, [r0, #2]
336 ldrsh r12, [r0]
337 ldrsh r6, [r0, #4]
338 add r8, r14, r7 /* r8 = z1 = d1 + d3 */
339 add r12, r12, r4, lsr #16
340 smulbb r8, r5, r8 /* z1 *= 4433 */
341 add r9, r12, r6 /* r9 = tmp10 >> 13 = d0 + d2 */
342 smlatb r14, r5, r14, r8 /* r14= tmp2 = z1 + z2 * 6270 */
343 smlabb r7, r4, r7, r8 /* r7 = tmp0 = z1 - z3 * 15137 */
344 sub r12, r12, r6 /* r12= tmp12 >> 13 = d0 - d2 */
345 add r6, r14, r9, lsl #13 /* r6 = o0 */
346 rsb r9, r14, r9, lsl #13 /* r9 = o3 */
347 add r14, r7, r12, lsl #13 /* r14= o1 */
348 rsb r12, r7, r12, lsl #13 /* r12= o2 */
349 mov r6, r6, asr #18
350 mov r14, r14, asr #18
351 mov r12, r12, asr #18
352 mov r9, r9, asr #18
353 cmp r6, #255
354 mvnhi r6, r6, asr #31
355 cmp r14, #255
356 mvnhi r14, r14, asr #31
357 cmp r12, #255
358 mvnhi r12, r12, asr #31
359 cmp r9, #255
360 mvnhi r9, r9, asr #31
361 strb r6, [r1]
362 strb r14, [r1, #pix8_size]
363 strb r12, [r1, #2*pix8_size]
364 strb r9, [r1, #3*pix8_size]
365 add r0, r0, #16
366 add r1, r1, r3
367 cmp r0, r2
368 bcc 1b
369 ldmia sp!, { r4-r9, pc }
370 #else /* ARMv6+ */
371 stmdb sp!, { r4-r9, lr }
372 ldrd r4, .Lpool4
373 mov r9, r4, lsr #16
374 1:
375 ldmia r0, { r12, r14 }
376 sadd16 r12, r12, r9
377 sadd16 r6, r12, r14 /* r6lo = d0 + d2, r6hi = d1 + d3 */
378 ssub16 r7, r12, r14 /* r7lo = d0 - d2 */
379 smulbt r8, r5, r6
380 sxth r6, r6
381 smlatt r12, r5, r12, r8 /* r12= tmp2 = z1 + z2 * 6270 */
382 smlabt r14, r4, r14, r8 /* r14= tmp0 = z1 - z3 * 15137 */
383 sxth r7, r7
384 add r8, r12, r6, lsl #13 /* r8 = o0 */
385 rsb r6, r12, r6, lsl #13 /* r6 = o3 */
386 add r12, r14, r7, lsl #13 /* r12= o1 */
387 rsb r14, r14, r7, lsl #13 /* r14= o2 */
388 usat r8, #8, r8, asr #18
389 usat r6, #8, r6, asr #18
390 usat r12, #8, r12, asr #18
391 usat r14, #8, r14, asr #18
392 strb r8, [r1]
393 strb r6, [r1, #3*pix8_size]
394 strb r12, [r1, #pix8_size]
395 strb r14, [r1, #2*pix8_size]
396 add r0, r0, #16
397 add r1, r1, r3
398 cmp r0, r2
399 bcc 1b
400 ldmia sp!, { r4-r9, pc }
401 #endif
402 .size jpeg_idct4h, .-jpeg_idct4h
404 #if ARM_ARCH < 6
405 jpeg_idct8v:
406 stmdb sp!, { r4-r11, lr }
407 add r2, r0, #128
408 1:
409 ldmia r0!, { r4-r7 }
410 #if ARM_ARCH < 5
411 mov r8, r4, lsl #16
412 orrs r9, r6, r7
413 orreqs r9, r5, r4, lsr #16
414 bne 2f
415 mov r8, r8, asr #14
416 strh r8, [r2]
417 strh r8, [r2, #16]
418 strh r8, [r2, #32]
419 strh r8, [r2, #48]
420 strh r8, [r2, #64]
421 strh r8, [r2, #80]
422 strh r8, [r2, #96]
423 strh r8, [r2, #112]
424 cmp r0, r1
425 add r2, r2, #2
426 bcc 1b
427 ldmpc regs=r4-r11
428 2:
429 ldr r14, =4433
430 ldr r12, =-15137
431 mov r10, r5, lsl #16
432 mov r11, r7, lsl #16
433 mov r10, r10, asr #16 /* r10 = z2 = d2 */
434 mov r11, r11, asr #16 /* r11 = z3 = d6 */
435 add r8, r8, #8192
436 add r9, r10, r11
437 mov r8, r8, asr #3 /* r8 = z4 = (d0 << 13) + 1024 */
438 mul r9, r14, r9 /* r9 = z1 = (z2 + z3) * 4433 */
439 ldr r14, =6270
440 mla r11, r12, r11, r9 /* r11 = tmp2 = z1 - z3 * 15137 */
441 mla r10, r14, r10, r9 /* r10 = tmp3 = z1 + z2 * 6270 */
442 mov r9, r6, lsl #16 /* r9 = z5 << 3 = d4 << 16 */
443 add r12, r8, r9, asr #3 /* r12 = tmp0 = z4 + z5 */
444 sub r14, r8, r9, asr #3 /* r14 = tmp1 = z4 - z5 */
445 add r8, r12, r10 /* r8 = tmp10 = tmp0 + tmp3 */
446 sub r9, r12, r10 /* r9 = tmp13 = tmp0 - tmp3 */
447 add r10, r14, r11 /* r10 = tmp11 = tmp1 + tmp2 */
448 sub r11, r14, r11 /* r11 = tmp12 = tmp1 - tmp2 */
449 stmdb sp, { r8-r11 } /* tmp10 tmp13 tmp11 tmp12 */
450 mov r4, r4, asr #16 /* r4 = tmp3 = d1 */
451 mov r5, r5, asr #16 /* r5 = tmp2 = d3 */
452 mov r6, r6, asr #16 /* r6 = tmp1 = d5 */
453 mov r7, r7, asr #16 /* r7 = tmp0 = d7 */
454 ldr r10, =9633
455 ldr r11, =-16069
456 add r12, r5, r7 /* r12 = z3 = tmp0 + tmp2 */
457 add r14, r4, r6 /* r14 = z4 = tmp1 + tmp3 */
458 add r9, r12, r14 /* r9 = z3 + z4 */
459 mul r9, r10, r9 /* r9 = z5 = (z3 + z4) * 9633 */
460 ldr r10, =-3196
461 mla r12, r11, r12, r9 /* r12 = z3 = z5 - z3 * 16069 */
462 ldr r11, =-7373
463 mla r14, r10, r14, r9 /* r14 = z4 = z5 - z4 * 3196 */
464 ldr r10, =2446
465 add r9, r4, r7 /* r9 = tmp0 + tmp3 */
466 mla r8, r11, r9, r12 /* r8 = z1 + z3 */
467 mla r9, r11, r9, r14 /* r9 = z1 + z4 */
468 ldr r11, =12299
469 mla r7, r10, r7, r8 /* r7 = tmp0 = z1 + z3 + tmp0 * 2446 */
470 ldr r10, =-20995
471 mla r4, r11, r4, r9 /* r4 = tmp3 = z1 + z4 + tmp0 * 12299 */
472 ldr r11, =25172
473 add r9, r5, r6 /* r9 = tmp1 + tmp2 */
474 mla r12, r10, r9, r12 /* r12 = z2 + z3 */
475 mla r14, r10, r9, r14 /* r14 = z2 + z4 */
476 ldr r10, =16819
477 mla r5, r11, r5, r12 /* r5 = tmp2 = z2 + z3 + tmp2 * 25172 */
478 mla r6, r10, r6, r14 /* r6 = tmp1 = z2 + z4 + tmp1 * 16819 */
479 ldmdb sp, { r8-r11 }
480 add r12, r8, r4 /* o0 */
481 sub r14, r8, r4 /* o7 */
482 add r8, r9, r7 /* o3 */
483 sub r9, r9, r7 /* o4 */
484 add r4, r10, r5 /* O1 */
485 sub r5, r10, r5 /* o6 */
486 add r10, r11, r6 /* o2 */
487 sub r11, r11, r6 /* o5 */
488 /* output in order: r12 r4 r10 r8 r9 r11 r5 r14 */
489 mov r12, r12, asr #11
490 mov r4, r4, asr #11
491 mov r10, r10, asr #11
492 mov r8, r8, asr #11
493 mov r9, r9, asr #11
494 mov r11, r11, asr #11
495 mov r5, r5, asr #11
496 mov r14, r14, asr #11
497 strh r12, [r2]
498 strh r4, [r2, #16]
499 strh r10, [r2, #32]
500 strh r8, [r2, #48]
501 strh r9, [r2, #64]
502 strh r11, [r2, #80]
503 strh r5, [r2, #96]
504 strh r14, [r2, #112]
505 #else /* ARMv5+ */
506 mov r12, r4, lsl #16
507 orrs r9, r6, r7
508 orreqs r9, r5, r4, lsr #16
509 bne 2f
510 mov r12, r12, asr #14
511 strh r12, [r2]
512 strh r12, [r2, #16]
513 strh r12, [r2, #32]
514 strh r12, [r2, #48]
515 strh r12, [r2, #64]
516 strh r12, [r2, #80]
517 strh r12, [r2, #96]
518 strh r12, [r2, #112]
519 add r2, r2, #2
520 cmp r0, r1
521 bcc 1b
522 ldmia sp!, { r4-r11, pc }
523 2:
524 ldr r8, .Lpool8
525 ldr r9, .Lpool8+4
526 add r12, r12, #8192
527 add r10, r5, r7 /* r10[15:0] = d2 + d6 */
528 sub r14, r12, r6, lsl #16 /* r14 = tmp1 << 3 = (d0 - d4) << 16 */
529 smulbb r10, r8, r10 /* r10 = z1 = (d2 + d6) * 4433 */
530 add r12, r12, r6, lsl #16 /* r12 = tmp0 << 3= (d0 + d4) << 16 */
531 smlatb r11, r8, r7, r10 /* r11 = tmp2 = z1 - d6 * 15137 */
532 smlabb r10, r9, r5, r10 /* r10 = tmp3 = z1 + d2 * 6270 */
533 add r8, r11, r14, asr #3 /* r8 = tmp11 */
534 rsb r11, r11, r14, asr #3 /* r11 = tmp12 */
535 add r14, r10, r12, asr #3 /* r14 = tmp10 */
536 rsb r12, r10, r12, asr #3 /* r12 = tmp13 */
537 stmdb sp, { r8, r11, r12, r14 }/* tmp11 tmp12 tmp13 tmp10 */
538 mov r6, r6, asr #16 /* r6 = tmp1 = d5 */
539 mov r7, r7, asr #16 /* r7 = tmp0 = d7 */
540 add r12, r6, r4, asr #16 /* r12 = z4 = tmp1 + tmp3 */
541 add r14, r7, r5, asr #16 /* r14 = z3 = tmp0 + tmp2 */
542 add r8, r12, r14 /* r8 = z3 + z4 */
543 ldr r10, .Lpool8+8
544 ldr r11, .Lpool8+12
545 smultb r8, r9, r8 /* r8 = z5 = (z3 + z4) * 9633 */
546 add r9, r7, r4, asr #16 /* r9 = z1 = tmp0 + tmp3 */
547 smlabb r14, r10, r14, r8 /* r14 = z3 = z5 - z3 * 16069 */
548 smlatb r12, r10, r12, r8 /* r12 = z4 = z5 - z4 * 3196 */
549 smlabb r8, r11, r9, r14 /* r8 = z3 - z1 * 7373 */
550 smlabb r9, r11, r9, r12 /* r9 = z4 - z1 * 7373 */
551 add r10, r6, r5, asr #16 /* r10 = z2 = tmp1 + tmp2 */
552 smlatb r12, r11, r10, r12 /* r12 = z4 - z2 * 20995 */
553 smlatb r14, r11, r10, r14 /* r14 = z3 - z2 * 20995 */
554 ldr r10, .Lpool8+16
555 ldr r11, .Lpool8+20
556 smlabb r7, r10, r7, r8 /* r7 = tmp0 */
557 smlatt r4, r10, r4, r9 /* r4 = tmp3 */
558 smlabb r6, r11, r6, r12 /* r6 = tmp1 */
559 smlatt r5, r11, r5, r14 /* r5 = tmp2 */
560 ldmdb sp, { r8-r11 } /* tmp11 tmp12 tmp13 tmp10 */
561 add r12, r8, r5 /* o1 */
562 sub r14, r8, r5 /* o6 */
563 add r8, r9, r6 /* o2 */
564 sub r9, r9, r6 /* o5 */
565 add r6, r10, r7 /* o3 */
566 sub r7, r10, r7 /* o4 */
567 add r10, r11, r4 /* o0 */
568 sub r11, r11, r4 /* o7 */
569 mov r12, r12, asr #11
570 mov r14, r14, asr #11
571 mov r8, r8, asr #11
572 mov r9, r9, asr #11
573 mov r6, r6, asr #11
574 mov r7, r7, asr #11
575 mov r10, r10, asr #11
576 mov r11, r11, asr #11
577 strh r10, [r2]
578 strh r12, [r2, #16]
579 strh r8, [r2, #32]
580 strh r6, [r2, #48]
581 strh r7, [r2, #64]
582 strh r9, [r2, #80]
583 strh r14, [r2, #96]
584 strh r11, [r2, #112]
585 #endif
586 cmp r0, r1
587 add r2, r2, #2
588 bcc 1b
589 ldmpc regs=r4-r11
590 .size jpeg_idct8v, .-jpeg_idct8v
592 #if ARM_ARCH > 4
593 .align 4
594 .Lpool8:
595 .short 4433
596 .short -15137
597 .short 6270
598 .short 9633
599 .short -16069
600 .short -3196
601 .short -7373
602 .short -20995
603 .short 2446
604 .short 12299
605 .short 16819
606 .short 25172
607 .align 2
608 #endif
610 jpeg_idct8h:
611 stmdb sp!, { r4-r11, lr }
612 1:
613 ldmia r0!, { r4-r7 }
614 ldr r14, =(4112<<16)
615 #if ARM_ARCH < 5
616 add r8, r14, r4, lsl #16
617 orrs r9, r6, r7
618 orreqs r9, r5, r4, lsr #16
619 bne 2f
620 mov r8, r8, asr #21
621 cmp r8, #255
622 mvnhi r8, r8, asr #31
623 strb r8, [r1]
624 strb r8, [r1, #pix8_size]
625 strb r8, [r1, #2*pix8_size]
626 strb r8, [r1, #3*pix8_size]
627 strb r8, [r1, #4*pix8_size]
628 strb r8, [r1, #5*pix8_size]
629 strb r8, [r1, #6*pix8_size]
630 strb r8, [r1, #7*pix8_size]
631 add r1, r1, r3
632 cmp r0, r2
633 bcc 1b
634 ldmpc regs=r4-r11
635 2:
636 ldr r14, =4433
637 ldr r12, =-15137
638 mov r10, r5, lsl #16
639 mov r11, r7, lsl #16
640 mov r10, r10, asr #16 /* r10 = z2 = d2 */
641 mov r11, r11, asr #16 /* r11 = z3 = d6 */
642 add r9, r10, r11
643 mov r8, r8, asr #3 /* r8 = z4 = (d0 + 4112) << 13 */
644 mul r9, r14, r9 /* r9 = z1 = (z2 + z3) * 4433 */
645 ldr r14, =6270
646 mla r11, r12, r11, r9 /* r11 = tmp2 = z1 - z3 * 15137 */
647 mla r10, r14, r10, r9 /* r10 = tmp3 = z1 + z2 * 6270 */
648 mov r9, r6, lsl #16 /* r9 = z5 << 3 = d4 << 16 */
649 add r12, r8, r9, asr #3 /* r12 = tmp0 = z4 + z5 */
650 sub r14, r8, r9, asr #3 /* r14 = tmp1 = z4 - z5 */
651 add r8, r12, r10 /* r8 = tmp10 = tmp0 + tmp3 */
652 sub r9, r12, r10 /* r9 = tmp13 = tmp0 - tmp3 */
653 add r10, r14, r11 /* r10 = tmp11 = tmp1 + tmp2 */
654 sub r11, r14, r11 /* r11 = tmp12 = tmp1 - tmp2 */
655 stmdb sp, { r8-r11 } /* tmp10 tmp13 tmp11 tmp12 */
656 mov r4, r4, asr #16 /* r4 = tmp3 = d1 */
657 mov r5, r5, asr #16 /* r5 = tmp2 = d3 */
658 mov r6, r6, asr #16 /* r6 = tmp1 = d5 */
659 mov r7, r7, asr #16 /* r7 = tmp0 = d7 */
660 ldr r10, =9633
661 ldr r11, =-16069
662 add r12, r5, r7 /* r12 = z3 = tmp0 + tmp2 */
663 add r14, r4, r6 /* r14 = z4 = tmp1 + tmp3 */
664 add r9, r12, r14 /* r9 = z3 + z4 */
665 mul r9, r10, r9 /* r9 = z5 = (z3 + z4) * 9633 */
666 ldr r10, =-3196
667 mla r12, r11, r12, r9 /* r12 = z3 = z5 - z3 * 16069 */
668 ldr r11, =-7373
669 mla r14, r10, r14, r9 /* r14 = z4 = z5 - z4 * 3196 */
670 ldr r10, =2446
671 add r9, r4, r7 /* r9 = tmp0 + tmp3 */
672 mla r8, r11, r9, r12 /* r8 = z1 + z3 */
673 mla r9, r11, r9, r14 /* r9 = z1 + z4 */
674 ldr r11, =12299
675 mla r7, r10, r7, r8 /* r7 = tmp0 = z1 + z3 + tmp0 * 2446 */
676 ldr r10, =-20995
677 mla r4, r11, r4, r9 /* r4 = tmp3 = z1 + z4 + tmp0 * 12299 */
678 ldr r11, =25172
679 add r9, r5, r6 /* r9 = tmp1 + tmp2 */
680 mla r12, r10, r9, r12 /* r12 = z2 + z3 */
681 mla r14, r10, r9, r14 /* r14 = z2 + z4 */
682 ldr r10, =16819
683 mla r5, r11, r5, r12 /* r5 = tmp2 = z2 + z3 + tmp2 * 25172 */
684 mla r6, r10, r6, r14 /* r6 = tmp1 = z2 + z4 + tmp1 * 16819 */
685 ldmdb sp, { r8-r11 }
686 add r12, r8, r4 /* o0 */
687 sub r14, r8, r4 /* o7 */
688 add r8, r9, r7 /* o3 */
689 sub r9, r9, r7 /* o4 */
690 add r4, r10, r5 /* O1 */
691 sub r5, r10, r5 /* o6 */
692 add r10, r11, r6 /* o2 */
693 sub r11, r11, r6 /* o5 */
694 /* output in order: r12 r4 r10 r8 r9 r11 r5 r14 */
695 mov r12, r12, asr #18
696 cmp r12, #255
697 mvnhi r12, r12, asr #31
698 mov r4, r4, asr #18
699 cmp r4, #255
700 mvnhi r4, r4, asr #31
701 mov r10, r10, asr #18
702 cmp r10, #255
703 mvnhi r10, r10, asr #31
704 mov r8, r8, asr #18
705 cmp r8, #255
706 mvnhi r8, r8, asr #31
707 mov r9, r9, asr #18
708 cmp r9, #255
709 mvnhi r9, r9, asr #31
710 mov r11, r11, asr #18
711 cmp r11, #255
712 mvnhi r11, r11, asr #31
713 mov r5, r5, asr #18
714 cmp r5, #255
715 mvnhi r5, r5, asr #31
716 mov r14, r14, asr #18
717 cmp r14, #255
718 mvnhi r14, r14, asr #31
719 strb r12, [r1]
720 strb r4, [r1, #pix8_size]
721 strb r10, [r1, #2*pix8_size]
722 strb r8, [r1, #3*pix8_size]
723 strb r9, [r1, #4*pix8_size]
724 strb r11, [r1, #5*pix8_size]
725 strb r5, [r1, #6*pix8_size]
726 strb r14, [r1, #7*pix8_size]
727 #else /* ARMv5+ */
728 add r12, r14, r4, lsl #16
729 orrs r9, r6, r7
730 orreqs r9, r5, r4, lsr #16
731 bne 2f
732 mov r12, r12, asr #21
733 cmp r12, #255
734 mvnhi r12, r12, asr #31
735 strb r12, [r1]
736 strb r12, [r1, #pix8_size]
737 strb r12, [r1, #2*pix8_size]
738 strb r12, [r1, #3*pix8_size]
739 strb r12, [r1, #4*pix8_size]
740 strb r12, [r1, #5*pix8_size]
741 strb r12, [r1, #6*pix8_size]
742 strb r12, [r1, #7*pix8_size]
743 add r1, r1, r3
744 cmp r0, r2
745 bcc 1b
746 ldmia sp!, { r4-r11, pc }
747 2:
748 ldr r8, .Lpool8
749 ldr r9, .Lpool8+4
750 add r10, r5, r7 /* r10[15:0] = d2 + d6 */
751 sub r14, r12, r6, lsl #16 /* r14 = tmp1 << 3 = (d0 - d4) << 16 */
752 smulbb r10, r8, r10 /* r10 = z1 = (d2 + d6) * 4433 */
753 add r12, r12, r6, lsl #16 /* r12 = tmp0 << 3= (d0 + d4) << 16 */
754 smlatb r11, r8, r7, r10 /* r11 = tmp2 = z1 - d6 * 15137 */
755 smlabb r10, r9, r5, r10 /* r10 = tmp3 = z1 + d2 * 6270 */
756 add r8, r11, r14, asr #3 /* r8 = tmp11 */
757 rsb r11, r11, r14, asr #3 /* r11 = tmp12 */
758 add r14, r10, r12, asr #3 /* r14 = tmp10 */
759 rsb r12, r10, r12, asr #3 /* r12 = tmp13 */
760 stmdb sp, { r8, r11, r12, r14 }/* tmp11 tmp12 tmp13 tmp10 */
761 mov r6, r6, asr #16 /* r6 = tmp1 = d5 */
762 mov r7, r7, asr #16 /* r7 = tmp0 = d7 */
763 add r12, r6, r4, asr #16 /* r12 = z4 = tmp1 + tmp3 */
764 add r14, r7, r5, asr #16 /* r14 = z3 = tmp0 + tmp2 */
765 add r8, r12, r14 /* r8 = z3 + z4 */
766 ldr r10, .Lpool8+8
767 ldr r11, .Lpool8+12
768 smultb r8, r9, r8 /* r8 = z5 = (z3 + z4) * 9633 */
769 add r9, r7, r4, asr #16 /* r9 = z1 = tmp0 + tmp3 */
770 smlabb r14, r10, r14, r8 /* r14 = z3 = z5 - z3 * 16069 */
771 smlatb r12, r10, r12, r8 /* r12 = z4 = z5 - z4 * 3196 */
772 smlabb r8, r11, r9, r14 /* r8 = z3 - z1 * 7373 */
773 smlabb r9, r11, r9, r12 /* r9 = z4 - z1 * 7373 */
774 add r10, r6, r5, asr #16 /* r10 = z2 = tmp1 + tmp2 */
775 smlatb r12, r11, r10, r12 /* r12 = z4 - z2 * 20995 */
776 smlatb r14, r11, r10, r14 /* r14 = z3 - z2 * 20995 */
777 ldr r10, .Lpool8+16
778 ldr r11, .Lpool8+20
779 smlabb r7, r10, r7, r8 /* r7 = tmp0 */
780 smlatt r4, r10, r4, r9 /* r4 = tmp3 */
781 smlabb r6, r11, r6, r12 /* r6 = tmp1 */
782 smlatt r5, r11, r5, r14 /* r5 = tmp2 */
783 ldmdb sp, { r8-r11 } /* tmp11 tmp12 tmp13 tmp10 */
784 add r12, r8, r5 /* o1 */
785 sub r14, r8, r5 /* o6 */
786 add r8, r9, r6 /* o2 */
787 sub r9, r9, r6 /* o5 */
788 add r6, r10, r7 /* o3 */
789 sub r7, r10, r7 /* o4 */
790 add r10, r11, r4 /* o0 */
791 sub r11, r11, r4 /* o7 */
792 /* output in order: r10 r12 r8 r6 r7 r9 r14 r11 */
793 mov r10, r10, asr #18
794 cmp r10, #255
795 mvnhi r10, r10, asr #31
796 mov r12, r12, asr #18
797 cmp r12, #255
798 mvnhi r12, r12, asr #31
799 mov r8, r8, asr #18
800 cmp r8, #255
801 mvnhi r8, r8, asr #31
802 mov r6, r6, asr #18
803 cmp r6, #255
804 mvnhi r6, r6, asr #31
805 mov r7, r7, asr #18
806 cmp r7, #255
807 mvnhi r7, r7, asr #31
808 mov r9, r9, asr #18
809 cmp r9, #255
810 mvnhi r9, r9, asr #31
811 mov r14, r14, asr #18
812 cmp r14, #255
813 mvnhi r14, r14, asr #31
814 mov r11, r11, asr #18
815 cmp r11, #255
816 mvnhi r11, r11, asr #31
817 strb r10, [r1]
818 strb r12, [r1, #pix8_size]
819 strb r8, [r1, #2*pix8_size]
820 strb r6, [r1, #3*pix8_size]
821 strb r7, [r1, #4*pix8_size]
822 strb r9, [r1, #5*pix8_size]
823 strb r14, [r1, #6*pix8_size]
824 strb r11, [r1, #7*pix8_size]
825 #endif
826 add r1, r1, r3
827 cmp r0, r2
828 bcc 1b
829 ldmpc regs=r4-r11
830 .size jpeg_idct8h, .-jpeg_idct8h
831 #else /* ARMv6+ */
832 jpeg_idct8v:
833 stmdb sp!, { r4-r11, lr }
834 add r2, r0, #128
835 1:
836 ldmia r0!, { r4-r7 }
837 orrs r9, r6, r7
838 orreqs r9, r5, r4, lsr #16
839 bne 2f
840 mov r4, r4, lsl #2
841 strh r4, [r2]
842 strh r4, [r2, #16]
843 strh r4, [r2, #32]
844 strh r4, [r2, #48]
845 strh r4, [r2, #64]
846 strh r4, [r2, #80]
847 strh r4, [r2, #96]
848 strh r4, [r2, #112]
849 cmp r0, r1
850 add r2, r2, #2
851 bcc 1b
852 ldmia sp!, { r4-r11, pc }
853 2:
854 ldrd r8, .Lpool8
855 mov r12, r4, lsl #16
856 add r10, r5, r7 /* r10 = d2 + d6 */
857 add r12, r12, #8192
858 add r3, r12, r6, lsl #16 /* tmp0 */
859 sub r12, r12, r6, lsl #16 /* tmp1 */
860 pkhtb r4, r5, r4, asr #16 /* r4 = (tmp3[o], tmp2[0]) = (d1, d3) */
861 smulbb r14, r8, r10 /* r14 = z1[e] = (d2 + d6) * 4433 */
862 pkhtb r6, r6, r7, asr #16 /* r6 = (tmp0[o], tmp1[o]) = (d7, d5) */
863 smlatb r7, r8, r7, r14 /* r7 = tmp2[e] = z1 - d6 * 15137 */
864 smlabb r5, r9, r5, r14 /* r5 = tmp3[e] = z1 + d2 * 6270 */
865 pkhtb r9, r9, r9, asr #16 /* r9 = (9633, 9633) */
866 add r10, r5, r3, asr #3 /* r10 = tmp10 */
867 rsb r11, r5, r3, asr #3 /* r11 = tmp13 */
868 mov r3, r4, ror #16
869 rsb r14, r7, r12, asr #3 /* r14 = tmp12 */
870 add r12, r7, r12, asr #3 /* r12 = tmp11 */
871 sadd16 r8, r3, r6 /* z3, z4 */
872 stmdb sp, { r10-r12, r14 } /* tmp10 tmp13 tmp11 tmp12 */
873 smuad r5, r9, r8 /* r5 = z5 = (z3[o] + z4[o]) * 9633 */
874 ldrd r10, .Lpool8+8
875 sadd16 r7, r4, r6 /* r7 = (z1, z2) */
876 smlatt r9, r10, r8, r5 /* r9 = z4 = z5 - z4 * 16069 */
877 smlabb r8, r10, r8, r5 /* r8 = z3 = z5 - z3 * 3196 */
878 smlabb r14, r11, r7, r9 /* r14 = z1 + z4 */
879 smlabb r12, r11, r7, r8 /* r12 = z1 + z3 */
880 smlatt r5, r11, r7, r9 /* r5 = z2 + z4 */
881 smlatt r7, r11, r7, r8 /* r7 = z2 + z3 */
882 ldrd r8, .Lpool8+16
883 smlabt r7, r9, r4, r7 /* r7 = tmp2 */
884 smlatb r14, r9, r4, r14 /* r14 = tmp3 */
885 ldmdb sp, { r4, r9-r11 } /* tmp10 tmp13 tmp11 tmp12 */
886 smlabb r12, r8, r6, r12 /* r12 = tmp0 */
887 smlatt r5, r8, r6, r5 /* r5 = tmp1 */
888 /* used: r4, r5, r7, r9-r12, r14 */
889 add r6, r4, r14 /* o0 */
890 sub r8, r4, r14 /* o7 */
891 add r14, r9, r12 /* o3 */
892 sub r12, r9, r12 /* o4 */
893 add r4, r10, r7 /* o1 */
894 sub r7, r10, r7 /* o6 */
895 add r9, r11, r5 /* o2 */
896 sub r10, r11, r5 /* o5 */
897 mov r6, r6, asr #11
898 mov r4, r4, asr #11
899 mov r9, r9, asr #11
900 mov r14, r14, asr #11
901 mov r12, r12, asr #11
902 mov r10, r10, asr #11
903 mov r7, r7, asr #11
904 mov r8, r8, asr #11
905 strh r6, [r2]
906 strh r4, [r2, #16]
907 strh r9, [r2, #32]
908 strh r14, [r2, #48]
909 strh r12, [r2, #64]
910 strh r10, [r2, #80]
911 strh r7, [r2, #96]
912 strh r8, [r2, #112]
913 cmp r0, r1
914 add r2, r2, #2
915 bcc 1b
916 ldmia sp!, { r4-r11, pc }
917 .size jpeg_idct8v, .-jpeg_idct8v
919 .align 4
920 .Lpool8:
921 .short 4433
922 .short -15137
923 .short 6270
924 .short 9633
925 .short -16069
926 .short -3196
927 .short -7373
928 .short -20995
929 .short 2446
930 .short 16819
931 .short 25172
932 .short 12299
934 .align 2
935 jpeg_idct8h:
936 stmdb sp!, { r4-r11, lr }
937 1:
938 ldr r14, =4112
939 ldmia r0!, { r4-r7 }
940 sadd16 r4, r4, r14
941 orrs r9, r6, r7
942 orreqs r9, r5, r4, lsr #16
943 bne 2f
944 sxth r4, r4
945 usat r4, #8, r4, asr #5
946 strb r4, [r1]
947 strb r4, [r1, #pix8_size]
948 strb r4, [r1, #2*pix8_size]
949 strb r4, [r1, #3*pix8_size]
950 strb r4, [r1, #4*pix8_size]
951 strb r4, [r1, #5*pix8_size]
952 strb r4, [r1, #6*pix8_size]
953 strb r4, [r1, #7*pix8_size]
954 add r1, r1, r3
955 cmp r0, r2
956 bcc 1b
957 ldmia sp!, { r4-r11, pc }
958 2:
959 ldrd r8, .Lpool8
960 sadd16 r10, r5, r7 /* r10 = (d2 + d6, d3 + d7) */
961 ssub16 r12, r4, r6 /* r12 = (d0 - d4, d1 - d5) */
962 sadd16 r11, r4, r6 /* r11 = (d0 + d4, d1 + d5) */
963 pkhtb r4, r5, r4, asr #16 /* r4 = (tmp3[o], tmp2[0]) = (d1, d3) */
964 smulbb r14, r8, r10 /* r14 = z1[e] = (d2 + d6) * 4433 */
965 pkhtb r6, r6, r7, asr #16 /* r6 = (tmp0[o], tmp1[o]) = (d7, d5) */
966 smlatb r7, r8, r7, r14 /* r7 = tmp2[e] = z1 - d6 * 15137 */
967 smlabb r5, r9, r5, r14 /* r5 = tmp3[e] = z1 + d2 * 6270 */
968 sxth r12, r12 /* r12 = tmp1[e] = d0 - d4 */
969 pkhtb r8, r11, r10, asr #16 /* r8 = (z3[o], z4[o]) */
970 sxth r14, r11 /* r14 = tmp0[e] */
971 pkhtb r9, r9, r9, asr #16 /* r9 = (9633, 9633) */
972 add r10, r5, r14, lsl #13 /* r10 = tmp10 */
973 rsb r11, r5, r14, lsl #13 /* r11 = tmp13 */
974 rsb r14, r7, r12, lsl #13 /* r14 = tmp12 */
975 add r12, r7, r12, lsl #13 /* r12 = tmp11 */
976 stmdb sp, { r10-r12, r14 } /* tmp10 tmp13 tmp11 tmp12 */
977 smuad r5, r9, r8 /* r5 = z5 = (z3[o] + z4[o]) * 9633 */
978 ldrd r10, .Lpool8+8
979 sadd16 r7, r4, r6 /* r7 = (z1, z2) */
980 smlatt r9, r10, r8, r5 /* r9 = z4 = z5 - z4 * 16069 */
981 smlabb r8, r10, r8, r5 /* r8 = z3 = z5 - z3 * 3196 */
982 smlabb r14, r11, r7, r9 /* r14 = z1 + z4 */
983 smlabb r12, r11, r7, r8 /* r12 = z1 + z3 */
984 smlatt r5, r11, r7, r9 /* r5 = z2 + z4 */
985 smlatt r7, r11, r7, r8 /* r7 = z2 + z3 */
986 ldrd r8, .Lpool8+16
987 smlabt r7, r9, r4, r7 /* r7 = tmp2 */
988 smlatb r14, r9, r4, r14 /* r14 = tmp3 */
989 ldmdb sp, { r4, r9-r11 } /* tmp10 tmp13 tmp11 tmp12 */
990 smlabb r12, r8, r6, r12 /* r12 = tmp0 */
991 smlatt r5, r8, r6, r5 /* r5 = tmp1 */
992 /* used: r4, r5, r7, r9-r12, r14 */
993 add r6, r4, r14 /* o0 */
994 sub r8, r4, r14 /* o7 */
995 add r14, r9, r12 /* o3 */
996 sub r12, r9, r12 /* o4 */
997 add r4, r10, r7 /* o1 */
998 sub r7, r10, r7 /* o6 */
999 add r9, r11, r5 /* o2 */
1000 sub r10, r11, r5 /* o5 */
1001 usat r6, #8, r6, asr #18
1002 usat r4, #8, r4, asr #18
1003 usat r9, #8, r9, asr #18
1004 usat r14, #8, r14, asr #18
1005 usat r12, #8, r12, asr #18
1006 usat r10, #8, r10, asr #18
1007 usat r7, #8, r7, asr #18
1008 usat r8, #8, r8, asr #18
1009 strb r6, [r1]
1010 strb r4, [r1, #pix8_size]
1011 strb r9, [r1, #2*pix8_size]
1012 strb r14, [r1, #3*pix8_size]
1013 strb r12, [r1, #4*pix8_size]
1014 strb r10, [r1, #5*pix8_size]
1015 strb r7, [r1, #6*pix8_size]
1016 strb r8, [r1, #7*pix8_size]
1017 cmp r0, r2
1018 add r1, r1, r3
1019 bcc 1b
1020 ldmia sp!, { r4-r11, pc }
1021 .size jpeg_idct8h, .-jpeg_idct8h
1022 #endif