apps/plugins/zxbox/z80_op4.c

   1 /*
   2  * Copyright (C) 1996-1998 Szeredi Miklos
   3  * Email: mszeredi@inf.bme.hu
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version. See the file COPYING.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  *
  19  */
  20
  21 #ifndef NO_OPDEF
  22 #include "z80_def.h"
  23 #include "z80_op4.h"
  24 #include "z80_ari.h"
  25 #endif
  26
  27 #define RET_CC(ccn, cc, n) \
  28 OPDEF(ret_ ## ccn, 0xC0+n*8)       \
  29 {                                  \
  30   if(!(cc)) {                      \
  31     ENTIME(5);                     \
  32   }                                \
  33   else {                           \
  34     POP(PC);                       \
  35     ENTIME(11);                    \
  36   }                                \
  37 }
  38
  39 RET_CC(nz, !TESTZF, 0)
  40 RET_CC(z,  TESTZF,  1)
  41 RET_CC(nc, !TESTCF, 2)
  42 RET_CC(c,  TESTCF,  3)
  43 RET_CC(po, !TESTPF, 4)
  44 RET_CC(pe, TESTPF,  5)
  45 RET_CC(p,  !TESTSF, 6)
  46 RET_CC(m,  TESTSF,  7)
  47
  48 #define POP_RR(rrn, rr, n) \
  49 OPDEF(pop_ ## rrn, 0xC1+n*0x10)    \
  50 {                                  \
  51   POP(rr);                         \
  52   ENTIME(10);                      \
  53 }
  54
  55 POP_RR(bc, BC, 0)
  56 POP_RR(de, DE, 1)
  57 POP_RR(hl, HL, 2)
  58 POP_RR(af, AF, 3)
  59
  60 OPDEF(ret, 0xC9)
  61 {
  62   POP(PC);
  63   ENTIME(10);
  64 }
  65
  66 OPDEF(exx, 0xD9)
  67 {
  68   register dbyte dtmp;
  69
  70   dtmp = BCBK, BCBK = BC, BC = dtmp;
  71   dtmp = DEBK, DEBK = DE, DE = dtmp;
  72   dtmp = HLBK, HLBK = HL, HL = dtmp;
  73
  74   ENTIME(4);
  75 }
  76
  77 #define JP_RR(rrn, rr) \
  78 OPDEF(jp_ ## rrn, 0xE9)            \
  79 {                                  \
  80   PC = rr;                         \
  81   ENTIME(4);                       \
  82 }
  83
  84 JP_RR(hl, HL)
  85
  86 #define LD_SP_RR(rrn, rr) \
  87 OPDEF(ld_sp_ ## rrn, 0xF9)         \
  88 {                                  \
  89   SP = rr;                         \
  90   ENTIME(6);                       \
  91 }
  92
  93 LD_SP_RR(hl, HL)
  94
  95 #define JP_CC(ccn, cc, n) \
  96 OPDEF(jp_ ## ccn ## _nn, 0xC2+n*8) \
  97 {                                  \
  98   if(!(cc)) {                      \
  99     PC+=2;                         \
 100     ENTIME(10);                    \
 101   }                                \
 102   else {                           \
 103     PC = DREAD(PC);                \
 104     ENTIME(10);                    \
 105   }                                \
 106 }
 107
 108 JP_CC(nz, !TESTZF, 0)
 109 JP_CC(z,  TESTZF,  1)
 110 JP_CC(nc, !TESTCF, 2)
 111 JP_CC(c,  TESTCF,  3)
 112 JP_CC(po, !TESTPF, 4)
 113 JP_CC(pe, TESTPF,  5)
 114 JP_CC(p,  !TESTSF, 6)
 115 JP_CC(m,  TESTSF,  7)
 116
 117 OPDEF(jp_nn, 0xC3)
 118 {
 119   PC = DREAD(PC);
 120   ENTIME(10);
 121 }
 122
 123
 124 OPDEF(out_in_a, 0xD3)
 125 {
 126   OUT(RA, *PCP, RA);
 127   PC++;
 128   ENTIME(11);
 129 }
 130
 131 OPDEF(in_a_in, 0xDB)
 132 {
 133   IN(RA, *PCP, RA);
 134   PC++;
 135   ENTIME(11);
 136 }
 137
 138 #define EX_ISP_RR(rrn, rr) \
 139 OPDEF(ex_isp_ ## rrn, 0xE3)        \
 140 {                                  \
 141   register dbyte dtmp;             \
 142   dtmp = DREAD(SP);                \
 143   DWRITE(SP, rr);                  \
 144   rr = dtmp;                       \
 145   ENTIME(19);                      \
 146 }
 147
 148 EX_ISP_RR(hl, HL)
 149
 150 OPDEF(ex_de_hl, 0xEB)
 151 {
 152   register dbyte dtmp;
 153   dtmp = DE;
 154   DE = HL;
 155   HL = dtmp;
 156   ENTIME(4);
 157 }
 158
 159 OPDEF(di, 0xF3)
 160 {
 161   DANM(iff1) = 0;
 162   DANM(iff2) = 0;
 163   DI_CHECK
 164   ENTIME(4);
 165 }
 166
 167 OPDEF(ei, 0xFB)
 168 {
 169   DANM(iff1) = 1;
 170   DANM(iff2) = 1;
 171   ENTIME(4);
 172 }
 173
 174
 175
 176 #define CALL_CC(ccn, cc, n) \
 177 OPDEF(call_ ## ccn ## _nn, 0xC4+n*8) \
 178 {                                  \
 179   if(!(cc)) {                      \
 180     PC+=2;                         \
 181     ENTIME(10);                    \
 182   }                                \
 183   else {                           \
 184     register dbyte dtmp;           \
 185     dtmp = PC;                     \
 186     PC = DREAD(dtmp);              \
 187     dtmp += 2;                     \
 188     PUSH(dtmp);                    \
 189     ENTIME(17);                    \
 190   }                                \
 191 }
 192
 193 CALL_CC(nz, !TESTZF, 0)
 194 CALL_CC(z,  TESTZF,  1)
 195 CALL_CC(nc, !TESTCF, 2)
 196 CALL_CC(c,  TESTCF,  3)
 197 CALL_CC(po, !TESTPF, 4)
 198 CALL_CC(pe, TESTPF,  5)
 199 CALL_CC(p,  !TESTSF, 6)
 200 CALL_CC(m,  TESTSF,  7)
 201
 202
 203
 204 #define PUSH_RR(rrn, rr, n) \
 205 OPDEF(push_ ## rrn, 0xC5+n*0x10)   \
 206 {                                  \
 207   PUSH(rr);                        \
 208   ENTIME(11);                      \
 209 }
 210
 211 PUSH_RR(bc, BC, 0)
 212 PUSH_RR(de, DE, 1)
 213 PUSH_RR(hl, HL, 2)
 214 PUSH_RR(af, AF, 3)
 215
 216
 217 OPDEF(call_nn, 0xCD)
 218 {
 219   register dbyte dtmp;
 220   dtmp = PC;
 221   PC = DREAD(dtmp);
 222   dtmp += 2;
 223   PUSH(dtmp);
 224   ENTIME(17);
 225 }
 226
 227
 228 OPDEF(add_a_n, 0xC6)
 229 {
 230   ADD(*PCP);
 231   PC++;
 232   ENTIME(7);
 233 }
 234
 235
 236 OPDEF(adc_a_n, 0xCE)
 237 {
 238   ADC(*PCP);
 239   PC++;
 240   ENTIME(7);
 241 }
 242
 243 OPDEF(sub_n, 0xD6)
 244 {
 245   SUB(*PCP);
 246   PC++;
 247   ENTIME(7);
 248 }
 249
 250
 251 OPDEF(sbc_a_n, 0xDE)
 252 {
 253   SBC(*PCP);
 254   PC++;
 255   ENTIME(7);
 256 }
 257
 258 OPDEF(and_n, 0xE6)
 259 {
 260   AND(*PCP);
 261   PC++;
 262   ENTIME(7);
 263 }
 264
 265
 266 OPDEF(xor_n, 0xEE)
 267 {
 268   XOR(*PCP);
 269   PC++;
 270   ENTIME(7);
 271 }
 272
 273 OPDEF(or_n, 0xF6)
 274 {
 275   OR(*PCP);
 276   PC++;
 277   ENTIME(7);
 278 }
 279
 280
 281 OPDEF(cp_n, 0xFE)
 282 {
 283   CP(*PCP);
 284   PC++;
 285   ENTIME(7);
 286 }
 287
 288 #define RST_NN(nnn, n) \
 289 OPDEF(rst_ ## nnn, 0xC7+n*8)       \
 290 {                                  \
 291   PUSH(PC);                        \
 292   PC = n*8;                        \
 293   ENTIME(11);                      \
 294 }
 295
 296 RST_NN(00, 0)
 297 RST_NN(08, 1)
 298 RST_NN(10, 2)
 299 RST_NN(18, 3)
 300 RST_NN(20, 4)
 301 RST_NN(28, 5)
 302 RST_NN(30, 6)
 303 RST_NN(38, 7)
 304
 305 #include "z80_op4x.c"