firmware/rolo.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2002 Randy D. Wood
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include "config.h"
  23 #include "lcd.h"
  24 #include "lcd-remote.h"
  25 #include "thread.h"
  26 #include "kernel.h"
  27 #include "sprintf.h"
  28 #include "button.h"
  29 #include "file.h"
  30 #include "audio.h"
  31 #include "system.h"
  32 #include "i2c.h"
  33 #include "adc.h"
  34 #include "string.h"
  35 #include "buffer.h"
  36 #include "storage.h"
  37 #include "rolo.h"
  38
  39 #ifdef MI4_FORMAT
  40 #include "crc32-mi4.h"
  41 #undef FIRMWARE_OFFSET_FILE_CRC
  42 #undef FIRMWARE_OFFSET_FILE_DATA
  43 #define FIRMWARE_OFFSET_FILE_CRC     0xC
  44 #define FIRMWARE_OFFSET_FILE_DATA    0x200
  45 #endif
  46
  47 #if !defined(IRIVER_IFP7XX_SERIES) && \
  48     (CONFIG_CPU != PP5002)
  49 /* FIX: this doesn't work on iFP, 3rd Gen ipods */
  50
  51 #define IRQ0_EDGE_TRIGGER 0x80
  52
  53 #ifdef CPU_PP
  54 /* Handle the COP properly - it needs to jump to a function outside SDRAM while
  55  * the new firmware is being loaded, and then jump to the start of SDRAM
  56  * TODO: Use the mailboxes built into the PP processor for this
  57  */
  58
  59 #if NUM_CORES > 1
  60 volatile unsigned char IDATA_ATTR cpu_message = 0;
  61 volatile unsigned char IDATA_ATTR cpu_reply = 0;
  62 extern int cop_idlestackbegin[];
  63
  64 void rolo_restart_cop(void) ICODE_ATTR;
  65 void rolo_restart_cop(void)
  66 {
  67     if (CURRENT_CORE == CPU)
  68     {
  69         /* There should be free thread slots aplenty */
  70         create_thread(rolo_restart_cop, cop_idlestackbegin, IDLE_STACK_SIZE,
  71                       0, "rolo COP" IF_PRIO(, PRIORITY_REALTIME)
  72                       IF_COP(, COP));
  73         return;
  74     }
  75
  76     COP_INT_DIS = -1;
  77
  78     /* Invalidate cache */
  79     cpucache_invalidate();
  80
  81     /* Disable cache */
  82     CACHE_CTL = CACHE_CTL_DISABLE;
  83
  84     /* Tell the main core that we're ready to reload */
  85     cpu_reply = 1;
  86
  87     /* Wait while RoLo loads the image into SDRAM */
  88     /* TODO: Accept checksum failure gracefully */
  89     while(cpu_message != 1);
  90
  91     /* Acknowledge the CPU and then reload */
  92     cpu_reply = 2;
  93
  94     asm volatile(
  95         "mov   r0, #0x10000000   \n"
  96         "mov   pc, r0            \n"
  97     );
  98 }
  99 #endif /* NUM_CORES > 1 */
 100 #endif /* CPU_PP */
 101
 102 static void rolo_error(const char *text)
 103 {
 104     lcd_clear_display();
 105     lcd_puts(0, 0, "ROLO error:");
 106     lcd_puts_scroll(0, 1, text);
 107     lcd_update();
 108     button_get(true);
 109     button_get(true);
 110     button_get(true);
 111     lcd_stop_scroll();
 112 }
 113
 114 #if CONFIG_CPU == SH7034 || CONFIG_CPU == IMX31L
 115 /* these are in assembler file "descramble.S" for SH7034 */
 116 extern unsigned short descramble(const unsigned char* source,
 117                                  unsigned char* dest, int length);
 118 /* this is in firmware/target/arm/imx31/rolo_restart.S for IMX31 */
 119 extern void rolo_restart(const unsigned char* source, unsigned char* dest,
 120                          int length);
 121 #else
 122
 123 /* explicitly put this code in iram, ICODE_ATTR is defined to be null for some
 124    targets that are low on iram, like the gigabeat F/X */
 125 void rolo_restart(const unsigned char* source, unsigned char* dest,
 126                   long length) __attribute__ ((section(".icode")));
 127 void rolo_restart(const unsigned char* source, unsigned char* dest,
 128                   long length)
 129 {
 130     long i;
 131     unsigned char* localdest = dest;
 132
 133     /* This is the equivalent of a call to memcpy() but this must be done from
 134        iram to avoid overwriting itself and we don't want to depend on memcpy()
 135        always being in iram */
 136     for(i = 0;i < length;i++)
 137         *localdest++ = *source++;
 138
 139 #if defined(CPU_COLDFIRE)
 140     asm (
 141         "movec.l %0,%%vbr    \n"
 142         "move.l  (%0)+,%%sp  \n"
 143         "move.l  (%0),%0     \n"
 144         "jmp     (%0)        \n"
 145         : : "a"(dest)
 146     );
 147 #elif defined(CPU_PP502x)
 148     CPU_INT_DIS = -1;
 149
 150     /* Flush cache */
 151     cpucache_flush();
 152
 153     /* Disable cache */
 154     CACHE_CTL = CACHE_CTL_DISABLE;
 155
 156     /* Reset the memory mapping registers to zero */
 157     {
 158         volatile unsigned long *mmap_reg;
 159         for (mmap_reg = &MMAP_FIRST; mmap_reg <= &MMAP_LAST; mmap_reg++)
 160             *mmap_reg = 0;
 161     }
 162
 163 #if NUM_CORES > 1
 164     /* Tell the COP it's safe to continue rebooting */
 165     cpu_message = 1;
 166
 167     /* Wait for the COP to tell us it is rebooting */
 168     while(cpu_reply != 2);
 169 #endif
 170
 171     asm volatile(
 172         "mov   r0, #0x10000000   \n"
 173         "mov   pc, r0            \n"
 174     );
 175
 176 #elif defined(CPU_TCC780X) || (CONFIG_CPU == S3C2440) || \
 177       (CONFIG_CPU==DM320) || defined(CPU_S5L870X)
 178     /* Flush and invalidate caches */
 179     cpucache_invalidate();
 180
 181     asm volatile(
 182         "mov   pc, %0            \n"
 183         : : "r"(dest)
 184     );
 185 #elif defined(CPU_MIPS)
 186     __dcache_writeback_all();
 187     asm volatile(
 188         "jr     %0               \n"
 189         : : "r"(dest)
 190     );
 191 #endif
 192 }
 193 #endif
 194
 195 /* This is assigned in the linker control file */
 196 extern unsigned long loadaddress;
 197
 198 /***************************************************************************
 199  *
 200  * Name: rolo_load_app(char *filename,int scrambled)
 201  * Filename must be a fully defined filename including the path and extension
 202  *
 203  ***************************************************************************/
 204 int rolo_load(const char* filename)
 205 {
 206     int fd;
 207     long length;
 208 #if defined(CPU_COLDFIRE) || defined(CPU_ARM) || defined(CPU_MIPS)
 209 #if !defined(MI4_FORMAT)
 210     int i;
 211 #endif
 212     unsigned long checksum,file_checksum;
 213 #else
 214     long file_length;
 215     unsigned short checksum,file_checksum;
 216 #endif
 217     unsigned char* ramstart = (void*)&loadaddress;
 218
 219     lcd_clear_display();
 220     lcd_puts(0, 0, "ROLO...");
 221     lcd_puts(0, 1, "Loading");
 222     lcd_update();
 223 #ifdef HAVE_REMOTE_LCD
 224     lcd_remote_clear_display();
 225     lcd_remote_puts(0, 0, "ROLO...");
 226     lcd_remote_puts(0, 1, "Loading");
 227     lcd_remote_update();
 228 #endif
 229
 230     audio_stop();
 231
 232     fd = open(filename, O_RDONLY);
 233     if(-1 == fd) {
 234         rolo_error("File not found");
 235         return -1;
 236     }
 237
 238     length = filesize(fd) - FIRMWARE_OFFSET_FILE_DATA;
 239
 240 #if defined(CPU_COLDFIRE) || defined(CPU_PP) || (CONFIG_CPU==DM320) \
 241     || defined(CPU_TCC780X) || (CONFIG_CPU==IMX31L) || (CONFIG_CPU == S3C2440) \
 242     || (CONFIG_CPU==AS3525) || (CONFIG_CPU==JZ4732) || defined(CPU_S5L870X)
 243     /* Read and save checksum */
 244     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 245     if (read(fd, &file_checksum, 4) != 4) {
 246         rolo_error("Error Reading checksum");
 247         return -1;
 248     }
 249
 250 #if !defined(MI4_FORMAT)
 251     /* Rockbox checksums are big-endian */
 252     file_checksum = betoh32(file_checksum);
 253 #endif
 254
 255 #if defined(CPU_PP) && NUM_CORES > 1
 256     lcd_puts(0, 2, "Waiting for coprocessor...");
 257     lcd_update();
 258     rolo_restart_cop();
 259     /* Wait for COP to be in safe code */
 260     while(cpu_reply != 1);
 261     lcd_puts(0, 2, "                          ");
 262     lcd_update();
 263 #endif
 264
 265     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 266
 267     if (read(fd, audiobuf, length) != length) {
 268         rolo_error("Error Reading File");
 269         return -1;
 270     }
 271
 272 #ifdef MI4_FORMAT
 273     /* Check CRC32 to see if we have a valid file */
 274     chksum_crc32gentab();
 275     checksum = chksum_crc32 (audiobuf, length);
 276 #else
 277     checksum = MODEL_NUMBER;
 278
 279     for(i = 0;i < length;i++) {
 280         checksum += audiobuf[i];
 281     }
 282 #endif
 283
 284     /* Verify checksum against file header */
 285     if (checksum != file_checksum) {
 286         rolo_error("Checksum Error");
 287         return -1;
 288     }
 289
 290     lcd_puts(0, 1, "Executing");
 291     lcd_update();
 292 #ifdef HAVE_REMOTE_LCD
 293     lcd_remote_puts(0, 1, "Executing");
 294     lcd_remote_update();
 295 #endif
 296     adc_close();
 297
 298 #ifdef CPU_ARM
 299     /* Should do these together since some ARM version should never have
 300      * FIQ disabled and not IRQ (imx31 errata). */
 301     disable_interrupt(IRQ_FIQ_STATUS);
 302 #else
 303     /* Some targets have a higher disable level than HIGEST_IRQ_LEVEL */
 304     set_irq_level(DISABLE_INTERRUPTS);
 305 #endif
 306
 307 #elif CONFIG_CPU == SH7034
 308     /* Read file length from header and compare to real file length */
 309     lseek(fd, FIRMWARE_OFFSET_FILE_LENGTH, SEEK_SET);
 310     if(read(fd, &file_length, 4) != 4) {
 311         rolo_error("Error Reading File Length");
 312         return -1;
 313     }
 314     if (length != file_length) {
 315         rolo_error("File length mismatch");
 316         return -1;
 317     }
 318
 319     /* Read and save checksum */
 320     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 321     if (read(fd, &file_checksum, 2) != 2) {
 322         rolo_error("Error Reading checksum");
 323         return -1;
 324     }
 325     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 326
 327     /* verify that file can be read and descrambled */
 328     if ((audiobuf + (2*length)+4) >= audiobufend) {
 329         rolo_error("Not enough room to load file");
 330         return -1;
 331     }
 332
 333     if (read(fd, &audiobuf[length], length) != (int)length) {
 334         rolo_error("Error Reading File");
 335         return -1;
 336     }
 337
 338     lcd_puts(0, 1, "Descramble");
 339     lcd_update();
 340
 341     checksum = descramble(audiobuf + length, audiobuf, length);
 342
 343     /* Verify checksum against file header */
 344     if (checksum != file_checksum) {
 345         rolo_error("Checksum Error");
 346         return -1;
 347     }
 348
 349     lcd_puts(0, 1, "Executing     ");
 350     lcd_update();
 351
 352     set_irq_level(HIGHEST_IRQ_LEVEL);
 353
 354     /* Calling these 2 initialization routines was necessary to get the
 355        the origional Archos version of the firmware to load and execute. */
 356     system_init();           /* Initialize system for restart */
 357     i2c_init();              /* Init i2c bus - it seems like a good idea */
 358     ICR = IRQ0_EDGE_TRIGGER; /* Make IRQ0 edge triggered */
 359     TSTR = 0xE0;             /* disable all timers */
 360     /* model-specific de-init, needed when flashed */
 361     /* Especially the Archos software is picky about this */
 362 #if defined(ARCHOS_RECORDER) || defined(ARCHOS_RECORDERV2) || \
 363     defined(ARCHOS_FMRECORDER)
 364     PAIOR = 0x0FA0;
 365 #endif
 366 #endif
 367 #ifdef HAVE_STORAGE_FLUSH
 368     storage_flush();
 369 #endif
 370     rolo_restart(audiobuf, ramstart, length);
 371
 372     return 0; /* this is never reached */
 373     (void)checksum; (void)file_checksum;
 374 }
 375 #else  /* !defined(IRIVER_IFP7XX_SERIES) */
 376 int rolo_load(const char* filename)
 377 {
 378     /* dummy */
 379     (void)filename;
 380     return 0;
 381 }
 382
 383 #endif /* !defined(IRIVER_IFP7XX_SERIES) */