firmware/target/arm/as3525/ata_sd_as3525.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2006 Daniel Ankers
  11  * Copyright © 2008-2009 Rafaël Carré
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; either version 2
  16  * of the License, or (at your option) any later version.
  17  *
  18  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  19  * KIND, either express or implied.
  20  *
  21  ****************************************************************************/
  22
  23 /* Driver for the ARM PL180 SD/MMC controller inside AS3525 SoC */
  24
  25 /* TODO: Find the real capacity of >2GB models (will be useful for USB) */
  26
  27 #include "config.h" /* for HAVE_MULTIVOLUME & AMS_OF_SIZE */
  28 #include "fat.h"
  29 #include "thread.h"
  30 #include "led.h"
  31 #include "hotswap.h"
  32 #include "system.h"
  33 #include "cpu.h"
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <string.h>
  37 #include "as3525.h"
  38 #include "pl180.h"  /* SD controller */
  39 #include "pl081.h"  /* DMA controller */
  40 #include "dma-target.h" /* DMA request lines */
  41 #include "clock-target.h"
  42 #ifdef HAVE_BUTTON_LIGHT
  43 #include "backlight-target.h"
  44 #endif
  45 #include "stdbool.h"
  46 #include "ata_idle_notify.h"
  47 #include "sd.h"
  48 #include "usb.h"
  49
  50 #ifdef HAVE_HOTSWAP
  51 #include "disk.h"
  52 #include "panic.h"
  53 #endif
  54
  55 /* command flags */
  56 #define MCI_NO_FLAGS    (0<<0)
  57 #define MCI_RESP        (1<<0)
  58 #define MCI_LONG_RESP   (1<<1)
  59 #define MCI_ARG         (1<<2)
  60
  61 /* ARM PL180 registers */
  62 #define MCI_POWER(i)       (*(volatile unsigned char *) (pl180_base[i]+0x00))
  63 #define MCI_CLOCK(i)       (*(volatile unsigned long *) (pl180_base[i]+0x04))
  64 #define MCI_ARGUMENT(i)    (*(volatile unsigned long *) (pl180_base[i]+0x08))
  65 #define MCI_COMMAND(i)     (*(volatile unsigned long *) (pl180_base[i]+0x0C))
  66 #define MCI_RESPCMD(i)     (*(volatile unsigned long *) (pl180_base[i]+0x10))
  67 #define MCI_RESP0(i)       (*(volatile unsigned long *) (pl180_base[i]+0x14))
  68 #define MCI_RESP1(i)       (*(volatile unsigned long *) (pl180_base[i]+0x18))
  69 #define MCI_RESP2(i)       (*(volatile unsigned long *) (pl180_base[i]+0x1C))
  70 #define MCI_RESP3(i)       (*(volatile unsigned long *) (pl180_base[i]+0x20))
  71 #define MCI_DATA_TIMER(i)  (*(volatile unsigned long *) (pl180_base[i]+0x24))
  72 #define MCI_DATA_LENGTH(i) (*(volatile unsigned short*) (pl180_base[i]+0x28))
  73 #define MCI_DATA_CTRL(i)   (*(volatile unsigned char *) (pl180_base[i]+0x2C))
  74 #define MCI_DATA_CNT(i)    (*(volatile unsigned short*) (pl180_base[i]+0x30))
  75 #define MCI_STATUS(i)      (*(volatile unsigned long *) (pl180_base[i]+0x34))
  76 #define MCI_CLEAR(i)       (*(volatile unsigned long *) (pl180_base[i]+0x38))
  77 #define MCI_MASK0(i)       (*(volatile unsigned long *) (pl180_base[i]+0x3C))
  78 #define MCI_MASK1(i)       (*(volatile unsigned long *) (pl180_base[i]+0x40))
  79 #define MCI_SELECT(i)      (*(volatile unsigned long *) (pl180_base[i]+0x44))
  80 #define MCI_FIFO_CNT(i)    (*(volatile unsigned long *) (pl180_base[i]+0x48))
  81
  82 #define MCI_ERROR \
  83     (MCI_DATA_CRC_FAIL | MCI_DATA_TIMEOUT | MCI_RX_OVERRUN | MCI_TX_UNDERRUN)
  84
  85 #define MCI_FIFO(i)        ((unsigned long *) (pl180_base[i]+0x80))
  86 /* volumes */
  87 #define     INTERNAL_AS3525 0   /* embedded SD card */
  88 #define     SD_SLOT_AS3525   1   /* SD slot if present */
  89
  90 static const int pl180_base[NUM_VOLUMES] = {
  91             NAND_FLASH_BASE
  92 #ifdef HAVE_MULTIVOLUME
  93             , SD_MCI_BASE
  94 #endif
  95 };
  96
  97 static int sd_select_bank(signed char bank);
  98 static int sd_init_card(const int drive);
  99 static void init_pl180_controller(const int drive);
 100 #define SECTOR_SIZE     512 /* XXX: different sector sizes ? */
 101 #define BLOCKS_PER_BANK 0x7a7800
 102
 103 static tCardInfo card_info[NUM_VOLUMES];
 104
 105 /* maximum timeouts recommanded in the SD Specification v2.00 */
 106 #define SD_MAX_READ_TIMEOUT     ((AS3525_PCLK_FREQ) / 1000 * 100) /* 100 ms */
 107 #define SD_MAX_WRITE_TIMEOUT    ((AS3525_PCLK_FREQ) / 1000 * 250) /* 250 ms */
 108
 109 /* for compatibility */
 110 static long last_disk_activity = -1;
 111
 112 #define MIN_YIELD_PERIOD 5  /* ticks */
 113 static long next_yield = 0;
 114
 115 static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x200)/sizeof(long)];
 116 static const char         sd_thread_name[] = "ata/sd";
 117 static struct mutex       sd_mtx;
 118 static struct event_queue sd_queue;
 119 #ifndef BOOTLOADER
 120 static bool sd_enabled = false;
 121 #endif
 122
 123 static struct wakeup transfer_completion_signal;
 124 static volatile bool retry;
 125
 126 #define UNALIGNED_NUM_SECTORS 10
 127 static unsigned char aligned_buffer[UNALIGNED_NUM_SECTORS* SECTOR_SIZE] __attribute__((aligned(32)));   /* align on cache line size */
 128 static unsigned char *uncached_buffer = UNCACHED_ADDR(&aligned_buffer[0]);
 129
 130 static inline void mci_delay(void) { int i = 0xffff; while(i--) ; }
 131
 132 #ifdef HAVE_HOTSWAP
 133 #if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2)
 134 static int sd1_oneshot_callback(struct timeout *tmo)
 135 {
 136     (void)tmo;
 137
 138     /* This is called only if the state was stable for 300ms - check state
 139      * and post appropriate event. */
 140     if (card_detect_target())
 141     {
 142         queue_broadcast(SYS_HOTSWAP_INSERTED, 0);
 143     }
 144     else
 145         queue_broadcast(SYS_HOTSWAP_EXTRACTED, 0);
 146
 147     return 0;
 148 }
 149
 150 void INT_GPIOA(void)
 151 {
 152     static struct timeout sd1_oneshot;
 153     /* reset irq */
 154     GPIOA_IC = (1<<2);
 155     timeout_register(&sd1_oneshot, sd1_oneshot_callback, (3*HZ/10), 0);
 156 }
 157 #endif  /* defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2) */
 158 #endif  /* HAVE_HOTSWAP */
 159
 160 void INT_NAND(void)
 161 {
 162     const int status = MCI_STATUS(INTERNAL_AS3525);
 163
 164     if(status & MCI_ERROR)
 165         retry = true;
 166
 167     wakeup_signal(&transfer_completion_signal);
 168     MCI_CLEAR(INTERNAL_AS3525) = status;
 169 }
 170
 171 #ifdef HAVE_MULTIVOLUME
 172 void INT_MCI0(void)
 173 {
 174     const int status = MCI_STATUS(SD_SLOT_AS3525);
 175
 176     if(status & MCI_ERROR)
 177         retry = true;
 178
 179     wakeup_signal(&transfer_completion_signal);
 180     MCI_CLEAR(SD_SLOT_AS3525) = status;
 181 }
 182 #endif
 183
 184 static bool send_cmd(const int drive, const int cmd, const int arg,
 185                      const int flags, long *response)
 186 {
 187     int val, status;
 188
 189     while(MCI_STATUS(drive) & MCI_CMD_ACTIVE);
 190
 191     if(MCI_COMMAND(drive) & MCI_COMMAND_ENABLE) /* clears existing command */
 192     {
 193         MCI_COMMAND(drive) = 0;
 194         mci_delay();
 195     }
 196
 197     val = cmd | MCI_COMMAND_ENABLE;
 198     if(flags & MCI_RESP)
 199     {
 200         val |= MCI_COMMAND_RESPONSE;
 201         if(flags & MCI_LONG_RESP)
 202             val |= MCI_COMMAND_LONG_RESPONSE;
 203     }
 204
 205     MCI_CLEAR(drive) = 0x7ff;
 206
 207     MCI_ARGUMENT(drive) = (flags & MCI_ARG) ? arg : 0;
 208     MCI_COMMAND(drive) = val;
 209
 210     while(MCI_STATUS(drive) & MCI_CMD_ACTIVE);  /* wait for cmd completion */
 211
 212     MCI_COMMAND(drive) = 0;
 213     MCI_ARGUMENT(drive) = ~0;
 214
 215     status = MCI_STATUS(drive);
 216     MCI_CLEAR(drive) = 0x7ff;
 217
 218     if(flags & MCI_RESP)
 219     {
 220         if(status & MCI_CMD_TIMEOUT)
 221             return false;
 222         else if(status & (MCI_CMD_CRC_FAIL /* FIXME? */ | MCI_CMD_RESP_END))
 223         {   /* resp received */
 224             if(flags & MCI_LONG_RESP)
 225             {
 226                 /* store the response in reverse words order */
 227                 response[0] = MCI_RESP3(drive);
 228                 response[1] = MCI_RESP2(drive);
 229                 response[2] = MCI_RESP1(drive);
 230                 response[3] = MCI_RESP0(drive);
 231             }
 232             else
 233                 response[0] = MCI_RESP0(drive);
 234             return true;
 235         }
 236     }
 237     else if(status & MCI_CMD_SENT)
 238         return true;
 239
 240     return false;
 241 }
 242
 243 static int sd_init_card(const int drive)
 244 {
 245     unsigned long response;
 246     long init_timeout;
 247     bool sdhc;
 248     unsigned long temp_reg[4];
 249     int i;
 250
 251     if(!send_cmd(drive, SD_GO_IDLE_STATE, 0, MCI_NO_FLAGS, NULL))
 252         return -1;
 253
 254     mci_delay();
 255
 256     sdhc = false;
 257     if(send_cmd(drive, SD_SEND_IF_COND, 0x1AA, MCI_RESP|MCI_ARG, &response))
 258         if((response & 0xFFF) == 0x1AA)
 259             sdhc = true;
 260
 261     /* timeout for initialization is 1sec, from SD Specification 2.00 */
 262     init_timeout = current_tick + HZ;
 263
 264     do {
 265         /* timeout */
 266         if(current_tick > init_timeout)
 267             return -2;
 268
 269         /* app_cmd */
 270         if( !send_cmd(drive, SD_APP_CMD, 0, MCI_RESP|MCI_ARG, &response) ||
 271             !(response & (1<<5)) )
 272         {
 273             return -3;
 274         }
 275
 276         /* acmd41 */
 277         if(!send_cmd(drive, SD_APP_OP_COND, (sdhc ? 0x40FF8000 : (1<<23)),
 278                         MCI_RESP|MCI_ARG, &card_info[drive].ocr))
 279         {
 280             return -4;
 281         }
 282
 283     } while(!(card_info[drive].ocr & (1<<31)));
 284
 285     /* send CID */
 286     if(!send_cmd(drive, SD_ALL_SEND_CID, 0, MCI_RESP|MCI_LONG_RESP|MCI_ARG,
 287                             temp_reg))
 288         return -5;
 289
 290     for(i=0; i<4; i++)
 291         card_info[drive].cid[3-i] = temp_reg[i];
 292
 293     /* send RCA */
 294     if(!send_cmd(drive, SD_SEND_RELATIVE_ADDR, 0, MCI_RESP|MCI_ARG,
 295                 &card_info[drive].rca))
 296         return -6;
 297
 298     /* send CSD */
 299     if(!send_cmd(drive, SD_SEND_CSD, card_info[drive].rca,
 300                  MCI_RESP|MCI_LONG_RESP|MCI_ARG, temp_reg))
 301         return -7;
 302
 303     for(i=0; i<4; i++)
 304         card_info[drive].csd[3-i] = temp_reg[i];
 305
 306     sd_parse_csd(&card_info[drive]);
 307
 308     if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
 309         return -9;
 310
 311     if(!send_cmd(drive, SD_APP_CMD, card_info[drive].rca, MCI_ARG, NULL))
 312         return -10;
 313
 314     if(!send_cmd(drive, SD_SET_BUS_WIDTH, card_info[drive].rca | 2, MCI_ARG, NULL))
 315         return -11;
 316
 317     if(!send_cmd(drive, SD_SET_BLOCKLEN, card_info[drive].blocksize, MCI_ARG,
 318                  NULL))
 319         return -12;
 320
 321     card_info[drive].initialized = 1;
 322
 323     MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS; /* full speed for controller clock */
 324     mci_delay();
 325
 326     /*
 327      * enable bank switching
 328      * without issuing this command, we only have access to 1/4 of the blocks
 329      * of the first bank (0x1E9E00 blocks, which is the size reported in the
 330      * CSD register)
 331      */
 332     if(drive == INTERNAL_AS3525)
 333     {
 334         const int ret = sd_select_bank(-1);
 335         if(ret < 0)
 336             return ret - 13;
 337     }
 338
 339     return 0;
 340 }
 341
 342 static void sd_thread(void) __attribute__((noreturn));
 343 static void sd_thread(void)
 344 {
 345     struct queue_event ev;
 346     bool idle_notified = false;
 347
 348     while (1)
 349     {
 350         queue_wait_w_tmo(&sd_queue, &ev, HZ);
 351
 352         switch ( ev.id )
 353         {
 354 #ifdef HAVE_HOTSWAP
 355         case SYS_HOTSWAP_INSERTED:
 356         case SYS_HOTSWAP_EXTRACTED:
 357         {
 358             int microsd_init = 1;
 359             fat_lock();          /* lock-out FAT activity first -
 360                                     prevent deadlocking via disk_mount that
 361                                     would cause a reverse-order attempt with
 362                                     another thread */
 363             mutex_lock(&sd_mtx); /* lock-out card activity - direct calls
 364                                     into driver that bypass the fat cache */
 365
 366             /* We now have exclusive control of fat cache and ata */
 367
 368             disk_unmount(SD_SLOT_AS3525);     /* release "by force", ensure file
 369                                     descriptors aren't leaked and any busy
 370                                     ones are invalid if mounting */
 371
 372             /* Force card init for new card, re-init for re-inserted one or
 373              * clear if the last attempt to init failed with an error. */
 374             card_info[SD_SLOT_AS3525].initialized = 0;
 375
 376             if (ev.id == SYS_HOTSWAP_INSERTED)
 377             {
 378                 sd_enable(true);
 379                 init_pl180_controller(SD_SLOT_AS3525);
 380                 microsd_init = sd_init_card(SD_SLOT_AS3525);
 381                 if (microsd_init < 0) /* initialisation failed */
 382                     panicf("microSD init failed : %d", microsd_init);
 383
 384                 microsd_init = disk_mount(SD_SLOT_AS3525); /* 0 if fail */
 385             }
 386
 387             /*
 388              * Mount succeeded, or this was an EXTRACTED event,
 389              * in both cases notify the system about the additional filesystem
 390             if (microsd_init)
 391                 queue_broadcast(SYS_FS_CHANGED, 0);
 392
 393             /* Access is now safe */
 394             mutex_unlock(&sd_mtx);
 395             fat_unlock();
 396             sd_enable(false);
 397         }
 398             break;
 399 #endif
 400         case SYS_TIMEOUT:
 401             if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
 402             {
 403                 idle_notified = false;
 404             }
 405             else
 406             {
 407                 /* never let a timer wrap confuse us */
 408                 next_yield = current_tick;
 409
 410                 if (!idle_notified)
 411                 {
 412                     call_storage_idle_notifys(false);
 413                     idle_notified = true;
 414                 }
 415             }
 416             break;
 417
 418         case SYS_USB_CONNECTED:
 419             usb_acknowledge(SYS_USB_CONNECTED_ACK);
 420             /* Wait until the USB cable is extracted again */
 421             usb_wait_for_disconnect(&sd_queue);
 422
 423             break;
 424         case SYS_USB_DISCONNECTED:
 425             usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
 426             break;
 427         }
 428     }
 429 }
 430
 431 static void init_pl180_controller(const int drive)
 432 {
 433     MCI_COMMAND(drive) = MCI_DATA_CTRL(drive) = 0;
 434     MCI_CLEAR(drive) = 0x7ff;
 435
 436     MCI_MASK0(drive) = MCI_MASK1(drive) = MCI_ERROR | MCI_DATA_END;
 437
 438 #ifdef HAVE_MULTIVOLUME
 439     VIC_INT_ENABLE |=
 440         (drive == INTERNAL_AS3525) ? INTERRUPT_NAND : INTERRUPT_MCI0;
 441
 442 #if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2)
 443     /* setup isr for microsd monitoring */
 444     VIC_INT_ENABLE |= (INTERRUPT_GPIOA);
 445     /* clear previous irq */
 446     GPIOA_IC = (1<<2);
 447     /* enable edge detecting */
 448     GPIOA_IS &= ~(1<<2);
 449     /* detect both raising and falling edges */
 450     GPIOA_IBE |= (1<<2);
 451
 452 #endif
 453
 454 #else
 455     VIC_INT_ENABLE |= INTERRUPT_NAND;
 456 #endif
 457
 458     MCI_POWER(drive) = MCI_POWER_UP|(10 /*voltage*/ << 2); /* use OF voltage */
 459     mci_delay();
 460
 461     MCI_POWER(drive) |= MCI_POWER_ON;
 462     mci_delay();
 463
 464     MCI_SELECT(drive) = 0;
 465
 466     MCI_CLOCK(drive) = MCI_CLOCK_ENABLE | AS3525_SD_IDENT_DIV;
 467     mci_delay();
 468 }
 469
 470 int sd_init(void)
 471 {
 472     int ret;
 473     CGU_IDE =   (1<<7)  /* AHB interface enable */  |
 474                 (1<<6)  /* interface enable */      |
 475                 (AS3525_IDE_DIV << 2)               |
 476                 AS3525_CLK_PLLA;  /* clock source = PLLA */
 477
 478
 479     CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
 480 #ifdef HAVE_MULTIVOLUME
 481     CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
 482     CCU_IO &= ~(1<<3);           /* bits 3:2 = 01, xpd is SD interface */
 483     CCU_IO |= (1<<2);
 484 #endif
 485
 486     wakeup_init(&transfer_completion_signal);
 487
 488     init_pl180_controller(INTERNAL_AS3525);
 489     ret = sd_init_card(INTERNAL_AS3525);
 490     if(ret < 0)
 491         return ret;
 492 #ifdef HAVE_MULTIVOLUME
 493     init_pl180_controller(SD_SLOT_AS3525);
 494 #endif
 495
 496     /* init mutex */
 497     mutex_init(&sd_mtx);
 498
 499     queue_init(&sd_queue, true);
 500     create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
 501             sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE) IF_COP(, CPU));
 502
 503 #ifndef BOOTLOADER
 504     sd_enabled = true;
 505     sd_enable(false);
 506 #endif
 507     return 0;
 508 }
 509
 510 #ifdef HAVE_HOTSWAP
 511 bool sd_removable(IF_MV_NONVOID(int drive))
 512 {
 513 #ifndef HAVE_MULTIVOLUME
 514     const int drive=0;
 515 #endif
 516     return (drive==1);
 517 }
 518
 519 bool sd_present(IF_MV_NONVOID(int drive))
 520 {
 521 #ifndef HAVE_MULTIVOLUME
 522     const int drive=0;
 523 #endif
 524     return (card_info[drive].initialized && card_info[drive].numblocks > 0);
 525 }
 526 #endif
 527
 528 static int sd_wait_for_state(const int drive, unsigned int state)
 529 {
 530     unsigned long response = 0;
 531     unsigned int timeout = 100; /* ticks */
 532     long t = current_tick;
 533
 534     while (1)
 535     {
 536         long tick;
 537
 538         if(!send_cmd(drive, SD_SEND_STATUS, card_info[drive].rca,
 539                     MCI_RESP|MCI_ARG, &response))
 540             return -1;
 541
 542         if (((response >> 9) & 0xf) == state)
 543             return 0;
 544
 545         if(TIME_AFTER(current_tick, t + timeout))
 546             return -2;
 547
 548         if (TIME_AFTER((tick = current_tick), next_yield))
 549         {
 550             yield();
 551             timeout += current_tick - tick;
 552             next_yield = tick + MIN_YIELD_PERIOD;
 553         }
 554     }
 555 }
 556
 557 static int sd_select_bank(signed char bank)
 558 {
 559     int ret;
 560
 561     do {
 562         /* The ISR will set this to true if an error occurred */
 563         retry = false;
 564
 565         ret = sd_wait_for_state(INTERNAL_AS3525, SD_TRAN);
 566         if (ret < 0)
 567             return ret - 2;
 568
 569         if(!send_cmd(INTERNAL_AS3525, SD_SWITCH_FUNC, 0x80ffffef, MCI_ARG, NULL))
 570             return -1;
 571
 572         mci_delay();
 573
 574         if(!send_cmd(INTERNAL_AS3525, 35, 0, MCI_NO_FLAGS, NULL))
 575             return -2;
 576
 577         mci_delay();
 578
 579         memset(uncached_buffer, 0, 512);
 580         if(bank == -1)
 581         {   /* enable bank switching */
 582             uncached_buffer[0] = 16;
 583             uncached_buffer[1] = 1;
 584             uncached_buffer[2] = 10;
 585         }
 586         else
 587             uncached_buffer[0] = bank;
 588
 589         dma_retain();
 590         /* we don't use the uncached buffer here, because we need the
 591          * physical memory address for DMA transfers */
 592         dma_enable_channel(0, aligned_buffer, MCI_FIFO(INTERNAL_AS3525),
 593             DMA_PERI_SD, DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8,
 594             NULL);
 595
 596         MCI_DATA_TIMER(INTERNAL_AS3525) = SD_MAX_WRITE_TIMEOUT;
 597         MCI_DATA_LENGTH(INTERNAL_AS3525) = 512;
 598         MCI_DATA_CTRL(INTERNAL_AS3525) =  (1<<0) /* enable */   |
 599                                 (0<<1) /* transfer direction */ |
 600                                 (1<<3) /* DMA */                |
 601                                 (9<<4) /* 2^9 = 512 */ ;
 602
 603         wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
 604
 605         dma_release();
 606
 607         mci_delay();
 608
 609         ret = sd_wait_for_state(INTERNAL_AS3525, SD_TRAN);
 610         if (ret < 0)
 611             return ret - 4;
 612     } while(retry);
 613
 614     card_info[INTERNAL_AS3525].current_bank = (bank == -1) ? 0 : bank;
 615
 616     return 0;
 617 }
 618
 619 static int sd_transfer_sectors(IF_MV2(int drive,) unsigned long start,
 620                                int count, void* buf, const bool write)
 621 {
 622 #ifndef HAVE_MULTIVOLUME
 623     const int drive = 0;
 624 #endif
 625     int ret = 0;
 626
 627     /* skip SanDisk OF */
 628     if (drive == INTERNAL_AS3525)
 629         start += AMS_OF_SIZE;
 630
 631     mutex_lock(&sd_mtx);
 632 #ifndef BOOTLOADER
 633     sd_enable(true);
 634     led(true);
 635 #endif
 636
 637     if (card_info[drive].initialized <= 0)
 638     {
 639         ret = sd_init_card(drive);
 640         if (!(card_info[drive].initialized))
 641             goto sd_transfer_error;
 642     }
 643
 644     last_disk_activity = current_tick;
 645
 646     ret = sd_wait_for_state(drive, SD_TRAN);
 647     if (ret < 0)
 648     {
 649         ret -= 20;
 650         goto sd_transfer_error;
 651     }
 652
 653     dma_retain();
 654
 655     while(count)
 656     {
 657         /* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH
 658          * register, so we have to transfer maximum 127 sectors at a time. */
 659         unsigned int transfer = (count >= 128) ? 127 : count; /* sectors */
 660         void *dma_buf;
 661         const int cmd =
 662             write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
 663         unsigned long bank_start = start;
 664
 665         /* The ISR will set this to true if an error occurred */
 666         retry = false;
 667
 668         /* Only switch banks for internal storage */
 669         if(drive == INTERNAL_AS3525)
 670         {
 671             unsigned int bank = start / BLOCKS_PER_BANK; /* Current bank */
 672
 673             /* Switch bank if needed */
 674             if(card_info[INTERNAL_AS3525].current_bank != bank)
 675             {
 676                 ret = sd_select_bank(bank);
 677                 if (ret < 0)
 678                 {
 679                     ret -= 2*20;
 680                     goto sd_transfer_error;
 681                 }
 682             }
 683
 684             /* Adjust start block in current bank */
 685             bank_start -= bank * BLOCKS_PER_BANK;
 686
 687             /* Do not cross a bank boundary in a single transfer loop */
 688             if((transfer + bank_start) >= BLOCKS_PER_BANK)
 689                 transfer = BLOCKS_PER_BANK - bank_start;
 690         }
 691
 692         dma_buf = aligned_buffer;
 693         if(transfer > UNALIGNED_NUM_SECTORS)
 694             transfer = UNALIGNED_NUM_SECTORS;
 695         if(write)
 696             memcpy(uncached_buffer, buf, transfer * SECTOR_SIZE);
 697
 698         /* Set bank_start to the correct unit (blocks or bytes) */
 699         if(!(card_info[drive].ocr & (1<<30)))   /* not SDHC */
 700             bank_start *= SD_BLOCK_SIZE;
 701
 702         if(!send_cmd(drive, cmd, bank_start, MCI_ARG, NULL))
 703         {
 704             ret -= 3*20;
 705             goto sd_transfer_error;
 706         }
 707
 708         if(write)
 709             dma_enable_channel(0, dma_buf, MCI_FIFO(drive),
 710                 (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
 711                 DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL);
 712         else
 713             dma_enable_channel(0, MCI_FIFO(drive), dma_buf,
 714                 (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
 715                 DMAC_FLOWCTRL_PERI_PERI_TO_MEM, false, true, 0, DMA_S8, NULL);
 716
 717         /* FIXME : we should check if the timeouts calculated from the card's
 718          * CSD are lower, and use them if it is the case
 719          * Note : the OF doesn't seem to use them anyway */
 720         MCI_DATA_TIMER(drive) = write ?
 721                 SD_MAX_WRITE_TIMEOUT : SD_MAX_READ_TIMEOUT;
 722         MCI_DATA_LENGTH(drive) = transfer * card_info[drive].blocksize;
 723         MCI_DATA_CTRL(drive) =  (1<<0) /* enable */                     |
 724                                 (!write<<1) /* transfer direction */    |
 725                                 (1<<3) /* DMA */                        |
 726                                 (9<<4) /* 2^9 = 512 */ ;
 727
 728
 729         wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
 730         if(!retry)
 731         {
 732             if(!write)
 733                 memcpy(buf, uncached_buffer, transfer * SECTOR_SIZE);
 734             buf += transfer * SECTOR_SIZE;
 735             start += transfer;
 736             count -= transfer;
 737         }
 738
 739         last_disk_activity = current_tick;
 740
 741         if(!send_cmd(drive, SD_STOP_TRANSMISSION, 0, MCI_NO_FLAGS, NULL))
 742         {
 743             ret = -4*20;
 744             goto sd_transfer_error;
 745         }
 746
 747         ret = sd_wait_for_state(drive, SD_TRAN);
 748         if (ret < 0)
 749         {
 750             ret -= 5*20;
 751             goto sd_transfer_error;
 752         }
 753     }
 754
 755     dma_release();
 756
 757 #ifndef BOOTLOADER
 758     led(false);
 759     sd_enable(false);
 760 #endif
 761     mutex_unlock(&sd_mtx);
 762     return 0;
 763
 764 sd_transfer_error:
 765     card_info[drive].initialized = 0;
 766     return ret;
 767 }
 768
 769 int sd_read_sectors(IF_MV2(int drive,) unsigned long start, int count,
 770                      void* buf)
 771 {
 772     return sd_transfer_sectors(IF_MV2(drive,) start, count, buf, false);
 773 }
 774
 775 int sd_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
 776                      const void* buf)
 777 {
 778
 779 #ifdef BOOTLOADER /* we don't need write support in bootloader */
 780 #ifdef HAVE_MULTIVOLUME
 781     (void) drive;
 782 #endif
 783     (void) start;
 784     (void) count;
 785     (void) buf;
 786     return -1;
 787 #else
 788     return sd_transfer_sectors(IF_MV2(drive,) start, count, (void*)buf, true);
 789 #endif
 790 }
 791
 792 #ifndef BOOTLOADER
 793 long sd_last_disk_activity(void)
 794 {
 795     return last_disk_activity;
 796 }
 797
 798 void sd_enable(bool on)
 799 {
 800     /* buttonlight AMSes need a bit of special handling for the buttonlight here,
 801      * due to the dual mapping of GPIOD and XPD */
 802 #if defined(HAVE_BUTTON_LIGHT) && defined(HAVE_MULTIVOLUME)
 803     extern int buttonlight_is_on;
 804 #endif
 805     if (sd_enabled == on)
 806         return; /* nothing to do */
 807     if(on)
 808     {
 809         CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
 810 #ifdef HAVE_MULTIVOLUME
 811         CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
 812 #ifdef HAVE_BUTTON_LIGHT
 813         CCU_IO |= (1<<2);
 814         if (buttonlight_is_on)
 815             GPIOD_DIR &= ~(1<<7);
 816         else
 817             _buttonlight_off();
 818 #endif
 819 #endif
 820         CGU_IDE |= (1<<7)  /* AHB interface enable */  |
 821                    (1<<6)  /* interface enable */;
 822         sd_enabled = true;
 823     }
 824     else
 825     {
 826         CGU_PERI &= ~CGU_NAF_CLOCK_ENABLE;
 827 #ifdef HAVE_MULTIVOLUME
 828 #ifdef HAVE_BUTTON_LIGHT
 829         CCU_IO &= ~(1<<2);
 830         if (buttonlight_is_on)
 831             _buttonlight_on();
 832 #endif
 833         CGU_PERI &= ~CGU_MCI_CLOCK_ENABLE;
 834 #endif
 835         CGU_IDE &= ~((1<<7)|(1<<6));
 836         sd_enabled = false;
 837     }
 838 }
 839
 840 tCardInfo *card_get_info_target(int card_no)
 841 {
 842     return &card_info[card_no];
 843 }
 844
 845 bool card_detect_target(void)
 846 {
 847 #if defined(HAVE_HOTSWAP) && \
 848     (defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2))
 849     return !(GPIOA_PIN(2));
 850 #else
 851     return false;
 852 #endif
 853 }
 854
 855 #ifdef HAVE_HOTSWAP
 856 void card_enable_monitoring_target(bool on)
 857 {
 858     if (on)
 859     {
 860     /* add e200v2/c200v2 here */
 861 #if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2)
 862         /* enable isr*/
 863         GPIOA_IE |= (1<<2);
 864 #endif
 865     }
 866     else
 867     {
 868 #if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2)
 869         /* edisable isr*/
 870         GPIOA_IE &= ~(1<<2);
 871 #endif
 872     }
 873 }
 874 #endif
 875
 876 #endif /* BOOTLOADER */