Refine the routines in mmu-arm.c and move them to mmu-arm.S since the code is now...
[kugel-rb.git] / firmware / target / arm / imx31 / gigabeat-s / system-target.h
blob26fb5172b2845263ffb46ce049bfce4126eddd56
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
10 * Copyright (C) 2007 by Greg White
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
21 #ifndef SYSTEM_TARGET_H
22 #define SYSTEM_TARGET_H
24 #include "system-arm.h"
25 #include "mmu-arm.h"
27 #ifndef HAVE_ADJUSTABLE_CPU_FREQ
28 /* TODO: implement CPU frequency scaling */
29 #define CPUFREQ_DEFAULT CPU_FREQ
30 #define CPUFREQ_NORMAL CPU_FREQ
31 #define CPUFREQ_MAX CPU_FREQ
32 #endif
34 static inline void udelay(unsigned int usecs)
36 unsigned stop = GPTCNT + usecs;
37 while (TIME_BEFORE(GPTCNT, stop));
40 void watchdog_init(unsigned int half_seconds);
41 void watchdog_service(void);
43 void gpt_start(void);
44 void gpt_stop(void);
46 unsigned int iim_system_rev(void);
48 /* Prepare for transition to firmware */
49 void system_prepare_fw_start(void);
50 void tick_stop(void);
51 void kernel_device_init(void);
53 void imx31_regmod32(volatile uint32_t *reg_p, uint32_t value,
54 uint32_t mask);
55 void imx31_regset32(volatile uint32_t *reg_p, uint32_t mask);
56 void imx31_regclr32(volatile uint32_t *reg_p, uint32_t mask);
58 #define KDEV_INIT
60 struct ARM_REGS {
61 int r0;
62 int r1;
63 int r2;
64 int r3;
65 int r4;
66 int r5;
67 int r6;
68 int r7;
69 int r8;
70 int r9;
71 int r10;
72 int r11;
73 int r12;
74 int sp;
75 int lr;
76 int pc;
77 int cpsr;
78 } regs;
80 inline void dumpregs(void);
82 #endif /* SYSTEM_TARGET_H */