Rockchip rk27xx port initial commit. This is still work in progress.
[kugel-rb.git] / firmware / target / arm / rk27xx / spfd5420a.h
blobfcb998dfd1fe6d68f59cb2be3b9e9c1fd6c084d2
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
10 * Copyright (C) 2011 Marcin Bukat
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
22 #define ID_READ 0x000
23 #define DRIVER_OUT_CTRL 0x001
24 #define WAVEFORM_CTRL 0x002
25 #define ENTRY_MODE 0x003
26 /* 0x004 - 0x005 reserved */
27 #define SHAPENING_CTRL 0x006 /* not present in datasheet */
28 #define DISPLAY_CTRL1 0x007
29 #define DISPLAY_CTRL2 0x008
30 #define LOW_PWR_CTRL1 0x009
31 /* 0x00A reserved */
32 #define LOW_PWR_CTRL2 0x00B
33 #define EXT_DISP_CTRL1 0x00C
34 /* 0x00D - 0x00E reserved */
35 #define EXT_DISP_CTRL2 0x00F
36 #define PANEL_IF_CTRL1 0x010
37 #define PANEL_IF_CTRL2 0x011
38 #define PANEL_IF_CTRL3 0x012
39 /* 0x013 - 0x01F reserved */
40 #define PANEL_IF_CTRL4 0x020
41 #define PANEL_IF_CTRL5 0x021
42 #define PANEL_IF_CTRL6 0x022
43 /* 0x023 - 0x08F reserved */
44 #define FRAME_MKR_CTRL 0x090
45 /* 0x091 reserved */
46 #define MDDI_CTRL 0x092 /* not present in datasheet */
47 /* 0x093 - 0x0FF reserved */
48 #define PWR_CTRL1 0x100
49 #define PWR_CTRL2 0x101
50 #define PWR_CTRL3 0x102
51 #define PWR_CTRL4 0x103 /* amplitude to VCOM */
52 /* 0x104 - 0x106 reserved */
53 #define PWR_CTRL5 0x107
54 /* 0x108 - 0x10F reserved */
55 #define PWR_CTRL6 0x110
56 #define PWR_CTRL7 0x112 /* not present in datasheet */
57 /* 0x113 - 0x1FF reserved */
58 #define GRAM_H_ADDR 0x200
59 #define GRAM_V_ADDR 0x201
60 #define GRAM_READ 0x202
61 #define GRAM_WRITE 0x202
62 /* 0x203 - 0x20F reserved */
63 #define WINDOW_H_START 0x210
64 #define WINDOW_H_END 0x211
65 #define WINDOW_V_START 0x212
66 #define WINDOW_V_END 0x213
67 /* 0x214 - 0x27F reserved */
68 #define NVM_READ 0x280
69 #define NVM_WRITE 0x280
70 #define VCOM_HV1 0x281
71 #define VCOM_HV2 0x282
72 /* 0x283 - 0x2FF reserved */
73 #define GAMMA_CTRL1 0x300
74 #define GAMMA_CTRL2 0x301
75 #define GAMMA_CTRL3 0x302
76 #define GAMMA_CTRL4 0x303
77 #define GAMMA_CTRL5 0x304
78 #define GAMMA_CTRL6 0x305
79 #define GAMMA_CTRL7 0x306
80 #define GAMMA_CTRL8 0x307
81 #define GAMMA_CTRL9 0x308
82 #define GAMMA_CTRL10 0x309
83 #define GAMMA_CTRL11 0x30A
84 #define GAMMA_CTRL12 0x30B
85 #define GAMMA_CTRL13 0x30C
86 #define GAMMA_CTRL14 0x30D
87 #define GAMMA_CTRL15 0x30E
88 #define GAMMA_CTRL16 0x30F
89 /* 0x310 - 0x3FF reserved */
90 #define BASE_IMG_SIZE 0x400
91 #define BASE_IMG_CTRL 0x401
92 /* 0x402 - 0x403 reserved */
93 #define VSCROLL_CTRL 0x404
94 /* 0x405 - 0x4FF reserved */
95 #define PART1_POS 0x500
96 #define PART1_START 0x501
97 #define PART1_END 0x502
98 #define PART2_POS 0x503
99 #define PART2_START 0x504
100 #define PART2_END 0x505
101 /* 0x506 - 0x5FF reserved */
102 #define RESET 0x600 /* not present in datasheet */
103 /* 0x601 - 0x605 */
104 #define IF_ENDIAN 0x606
105 /* 0x607 - 0x6EF reserved */
106 #define NVM_CTRL 0x6F0
107 /* 0x6F1 - 0xFFF reserved */